1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 < %s | FileCheck -check-prefixes=GCN,GFX9,MUBUF %s 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --amdgpu-enable-flat-scratch < %s | FileCheck -check-prefixes=GCN,GFX9,FLATSCR %s 4 5; Make sure we use the correct frame offset is used with the local 6; frame area. 7; 8; %pin.low is allocated to offset 0. 9; 10; %local.area is assigned to the local frame offset by the 11; LocalStackSlotAllocation pass at offset 4096. 12; 13; The %load1 access to %gep.large.offset initially used the stack 14; pointer register and directly referenced the frame index. After 15; LocalStackSlotAllocation, it would no longer refer to a frame index 16; so eliminateFrameIndex would not adjust the access to use the 17; correct FP offset. 18 19define amdgpu_kernel void @local_stack_offset_uses_sp(i64 addrspace(1)* %out, i8 addrspace(1)* %in) { 20; MUBUF-LABEL: local_stack_offset_uses_sp: 21; MUBUF: ; %bb.0: ; %entry 22; MUBUF-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 23; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s6, s9 24; MUBUF-NEXT: s_addc_u32 flat_scratch_hi, s7, 0 25; MUBUF-NEXT: s_add_u32 s0, s0, s9 26; MUBUF-NEXT: v_mov_b32_e32 v1, 0x3000 27; MUBUF-NEXT: s_addc_u32 s1, s1, 0 28; MUBUF-NEXT: v_add_u32_e32 v0, 64, v1 29; MUBUF-NEXT: v_mov_b32_e32 v2, 0 30; MUBUF-NEXT: v_mov_b32_e32 v3, 0x2000 31; MUBUF-NEXT: s_mov_b32 s6, 0 32; MUBUF-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen 33; MUBUF-NEXT: BB0_1: ; %loadstoreloop 34; MUBUF-NEXT: ; =>This Inner Loop Header: Depth=1 35; MUBUF-NEXT: v_add_u32_e32 v3, s6, v1 36; MUBUF-NEXT: s_add_i32 s6, s6, 1 37; MUBUF-NEXT: s_cmpk_lt_u32 s6, 0x2120 38; MUBUF-NEXT: buffer_store_byte v2, v3, s[0:3], 0 offen 39; MUBUF-NEXT: s_cbranch_scc1 BB0_1 40; MUBUF-NEXT: ; %bb.2: ; %split 41; MUBUF-NEXT: v_mov_b32_e32 v1, 0x3000 42; MUBUF-NEXT: v_add_u32_e32 v1, 0x20d0, v1 43; MUBUF-NEXT: buffer_load_dword v2, v1, s[0:3], 0 offen 44; MUBUF-NEXT: buffer_load_dword v1, v1, s[0:3], 0 offen offset:4 45; MUBUF-NEXT: buffer_load_dword v3, v0, s[0:3], 0 offen 46; MUBUF-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen offset:4 47; MUBUF-NEXT: s_waitcnt vmcnt(1) 48; MUBUF-NEXT: v_add_co_u32_e32 v0, vcc, v2, v3 49; MUBUF-NEXT: s_waitcnt lgkmcnt(0) 50; MUBUF-NEXT: v_mov_b32_e32 v2, s4 51; MUBUF-NEXT: s_waitcnt vmcnt(0) 52; MUBUF-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v4, vcc 53; MUBUF-NEXT: v_mov_b32_e32 v3, s5 54; MUBUF-NEXT: global_store_dwordx2 v[2:3], v[0:1], off 55; MUBUF-NEXT: s_endpgm 56; 57; FLATSCR-LABEL: local_stack_offset_uses_sp: 58; FLATSCR: ; %bb.0: ; %entry 59; FLATSCR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 60; FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s2, s5 61; FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s3, 0 62; FLATSCR-NEXT: v_mov_b32_e32 v0, 0 63; FLATSCR-NEXT: s_movk_i32 vcc_hi, 0x2000 64; FLATSCR-NEXT: s_mov_b32 s2, 0 65; FLATSCR-NEXT: scratch_store_dword off, v0, vcc_hi 66; FLATSCR-NEXT: BB0_1: ; %loadstoreloop 67; FLATSCR-NEXT: ; =>This Inner Loop Header: Depth=1 68; FLATSCR-NEXT: s_add_u32 s3, 0x3000, s2 69; FLATSCR-NEXT: s_add_i32 s2, s2, 1 70; FLATSCR-NEXT: s_cmpk_lt_u32 s2, 0x2120 71; FLATSCR-NEXT: scratch_store_byte off, v0, s3 72; FLATSCR-NEXT: s_cbranch_scc1 BB0_1 73; FLATSCR-NEXT: ; %bb.2: ; %split 74; FLATSCR-NEXT: s_movk_i32 s2, 0x2000 75; FLATSCR-NEXT: s_add_u32 s2, 0x3000, s2 76; FLATSCR-NEXT: scratch_load_dwordx2 v[0:1], off, s2 offset:208 77; FLATSCR-NEXT: s_movk_i32 s2, 0x3000 78; FLATSCR-NEXT: scratch_load_dwordx2 v[2:3], off, s2 offset:64 79; FLATSCR-NEXT: s_waitcnt vmcnt(0) 80; FLATSCR-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2 81; FLATSCR-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc 82; FLATSCR-NEXT: s_waitcnt lgkmcnt(0) 83; FLATSCR-NEXT: v_mov_b32_e32 v3, s1 84; FLATSCR-NEXT: v_mov_b32_e32 v2, s0 85; FLATSCR-NEXT: global_store_dwordx2 v[2:3], v[0:1], off 86; FLATSCR-NEXT: s_endpgm 87entry: 88 %pin.low = alloca i32, align 8192, addrspace(5) 89 %local.area = alloca [1060 x i64], align 4096, addrspace(5) 90 store volatile i32 0, i32 addrspace(5)* %pin.low 91 %local.area.cast = bitcast [1060 x i64] addrspace(5)* %local.area to i8 addrspace(5)* 92 call void @llvm.memset.p5i8.i32(i8 addrspace(5)* align 4 %local.area.cast, i8 0, i32 8480, i1 true) 93 %gep.large.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 1050 94 %gep.small.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 8 95 %load0 = load volatile i64, i64 addrspace(5)* %gep.large.offset 96 %load1 = load volatile i64, i64 addrspace(5)* %gep.small.offset 97 %add0 = add i64 %load0, %load1 98 store volatile i64 %add0, i64 addrspace(1)* %out 99 ret void 100} 101 102define void @func_local_stack_offset_uses_sp(i64 addrspace(1)* %out, i8 addrspace(1)* %in) { 103; MUBUF-LABEL: func_local_stack_offset_uses_sp: 104; MUBUF: ; %bb.0: ; %entry 105; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 106; MUBUF-NEXT: s_add_u32 s4, s32, 0x7ffc0 107; MUBUF-NEXT: s_mov_b32 s5, s33 108; MUBUF-NEXT: s_and_b32 s33, s4, 0xfff80000 109; MUBUF-NEXT: v_lshrrev_b32_e64 v3, 6, s33 110; MUBUF-NEXT: v_add_u32_e32 v3, 0x1000, v3 111; MUBUF-NEXT: v_mov_b32_e32 v4, 0 112; MUBUF-NEXT: v_add_u32_e32 v2, 64, v3 113; MUBUF-NEXT: s_mov_b32 s4, 0 114; MUBUF-NEXT: s_add_u32 s32, s32, 0x180000 115; MUBUF-NEXT: buffer_store_dword v4, off, s[0:3], s33 116; MUBUF-NEXT: BB1_1: ; %loadstoreloop 117; MUBUF-NEXT: ; =>This Inner Loop Header: Depth=1 118; MUBUF-NEXT: v_add_u32_e32 v5, s4, v3 119; MUBUF-NEXT: s_add_i32 s4, s4, 1 120; MUBUF-NEXT: s_cmpk_lt_u32 s4, 0x2120 121; MUBUF-NEXT: buffer_store_byte v4, v5, s[0:3], 0 offen 122; MUBUF-NEXT: s_cbranch_scc1 BB1_1 123; MUBUF-NEXT: ; %bb.2: ; %split 124; MUBUF-NEXT: v_lshrrev_b32_e64 v3, 6, s33 125; MUBUF-NEXT: v_add_u32_e32 v3, 0x1000, v3 126; MUBUF-NEXT: v_add_u32_e32 v3, 0x20d0, v3 127; MUBUF-NEXT: buffer_load_dword v4, v3, s[0:3], 0 offen 128; MUBUF-NEXT: buffer_load_dword v3, v3, s[0:3], 0 offen offset:4 129; MUBUF-NEXT: buffer_load_dword v5, v2, s[0:3], 0 offen 130; MUBUF-NEXT: buffer_load_dword v6, v2, s[0:3], 0 offen offset:4 131; MUBUF-NEXT: s_sub_u32 s32, s32, 0x180000 132; MUBUF-NEXT: s_mov_b32 s33, s5 133; MUBUF-NEXT: s_waitcnt vmcnt(1) 134; MUBUF-NEXT: v_add_co_u32_e32 v2, vcc, v4, v5 135; MUBUF-NEXT: s_waitcnt vmcnt(0) 136; MUBUF-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v6, vcc 137; MUBUF-NEXT: global_store_dwordx2 v[0:1], v[2:3], off 138; MUBUF-NEXT: s_waitcnt vmcnt(0) 139; MUBUF-NEXT: s_setpc_b64 s[30:31] 140; 141; FLATSCR-LABEL: func_local_stack_offset_uses_sp: 142; FLATSCR: ; %bb.0: ; %entry 143; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 144; FLATSCR-NEXT: s_add_u32 s0, s32, 0x1fff 145; FLATSCR-NEXT: s_mov_b32 s2, s33 146; FLATSCR-NEXT: s_and_b32 s33, s0, 0xffffe000 147; FLATSCR-NEXT: v_mov_b32_e32 v2, 0 148; FLATSCR-NEXT: s_mov_b32 s0, 0 149; FLATSCR-NEXT: s_add_u32 s32, s32, 0x6000 150; FLATSCR-NEXT: scratch_store_dword off, v2, s33 151; FLATSCR-NEXT: BB1_1: ; %loadstoreloop 152; FLATSCR-NEXT: ; =>This Inner Loop Header: Depth=1 153; FLATSCR-NEXT: s_add_u32 vcc_hi, s33, 0x1000 154; FLATSCR-NEXT: s_add_u32 s1, vcc_hi, s0 155; FLATSCR-NEXT: s_add_i32 s0, s0, 1 156; FLATSCR-NEXT: s_cmpk_lt_u32 s0, 0x2120 157; FLATSCR-NEXT: scratch_store_byte off, v2, s1 158; FLATSCR-NEXT: s_cbranch_scc1 BB1_1 159; FLATSCR-NEXT: ; %bb.2: ; %split 160; FLATSCR-NEXT: s_movk_i32 s0, 0x2000 161; FLATSCR-NEXT: s_add_u32 s1, s33, 0x1000 162; FLATSCR-NEXT: s_add_u32 s0, s1, s0 163; FLATSCR-NEXT: scratch_load_dwordx2 v[2:3], off, s0 offset:208 164; FLATSCR-NEXT: s_add_u32 s0, s33, 0x1000 165; FLATSCR-NEXT: scratch_load_dwordx2 v[4:5], off, s0 offset:64 166; FLATSCR-NEXT: s_sub_u32 s32, s32, 0x6000 167; FLATSCR-NEXT: s_mov_b32 s33, s2 168; FLATSCR-NEXT: s_waitcnt vmcnt(0) 169; FLATSCR-NEXT: v_add_co_u32_e32 v2, vcc, v2, v4 170; FLATSCR-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v5, vcc 171; FLATSCR-NEXT: global_store_dwordx2 v[0:1], v[2:3], off 172; FLATSCR-NEXT: s_waitcnt vmcnt(0) 173; FLATSCR-NEXT: s_setpc_b64 s[30:31] 174entry: 175 %pin.low = alloca i32, align 8192, addrspace(5) 176 %local.area = alloca [1060 x i64], align 4096, addrspace(5) 177 store volatile i32 0, i32 addrspace(5)* %pin.low 178 %local.area.cast = bitcast [1060 x i64] addrspace(5)* %local.area to i8 addrspace(5)* 179 call void @llvm.memset.p5i8.i32(i8 addrspace(5)* align 4 %local.area.cast, i8 0, i32 8480, i1 true) 180 %gep.large.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 1050 181 %gep.small.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 8 182 %load0 = load volatile i64, i64 addrspace(5)* %gep.large.offset 183 %load1 = load volatile i64, i64 addrspace(5)* %gep.small.offset 184 %add0 = add i64 %load0, %load1 185 store volatile i64 %add0, i64 addrspace(1)* %out 186 ret void 187} 188 189declare void @llvm.memset.p5i8.i32(i8 addrspace(5)* nocapture writeonly, i8, i32, i1 immarg) #0 190 191attributes #0 = { argmemonly nounwind willreturn writeonly } 192