1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 < %s | FileCheck --check-prefix=MUBUF %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --amdgpu-enable-flat-scratch < %s | FileCheck --check-prefix=FLATSCR %s
4
5; Make sure we use the correct frame offset is used with the local
6; frame area.
7;
8; %pin.low is allocated to offset 0.
9;
10; %local.area is assigned to the local frame offset by the
11; LocalStackSlotAllocation pass at offset 4096.
12;
13; The %load1 access to %gep.large.offset initially used the stack
14; pointer register and directly referenced the frame index. After
15; LocalStackSlotAllocation, it would no longer refer to a frame index
16; so eliminateFrameIndex would not adjust the access to use the
17; correct FP offset.
18
19define amdgpu_kernel void @local_stack_offset_uses_sp(i64 addrspace(1)* %out) {
20; MUBUF-LABEL: local_stack_offset_uses_sp:
21; MUBUF:       ; %bb.0: ; %entry
22; MUBUF-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x0
23; MUBUF-NEXT:    s_add_u32 flat_scratch_lo, s6, s9
24; MUBUF-NEXT:    s_addc_u32 flat_scratch_hi, s7, 0
25; MUBUF-NEXT:    s_add_u32 s0, s0, s9
26; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x3000
27; MUBUF-NEXT:    s_addc_u32 s1, s1, 0
28; MUBUF-NEXT:    v_add_u32_e32 v0, 64, v1
29; MUBUF-NEXT:    v_mov_b32_e32 v2, 0
30; MUBUF-NEXT:    v_mov_b32_e32 v3, 0x2000
31; MUBUF-NEXT:    s_mov_b32 s6, 0
32; MUBUF-NEXT:    buffer_store_dword v2, v3, s[0:3], 0 offen
33; MUBUF-NEXT:    s_waitcnt vmcnt(0)
34; MUBUF-NEXT:  BB0_1: ; %loadstoreloop
35; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=1
36; MUBUF-NEXT:    v_add_u32_e32 v3, s6, v1
37; MUBUF-NEXT:    s_add_i32 s6, s6, 1
38; MUBUF-NEXT:    s_cmpk_lt_u32 s6, 0x2120
39; MUBUF-NEXT:    buffer_store_byte v2, v3, s[0:3], 0 offen
40; MUBUF-NEXT:    s_waitcnt vmcnt(0)
41; MUBUF-NEXT:    s_cbranch_scc1 BB0_1
42; MUBUF-NEXT:  ; %bb.2: ; %split
43; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x3000
44; MUBUF-NEXT:    v_add_u32_e32 v1, 0x20d0, v1
45; MUBUF-NEXT:    buffer_load_dword v2, v1, s[0:3], 0 offen glc
46; MUBUF-NEXT:    s_waitcnt vmcnt(0)
47; MUBUF-NEXT:    buffer_load_dword v3, v1, s[0:3], 0 offen offset:4 glc
48; MUBUF-NEXT:    s_waitcnt vmcnt(0)
49; MUBUF-NEXT:    buffer_load_dword v4, v0, s[0:3], 0 offen glc
50; MUBUF-NEXT:    s_waitcnt vmcnt(0)
51; MUBUF-NEXT:    buffer_load_dword v5, v0, s[0:3], 0 offen offset:4 glc
52; MUBUF-NEXT:    s_waitcnt vmcnt(0)
53; MUBUF-NEXT:    v_add_co_u32_e32 v0, vcc, v2, v4
54; MUBUF-NEXT:    v_addc_co_u32_e32 v1, vcc, v3, v5, vcc
55; MUBUF-NEXT:    v_mov_b32_e32 v2, 0
56; MUBUF-NEXT:    s_waitcnt lgkmcnt(0)
57; MUBUF-NEXT:    global_store_dwordx2 v2, v[0:1], s[4:5]
58; MUBUF-NEXT:    s_waitcnt vmcnt(0)
59; MUBUF-NEXT:    s_endpgm
60;
61; FLATSCR-LABEL: local_stack_offset_uses_sp:
62; FLATSCR:       ; %bb.0: ; %entry
63; FLATSCR-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x0
64; FLATSCR-NEXT:    s_add_u32 flat_scratch_lo, s2, s5
65; FLATSCR-NEXT:    s_addc_u32 flat_scratch_hi, s3, 0
66; FLATSCR-NEXT:    v_mov_b32_e32 v0, 0
67; FLATSCR-NEXT:    s_movk_i32 vcc_hi, 0x2000
68; FLATSCR-NEXT:    s_mov_b32 s2, 0
69; FLATSCR-NEXT:    scratch_store_dword off, v0, vcc_hi
70; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
71; FLATSCR-NEXT:  BB0_1: ; %loadstoreloop
72; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=1
73; FLATSCR-NEXT:    s_add_u32 s3, 0x3000, s2
74; FLATSCR-NEXT:    s_add_i32 s2, s2, 1
75; FLATSCR-NEXT:    s_cmpk_lt_u32 s2, 0x2120
76; FLATSCR-NEXT:    scratch_store_byte off, v0, s3
77; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
78; FLATSCR-NEXT:    s_cbranch_scc1 BB0_1
79; FLATSCR-NEXT:  ; %bb.2: ; %split
80; FLATSCR-NEXT:    s_movk_i32 s2, 0x2000
81; FLATSCR-NEXT:    s_add_u32 s2, 0x3000, s2
82; FLATSCR-NEXT:    scratch_load_dwordx2 v[0:1], off, s2 offset:208 glc
83; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
84; FLATSCR-NEXT:    s_movk_i32 s2, 0x3000
85; FLATSCR-NEXT:    scratch_load_dwordx2 v[2:3], off, s2 offset:64 glc
86; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
87; FLATSCR-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v2
88; FLATSCR-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
89; FLATSCR-NEXT:    v_mov_b32_e32 v2, 0
90; FLATSCR-NEXT:    s_waitcnt lgkmcnt(0)
91; FLATSCR-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
92; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
93; FLATSCR-NEXT:    s_endpgm
94entry:
95  %pin.low = alloca i32, align 8192, addrspace(5)
96  %local.area = alloca [1060 x i64], align 4096, addrspace(5)
97  store volatile i32 0, i32 addrspace(5)* %pin.low
98  %local.area.cast = bitcast [1060 x i64] addrspace(5)* %local.area to i8 addrspace(5)*
99  call void @llvm.memset.p5i8.i32(i8 addrspace(5)* align 4 %local.area.cast, i8 0, i32 8480, i1 true)
100  %gep.large.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 1050
101  %gep.small.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 8
102  %load0 = load volatile i64, i64 addrspace(5)* %gep.large.offset
103  %load1 = load volatile i64, i64 addrspace(5)* %gep.small.offset
104  %add0 = add i64 %load0, %load1
105  store volatile i64 %add0, i64 addrspace(1)* %out
106  ret void
107}
108
109define void @func_local_stack_offset_uses_sp(i64 addrspace(1)* %out) {
110; MUBUF-LABEL: func_local_stack_offset_uses_sp:
111; MUBUF:       ; %bb.0: ; %entry
112; MUBUF-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
113; MUBUF-NEXT:    s_mov_b32 s5, s33
114; MUBUF-NEXT:    s_add_u32 s33, s32, 0x7ffc0
115; MUBUF-NEXT:    s_and_b32 s33, s33, 0xfff80000
116; MUBUF-NEXT:    v_lshrrev_b32_e64 v3, 6, s33
117; MUBUF-NEXT:    v_add_u32_e32 v3, 0x1000, v3
118; MUBUF-NEXT:    v_mov_b32_e32 v4, 0
119; MUBUF-NEXT:    v_add_u32_e32 v2, 64, v3
120; MUBUF-NEXT:    s_mov_b32 s4, 0
121; MUBUF-NEXT:    s_add_u32 s32, s32, 0x180000
122; MUBUF-NEXT:    buffer_store_dword v4, off, s[0:3], s33
123; MUBUF-NEXT:    s_waitcnt vmcnt(0)
124; MUBUF-NEXT:  BB1_1: ; %loadstoreloop
125; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=1
126; MUBUF-NEXT:    v_add_u32_e32 v5, s4, v3
127; MUBUF-NEXT:    s_add_i32 s4, s4, 1
128; MUBUF-NEXT:    s_cmpk_lt_u32 s4, 0x2120
129; MUBUF-NEXT:    buffer_store_byte v4, v5, s[0:3], 0 offen
130; MUBUF-NEXT:    s_waitcnt vmcnt(0)
131; MUBUF-NEXT:    s_cbranch_scc1 BB1_1
132; MUBUF-NEXT:  ; %bb.2: ; %split
133; MUBUF-NEXT:    v_lshrrev_b32_e64 v3, 6, s33
134; MUBUF-NEXT:    v_add_u32_e32 v3, 0x1000, v3
135; MUBUF-NEXT:    v_add_u32_e32 v3, 0x20d0, v3
136; MUBUF-NEXT:    buffer_load_dword v4, v3, s[0:3], 0 offen glc
137; MUBUF-NEXT:    s_waitcnt vmcnt(0)
138; MUBUF-NEXT:    buffer_load_dword v5, v3, s[0:3], 0 offen offset:4 glc
139; MUBUF-NEXT:    s_waitcnt vmcnt(0)
140; MUBUF-NEXT:    buffer_load_dword v6, v2, s[0:3], 0 offen glc
141; MUBUF-NEXT:    s_waitcnt vmcnt(0)
142; MUBUF-NEXT:    buffer_load_dword v7, v2, s[0:3], 0 offen offset:4 glc
143; MUBUF-NEXT:    s_waitcnt vmcnt(0)
144; MUBUF-NEXT:    s_sub_u32 s32, s32, 0x180000
145; MUBUF-NEXT:    s_mov_b32 s33, s5
146; MUBUF-NEXT:    v_add_co_u32_e32 v2, vcc, v4, v6
147; MUBUF-NEXT:    v_addc_co_u32_e32 v3, vcc, v5, v7, vcc
148; MUBUF-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off
149; MUBUF-NEXT:    s_waitcnt vmcnt(0)
150; MUBUF-NEXT:    s_setpc_b64 s[30:31]
151;
152; FLATSCR-LABEL: func_local_stack_offset_uses_sp:
153; FLATSCR:       ; %bb.0: ; %entry
154; FLATSCR-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
155; FLATSCR-NEXT:    s_mov_b32 s2, s33
156; FLATSCR-NEXT:    s_add_u32 s33, s32, 0x1fff
157; FLATSCR-NEXT:    s_and_b32 s33, s33, 0xffffe000
158; FLATSCR-NEXT:    v_mov_b32_e32 v2, 0
159; FLATSCR-NEXT:    s_mov_b32 s0, 0
160; FLATSCR-NEXT:    s_add_u32 s32, s32, 0x6000
161; FLATSCR-NEXT:    scratch_store_dword off, v2, s33
162; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
163; FLATSCR-NEXT:  BB1_1: ; %loadstoreloop
164; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=1
165; FLATSCR-NEXT:    s_add_u32 vcc_hi, s33, 0x1000
166; FLATSCR-NEXT:    s_add_u32 s1, vcc_hi, s0
167; FLATSCR-NEXT:    s_add_i32 s0, s0, 1
168; FLATSCR-NEXT:    s_cmpk_lt_u32 s0, 0x2120
169; FLATSCR-NEXT:    scratch_store_byte off, v2, s1
170; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
171; FLATSCR-NEXT:    s_cbranch_scc1 BB1_1
172; FLATSCR-NEXT:  ; %bb.2: ; %split
173; FLATSCR-NEXT:    s_movk_i32 s0, 0x2000
174; FLATSCR-NEXT:    s_add_u32 s1, s33, 0x1000
175; FLATSCR-NEXT:    s_add_u32 s0, s1, s0
176; FLATSCR-NEXT:    scratch_load_dwordx2 v[2:3], off, s0 offset:208 glc
177; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
178; FLATSCR-NEXT:    s_add_u32 s0, s33, 0x1000
179; FLATSCR-NEXT:    scratch_load_dwordx2 v[4:5], off, s0 offset:64 glc
180; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
181; FLATSCR-NEXT:    s_sub_u32 s32, s32, 0x6000
182; FLATSCR-NEXT:    s_mov_b32 s33, s2
183; FLATSCR-NEXT:    v_add_co_u32_e32 v2, vcc, v2, v4
184; FLATSCR-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v5, vcc
185; FLATSCR-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off
186; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
187; FLATSCR-NEXT:    s_setpc_b64 s[30:31]
188entry:
189  %pin.low = alloca i32, align 8192, addrspace(5)
190  %local.area = alloca [1060 x i64], align 4096, addrspace(5)
191  store volatile i32 0, i32 addrspace(5)* %pin.low
192  %local.area.cast = bitcast [1060 x i64] addrspace(5)* %local.area to i8 addrspace(5)*
193  call void @llvm.memset.p5i8.i32(i8 addrspace(5)* align 4 %local.area.cast, i8 0, i32 8480, i1 true)
194  %gep.large.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 1050
195  %gep.small.offset = getelementptr inbounds [1060 x i64], [1060 x i64] addrspace(5)* %local.area, i64 0, i64 8
196  %load0 = load volatile i64, i64 addrspace(5)* %gep.large.offset
197  %load1 = load volatile i64, i64 addrspace(5)* %gep.small.offset
198  %add0 = add i64 %load0, %load1
199  store volatile i64 %add0, i64 addrspace(1)* %out
200  ret void
201}
202
203define amdgpu_kernel void @local_stack_offset_uses_sp_flat(<3 x i64> addrspace(1)* %out) {
204; MUBUF-LABEL: local_stack_offset_uses_sp_flat:
205; MUBUF:       ; %bb.0: ; %entry
206; MUBUF-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x0
207; MUBUF-NEXT:    s_add_u32 flat_scratch_lo, s6, s9
208; MUBUF-NEXT:    s_addc_u32 flat_scratch_hi, s7, 0
209; MUBUF-NEXT:    s_add_u32 s0, s0, s9
210; MUBUF-NEXT:    s_addc_u32 s1, s1, 0
211; MUBUF-NEXT:    v_mov_b32_e32 v0, 0x4000
212; MUBUF-NEXT:    v_mov_b32_e32 v1, 0
213; MUBUF-NEXT:    v_mov_b32_e32 v2, 0x2000
214; MUBUF-NEXT:    s_mov_b32 s6, 0
215; MUBUF-NEXT:    buffer_store_dword v1, v2, s[0:3], 0 offen
216; MUBUF-NEXT:    s_waitcnt vmcnt(0)
217; MUBUF-NEXT:  BB2_1: ; %loadstoreloop
218; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=1
219; MUBUF-NEXT:    v_add_u32_e32 v2, s6, v0
220; MUBUF-NEXT:    s_add_i32 s6, s6, 1
221; MUBUF-NEXT:    s_cmpk_lt_u32 s6, 0x2120
222; MUBUF-NEXT:    buffer_store_byte v1, v2, s[0:3], 0 offen
223; MUBUF-NEXT:    s_waitcnt vmcnt(0)
224; MUBUF-NEXT:    s_cbranch_scc1 BB2_1
225; MUBUF-NEXT:  ; %bb.2: ; %split
226; MUBUF-NEXT:    v_mov_b32_e32 v0, 0x4000
227; MUBUF-NEXT:    v_or_b32_e32 v2, 0x12d4, v0
228; MUBUF-NEXT:    buffer_load_dword v5, v2, s[0:3], 0 offen glc
229; MUBUF-NEXT:    s_waitcnt vmcnt(0)
230; MUBUF-NEXT:    v_or_b32_e32 v2, 0x12d0, v0
231; MUBUF-NEXT:    buffer_load_dword v4, v2, s[0:3], 0 offen glc
232; MUBUF-NEXT:    s_waitcnt vmcnt(0)
233; MUBUF-NEXT:    v_or_b32_e32 v1, 0x12c0, v0
234; MUBUF-NEXT:    v_or_b32_e32 v2, 0x12c4, v0
235; MUBUF-NEXT:    buffer_load_dword v6, v2, s[0:3], 0 offen glc
236; MUBUF-NEXT:    s_waitcnt vmcnt(0)
237; MUBUF-NEXT:    buffer_load_dword v7, v1, s[0:3], 0 offen glc
238; MUBUF-NEXT:    s_waitcnt vmcnt(0)
239; MUBUF-NEXT:    v_or_b32_e32 v1, 0x12cc, v0
240; MUBUF-NEXT:    v_or_b32_e32 v0, 0x12c8, v0
241; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
242; MUBUF-NEXT:    buffer_load_dword v1, v1, s[0:3], 0 offen glc
243; MUBUF-NEXT:    s_waitcnt vmcnt(0)
244; MUBUF-NEXT:    v_mov_b32_e32 v12, 0
245; MUBUF-NEXT:    buffer_load_dword v0, v0, s[0:3], 0 offen glc
246; MUBUF-NEXT:    s_waitcnt vmcnt(0)
247; MUBUF-NEXT:    buffer_load_dword v8, v13, s[0:3], 0 offen glc
248; MUBUF-NEXT:    s_waitcnt vmcnt(0)
249; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
250; MUBUF-NEXT:    buffer_load_dword v9, v13, s[0:3], 0 offen offset:4 glc
251; MUBUF-NEXT:    s_waitcnt vmcnt(0)
252; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
253; MUBUF-NEXT:    buffer_load_dword v2, v13, s[0:3], 0 offen offset:8 glc
254; MUBUF-NEXT:    s_waitcnt vmcnt(0)
255; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
256; MUBUF-NEXT:    buffer_load_dword v3, v13, s[0:3], 0 offen offset:12 glc
257; MUBUF-NEXT:    s_waitcnt vmcnt(0)
258; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
259; MUBUF-NEXT:    buffer_load_dword v10, v13, s[0:3], 0 offen offset:16 glc
260; MUBUF-NEXT:    s_waitcnt vmcnt(0)
261; MUBUF-NEXT:    v_mov_b32_e32 v13, 0x4000
262; MUBUF-NEXT:    buffer_load_dword v11, v13, s[0:3], 0 offen offset:20 glc
263; MUBUF-NEXT:    s_waitcnt vmcnt(0)
264; MUBUF-NEXT:    v_add_co_u32_e32 v2, vcc, v0, v2
265; MUBUF-NEXT:    v_addc_co_u32_e32 v3, vcc, v1, v3, vcc
266; MUBUF-NEXT:    v_add_co_u32_e32 v0, vcc, v7, v8
267; MUBUF-NEXT:    v_addc_co_u32_e32 v1, vcc, v6, v9, vcc
268; MUBUF-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v10
269; MUBUF-NEXT:    v_addc_co_u32_e32 v5, vcc, v5, v11, vcc
270; MUBUF-NEXT:    s_waitcnt lgkmcnt(0)
271; MUBUF-NEXT:    global_store_dwordx2 v12, v[4:5], s[4:5] offset:16
272; MUBUF-NEXT:    s_waitcnt vmcnt(0)
273; MUBUF-NEXT:    global_store_dwordx4 v12, v[0:3], s[4:5]
274; MUBUF-NEXT:    s_waitcnt vmcnt(0)
275; MUBUF-NEXT:    s_endpgm
276;
277; FLATSCR-LABEL: local_stack_offset_uses_sp_flat:
278; FLATSCR:       ; %bb.0: ; %entry
279; FLATSCR-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x0
280; FLATSCR-NEXT:    s_add_u32 flat_scratch_lo, s2, s5
281; FLATSCR-NEXT:    s_addc_u32 flat_scratch_hi, s3, 0
282; FLATSCR-NEXT:    s_add_u32 s2, 16, 0x4000
283; FLATSCR-NEXT:    v_mov_b32_e32 v0, 0
284; FLATSCR-NEXT:    s_movk_i32 vcc_hi, 0x2000
285; FLATSCR-NEXT:    s_mov_b32 s3, 0
286; FLATSCR-NEXT:    scratch_store_dword off, v0, vcc_hi
287; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
288; FLATSCR-NEXT:  BB2_1: ; %loadstoreloop
289; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=1
290; FLATSCR-NEXT:    s_add_u32 s4, 0x4000, s3
291; FLATSCR-NEXT:    s_add_i32 s3, s3, 1
292; FLATSCR-NEXT:    s_cmpk_lt_u32 s3, 0x2120
293; FLATSCR-NEXT:    scratch_store_byte off, v0, s4
294; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
295; FLATSCR-NEXT:    s_cbranch_scc1 BB2_1
296; FLATSCR-NEXT:  ; %bb.2: ; %split
297; FLATSCR-NEXT:    s_movk_i32 s3, 0x1000
298; FLATSCR-NEXT:    s_add_u32 s3, 0x4000, s3
299; FLATSCR-NEXT:    scratch_load_dwordx2 v[8:9], off, s3 offset:720 glc
300; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
301; FLATSCR-NEXT:    scratch_load_dwordx4 v[0:3], off, s3 offset:704 glc
302; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
303; FLATSCR-NEXT:    scratch_load_dwordx2 v[10:11], off, s2 glc
304; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
305; FLATSCR-NEXT:    scratch_load_dwordx4 v[4:7], off, s2 offset:-16 glc
306; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
307; FLATSCR-NEXT:    v_mov_b32_e32 v12, 0
308; FLATSCR-NEXT:    v_add_co_u32_e32 v2, vcc, v2, v6
309; FLATSCR-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v7, vcc
310; FLATSCR-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v4
311; FLATSCR-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v5, vcc
312; FLATSCR-NEXT:    v_add_co_u32_e32 v4, vcc, v8, v10
313; FLATSCR-NEXT:    v_addc_co_u32_e32 v5, vcc, v9, v11, vcc
314; FLATSCR-NEXT:    s_waitcnt lgkmcnt(0)
315; FLATSCR-NEXT:    global_store_dwordx2 v12, v[4:5], s[0:1] offset:16
316; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
317; FLATSCR-NEXT:    global_store_dwordx4 v12, v[0:3], s[0:1]
318; FLATSCR-NEXT:    s_waitcnt vmcnt(0)
319; FLATSCR-NEXT:    s_endpgm
320entry:
321  %pin.low = alloca i32, align 1024, addrspace(5)
322  %local.area = alloca [160 x <3 x i64>], align 8192, addrspace(5)
323  store volatile i32 0, i32 addrspace(5)* %pin.low
324  %local.area.cast = bitcast [160 x <3 x i64>] addrspace(5)* %local.area to i8 addrspace(5)*
325  call void @llvm.memset.p5i8.i32(i8 addrspace(5)* align 4 %local.area.cast, i8 0, i32 8480, i1 true)
326  %gep.large.offset = getelementptr inbounds [160 x <3 x i64>], [160 x <3 x i64>] addrspace(5)* %local.area, i64 0, i64 150
327  %gep.small.offset = getelementptr inbounds [160 x <3 x i64>], [160 x <3 x i64>] addrspace(5)* %local.area, i64 0, i64 0
328  %load0 = load volatile <3 x i64>, <3 x i64> addrspace(5)* %gep.large.offset
329  %load1 = load volatile <3 x i64>, <3 x i64> addrspace(5)* %gep.small.offset
330  %add0 = add <3 x i64> %load0, %load1
331  store volatile <3 x i64> %add0, <3 x i64> addrspace(1)* %out
332  ret void
333}
334
335declare void @llvm.memset.p5i8.i32(i8 addrspace(5)* nocapture writeonly, i8, i32, i1 immarg) #0
336
337attributes #0 = { argmemonly nounwind willreturn writeonly }
338