1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefixes=GCN,SI,SICIVI,FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-enable-ds128 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefixes=GCN,SICIVI,GFX89,FUNC %s 3; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-enable-ds128 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefixes=GCN,GFX9,GFX89,FUNC %s 4; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=EG -check-prefix=FUNC %s 5 6; Testing for ds_read/write_b128 7; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -allow-deprecated-dag-overlap -check-prefixes=CIVI,FUNC %s 8; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -allow-deprecated-dag-overlap -check-prefixes=CIVI,FUNC %s 9 10; FUNC-LABEL: {{^}}local_load_i16: 11; GFX9-NOT: m0 12; SICIVI: s_mov_b32 m0 13 14; GCN: ds_read_u16 v{{[0-9]+}} 15 16; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 17; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 18; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 19; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 20; EG: LDS_SHORT_WRITE {{\*?}} [[TO]], [[DATA]] 21define amdgpu_kernel void @local_load_i16(i16 addrspace(3)* %out, i16 addrspace(3)* %in) { 22entry: 23 %ld = load i16, i16 addrspace(3)* %in 24 store i16 %ld, i16 addrspace(3)* %out 25 ret void 26} 27 28; FUNC-LABEL: {{^}}local_load_v2i16: 29; GFX9-NOT: m0 30; SICIVI: s_mov_b32 m0 31 32; GCN: ds_read_b32 33 34; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 35; EG: LDS_READ_RET {{.*}} [[FROM]] 36; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 37; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 38; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 39define amdgpu_kernel void @local_load_v2i16(<2 x i16> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) { 40entry: 41 %ld = load <2 x i16>, <2 x i16> addrspace(3)* %in 42 store <2 x i16> %ld, <2 x i16> addrspace(3)* %out 43 ret void 44} 45 46; FUNC-LABEL: {{^}}local_load_v3i16: 47; GFX9-NOT: m0 48; SICIVI: s_mov_b32 m0 49 50; GCN: ds_read_b64 51; GCN-DAG: ds_write_b32 52; GCN-DAG: ds_write_b16 53 54; EG-DAG: LDS_USHORT_READ_RET 55; EG-DAG: LDS_USHORT_READ_RET 56define amdgpu_kernel void @local_load_v3i16(<3 x i16> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) { 57entry: 58 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in 59 store <3 x i16> %ld, <3 x i16> addrspace(3)* %out 60 ret void 61} 62 63; FUNC-LABEL: {{^}}local_load_v4i16: 64; GFX9-NOT: m0 65; SICIVI: s_mov_b32 m0 66 67; GCN: ds_read_b64 68 69; EG: LDS_READ_RET 70; EG: LDS_READ_RET 71define amdgpu_kernel void @local_load_v4i16(<4 x i16> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) { 72entry: 73 %ld = load <4 x i16>, <4 x i16> addrspace(3)* %in 74 store <4 x i16> %ld, <4 x i16> addrspace(3)* %out 75 ret void 76} 77 78; FUNC-LABEL: {{^}}local_load_v8i16: 79; GFX9-NOT: m0 80; SICIVI: s_mov_b32 m0 81 82; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 83 84; EG: LDS_READ_RET 85; EG: LDS_READ_RET 86; EG: LDS_READ_RET 87; EG: LDS_READ_RET 88define amdgpu_kernel void @local_load_v8i16(<8 x i16> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) { 89entry: 90 %ld = load <8 x i16>, <8 x i16> addrspace(3)* %in 91 store <8 x i16> %ld, <8 x i16> addrspace(3)* %out 92 ret void 93} 94 95; FUNC-LABEL: {{^}}local_load_v16i16: 96; GFX9-NOT: m0 97; SICIVI: s_mov_b32 m0 98 99; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}} 100; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 101 102 103; EG: LDS_READ_RET 104; EG: LDS_READ_RET 105; EG: LDS_READ_RET 106; EG: LDS_READ_RET 107 108; EG: LDS_READ_RET 109; EG: LDS_READ_RET 110; EG: LDS_READ_RET 111; EG: LDS_READ_RET 112define amdgpu_kernel void @local_load_v16i16(<16 x i16> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) { 113entry: 114 %ld = load <16 x i16>, <16 x i16> addrspace(3)* %in 115 store <16 x i16> %ld, <16 x i16> addrspace(3)* %out 116 ret void 117} 118 119; FUNC-LABEL: {{^}}local_zextload_i16_to_i32: 120; GFX9-NOT: m0 121; SICIVI: s_mov_b32 m0 122 123; GCN: ds_read_u16 124; GCN: ds_write_b32 125 126; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 127; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 128; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 129; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 130; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 131define amdgpu_kernel void @local_zextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 { 132 %a = load i16, i16 addrspace(3)* %in 133 %ext = zext i16 %a to i32 134 store i32 %ext, i32 addrspace(3)* %out 135 ret void 136} 137 138; FUNC-LABEL: {{^}}local_sextload_i16_to_i32: 139; GCN-NOT: s_wqm_b64 140 141; GFX9-NOT: m0 142; SICIVI: s_mov_b32 m0 143 144; GCN: ds_read_i16 145 146; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 147; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 148; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP 149; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 150; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal 151; EG: 16 152; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 153define amdgpu_kernel void @local_sextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 { 154 %a = load i16, i16 addrspace(3)* %in 155 %ext = sext i16 %a to i32 156 store i32 %ext, i32 addrspace(3)* %out 157 ret void 158} 159 160; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i32: 161; GFX9-NOT: m0 162; SICIVI: s_mov_b32 m0 163 164; GCN: ds_read_u16 165 166; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 167; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 168; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 169; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 170; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 171define amdgpu_kernel void @local_zextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 { 172 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in 173 %ext = zext <1 x i16> %load to <1 x i32> 174 store <1 x i32> %ext, <1 x i32> addrspace(3)* %out 175 ret void 176} 177 178; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i32: 179; GFX9-NOT: m0 180; SICIVI: s_mov_b32 m0 181 182; GCN: ds_read_i16 183 184; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 185; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 186; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP 187; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 188; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal 189; EG: 16 190; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 191define amdgpu_kernel void @local_sextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 { 192 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in 193 %ext = sext <1 x i16> %load to <1 x i32> 194 store <1 x i32> %ext, <1 x i32> addrspace(3)* %out 195 ret void 196} 197 198; FUNC-LABEL: {{^}}local_zextload_v2i16_to_v2i32: 199; GCN-NOT: s_wqm_b64 200; GFX9-NOT: m0 201; SICIVI: s_mov_b32 m0 202 203; GCN: ds_read_b32 204 205; EG: LDS_READ_RET 206define amdgpu_kernel void @local_zextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 { 207 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in 208 %ext = zext <2 x i16> %load to <2 x i32> 209 store <2 x i32> %ext, <2 x i32> addrspace(3)* %out 210 ret void 211} 212 213; FUNC-LABEL: {{^}}local_sextload_v2i16_to_v2i32: 214; GCN-NOT: s_wqm_b64 215; GFX9-NOT: m0 216; SICIVI: s_mov_b32 m0 217 218; GCN: ds_read_b32 219 220; EG: LDS_READ_RET 221; EG: BFE_INT 222; EG: BFE_INT 223define amdgpu_kernel void @local_sextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 { 224 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in 225 %ext = sext <2 x i16> %load to <2 x i32> 226 store <2 x i32> %ext, <2 x i32> addrspace(3)* %out 227 ret void 228} 229 230; FUNC-LABEL: {{^}}local_local_zextload_v3i16_to_v3i32: 231; GFX9-NOT: m0 232; SICIVI: s_mov_b32 m0 233 234; GCN: ds_read_b64 235; GCN-DAG: ds_write_b32 236; GCN-DAG: ds_write_b64 237 238; EG: LDS_USHORT_READ_RET 239; EG: LDS_USHORT_READ_RET 240; EG: LDS_USHORT_READ_RET 241define amdgpu_kernel void @local_local_zextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) { 242entry: 243 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in 244 %ext = zext <3 x i16> %ld to <3 x i32> 245 store <3 x i32> %ext, <3 x i32> addrspace(3)* %out 246 ret void 247} 248 249; FUNC-LABEL: {{^}}local_local_sextload_v3i16_to_v3i32: 250; GFX9-NOT: m0 251; SICIVI: s_mov_b32 m0 252 253; GCN: ds_read_b64 254; GCN-DAG: ds_write_b32 255; GCN-DAG: ds_write_b64 256 257; EG: LDS_USHORT_READ_RET 258; EG: LDS_USHORT_READ_RET 259; EG: LDS_USHORT_READ_RET 260; EG-DAG: BFE_INT 261; EG-DAG: BFE_INT 262; EG-DAG: BFE_INT 263define amdgpu_kernel void @local_local_sextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) { 264entry: 265 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in 266 %ext = sext <3 x i16> %ld to <3 x i32> 267 store <3 x i32> %ext, <3 x i32> addrspace(3)* %out 268 ret void 269} 270 271; FUNC-LABEL: {{^}}local_local_zextload_v4i16_to_v4i32: 272; GCN-NOT: s_wqm_b64 273; GFX9-NOT: m0 274; SICIVI: s_mov_b32 m0 275 276; GCN: ds_read_b64 277 278; EG: LDS_READ_RET 279; EG: LDS_READ_RET 280define amdgpu_kernel void @local_local_zextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 { 281 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in 282 %ext = zext <4 x i16> %load to <4 x i32> 283 store <4 x i32> %ext, <4 x i32> addrspace(3)* %out 284 ret void 285} 286 287; FUNC-LABEL: {{^}}local_sextload_v4i16_to_v4i32: 288; GCN-NOT: s_wqm_b64 289; GFX9-NOT: m0 290; SICIVI: s_mov_b32 m0 291 292; GCN: ds_read_b64 293 294; EG: LDS_READ_RET 295; EG: LDS_READ_RET 296; EG-DAG: BFE_INT 297; EG-DAG: BFE_INT 298; EG-DAG: BFE_INT 299; EG-DAG: BFE_INT 300define amdgpu_kernel void @local_sextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 { 301 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in 302 %ext = sext <4 x i16> %load to <4 x i32> 303 store <4 x i32> %ext, <4 x i32> addrspace(3)* %out 304 ret void 305} 306 307; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i32: 308; GFX9-NOT: m0 309; SICIVI: s_mov_b32 m0 310 311; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 312 313; EG: LDS_READ_RET 314; EG: LDS_READ_RET 315; EG: LDS_READ_RET 316; EG: LDS_READ_RET 317define amdgpu_kernel void @local_zextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 { 318 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in 319 %ext = zext <8 x i16> %load to <8 x i32> 320 store <8 x i32> %ext, <8 x i32> addrspace(3)* %out 321 ret void 322} 323 324; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i32: 325; GFX9-NOT: m0 326; SICIVI: s_mov_b32 m0 327 328; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 329 330; EG: LDS_READ_RET 331; EG: LDS_READ_RET 332; EG: LDS_READ_RET 333; EG: LDS_READ_RET 334; EG-DAG: BFE_INT 335; EG-DAG: BFE_INT 336; EG-DAG: BFE_INT 337; EG-DAG: BFE_INT 338; EG-DAG: BFE_INT 339; EG-DAG: BFE_INT 340; EG-DAG: BFE_INT 341; EG-DAG: BFE_INT 342define amdgpu_kernel void @local_sextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 { 343 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in 344 %ext = sext <8 x i16> %load to <8 x i32> 345 store <8 x i32> %ext, <8 x i32> addrspace(3)* %out 346 ret void 347} 348 349; FUNC-LABEL: {{^}}local_zextload_v16i16_to_v16i32: 350; GFX9-NOT: m0 351; SICIVI: s_mov_b32 m0 352 353; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 354; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}} 355 356; GCN: ds_write2_b64 357; GCN: ds_write2_b64 358; GCN: ds_write2_b64 359; GCN: ds_write2_b64 360 361; EG: LDS_READ_RET 362; EG: LDS_READ_RET 363; EG: LDS_READ_RET 364; EG: LDS_READ_RET 365; EG: LDS_READ_RET 366; EG: LDS_READ_RET 367; EG: LDS_READ_RET 368; EG: LDS_READ_RET 369define amdgpu_kernel void @local_zextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 { 370 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in 371 %ext = zext <16 x i16> %load to <16 x i32> 372 store <16 x i32> %ext, <16 x i32> addrspace(3)* %out 373 ret void 374} 375 376; FUNC-LABEL: {{^}}local_sextload_v16i16_to_v16i32: 377; GFX9-NOT: m0 378; SICIVI: s_mov_b32 m0 379 380 381; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 382; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}} 383 384; EG: LDS_READ_RET 385; EG: LDS_READ_RET 386; EG: LDS_READ_RET 387; EG: LDS_READ_RET 388; EG: LDS_READ_RET 389; EG: LDS_READ_RET 390; EG: LDS_READ_RET 391; EG: LDS_READ_RET 392; EG-DAG: BFE_INT 393; EG-DAG: BFE_INT 394; EG-DAG: BFE_INT 395; EG-DAG: BFE_INT 396; EG-DAG: BFE_INT 397; EG-DAG: BFE_INT 398; EG-DAG: BFE_INT 399; EG-DAG: BFE_INT 400; EG-DAG: BFE_INT 401; EG-DAG: BFE_INT 402; EG-DAG: BFE_INT 403; EG-DAG: BFE_INT 404; EG-DAG: BFE_INT 405; EG-DAG: BFE_INT 406; EG-DAG: BFE_INT 407; EG-DAG: BFE_INT 408define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 { 409 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in 410 %ext = sext <16 x i16> %load to <16 x i32> 411 store <16 x i32> %ext, <16 x i32> addrspace(3)* %out 412 ret void 413} 414 415; FUNC-LABEL: {{^}}local_zextload_v32i16_to_v32i32: 416; GFX9-NOT: m0 417; SICIVI: s_mov_b32 m0 418 419; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 420; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3 421; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5 422; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7 423 424; EG: LDS_READ_RET 425; EG: LDS_READ_RET 426; EG: LDS_READ_RET 427; EG: LDS_READ_RET 428; EG: LDS_READ_RET 429; EG: LDS_READ_RET 430; EG: LDS_READ_RET 431; EG: LDS_READ_RET 432; EG: LDS_READ_RET 433; EG: LDS_READ_RET 434; EG: LDS_READ_RET 435; EG: LDS_READ_RET 436; EG: LDS_READ_RET 437; EG: LDS_READ_RET 438; EG: LDS_READ_RET 439; EG: LDS_READ_RET 440define amdgpu_kernel void @local_zextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 { 441 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in 442 %ext = zext <32 x i16> %load to <32 x i32> 443 store <32 x i32> %ext, <32 x i32> addrspace(3)* %out 444 ret void 445} 446 447; FUNC-LABEL: {{^}}local_sextload_v32i16_to_v32i32: 448; GFX9-NOT: m0 449; SICIVI: s_mov_b32 m0 450 451; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}} 452; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5 453; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 454; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7 455; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:14 offset1:15 456; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:12 offset1:13 457; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:10 offset1:11 458; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:8 offset1:9 459; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:6 offset1:7 460; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:4 offset1:5 461; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3 462; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset1:1 463 464; EG: LDS_READ_RET 465; EG: LDS_READ_RET 466; EG: LDS_READ_RET 467; EG: LDS_READ_RET 468; EG: LDS_READ_RET 469; EG: LDS_READ_RET 470; EG: LDS_READ_RET 471; EG: LDS_READ_RET 472; EG: LDS_READ_RET 473; EG: LDS_READ_RET 474; EG: LDS_READ_RET 475; EG: LDS_READ_RET 476; EG: LDS_READ_RET 477; EG: LDS_READ_RET 478; EG: LDS_READ_RET 479; EG: LDS_READ_RET 480define amdgpu_kernel void @local_sextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 { 481 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in 482 %ext = sext <32 x i16> %load to <32 x i32> 483 store <32 x i32> %ext, <32 x i32> addrspace(3)* %out 484 ret void 485} 486 487; FUNC-LABEL: {{^}}local_zextload_v64i16_to_v64i32: 488; GFX9-NOT: m0 489; SICIVI: s_mov_b32 m0 490 491; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:14 offset1:15 492; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}} 493; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3 494; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5 495; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7 496; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:8 offset1:9 497; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:12 offset1:13 498; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:10 offset1:11 499; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:30 offset1:31 500; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:28 offset1:29 501; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:26 offset1:27 502; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:24 offset1:25 503; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:22 offset1:23 504; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:20 offset1:21 505; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:18 offset1:19 506; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:16 offset1:17 507; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:14 offset1:15 508; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:12 offset1:13 509; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:10 offset1:11 510; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:8 offset1:9 511; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:6 offset1:7 512; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:4 offset1:5 513; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3 514; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset1:1 515 516; EG: LDS_READ_RET 517; EG: LDS_READ_RET 518; EG: LDS_READ_RET 519; EG: LDS_READ_RET 520; EG: LDS_READ_RET 521; EG: LDS_READ_RET 522; EG: LDS_READ_RET 523; EG: LDS_READ_RET 524; EG: LDS_READ_RET 525; EG: LDS_READ_RET 526; EG: LDS_READ_RET 527; EG: LDS_READ_RET 528; EG: LDS_READ_RET 529; EG: LDS_READ_RET 530; EG: LDS_READ_RET 531; EG: LDS_READ_RET 532; EG: LDS_READ_RET 533; EG: LDS_READ_RET 534; EG: LDS_READ_RET 535; EG: LDS_READ_RET 536; EG: LDS_READ_RET 537; EG: LDS_READ_RET 538; EG: LDS_READ_RET 539; EG: LDS_READ_RET 540; EG: LDS_READ_RET 541; EG: LDS_READ_RET 542; EG: LDS_READ_RET 543; EG: LDS_READ_RET 544; EG: LDS_READ_RET 545; EG: LDS_READ_RET 546; EG: LDS_READ_RET 547; EG: LDS_READ_RET 548define amdgpu_kernel void @local_zextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 { 549 %load = load <64 x i16>, <64 x i16> addrspace(3)* %in 550 %ext = zext <64 x i16> %load to <64 x i32> 551 store <64 x i32> %ext, <64 x i32> addrspace(3)* %out 552 ret void 553} 554 555; FUNC-LABEL: {{^}}local_sextload_v64i16_to_v64i32: 556; GFX9-NOT: m0 557; SICIVI: s_mov_b32 m0 558 559; EG: LDS_READ_RET 560; EG: LDS_READ_RET 561; EG: LDS_READ_RET 562; EG: LDS_READ_RET 563; EG: LDS_READ_RET 564; EG: LDS_READ_RET 565; EG: LDS_READ_RET 566; EG: LDS_READ_RET 567; EG: LDS_READ_RET 568; EG: LDS_READ_RET 569; EG: LDS_READ_RET 570; EG: LDS_READ_RET 571; EG: LDS_READ_RET 572; EG: LDS_READ_RET 573; EG: LDS_READ_RET 574; EG: LDS_READ_RET 575; EG: LDS_READ_RET 576; EG: LDS_READ_RET 577; EG: LDS_READ_RET 578; EG: LDS_READ_RET 579; EG: LDS_READ_RET 580; EG: LDS_READ_RET 581; EG: LDS_READ_RET 582; EG: LDS_READ_RET 583; EG: LDS_READ_RET 584; EG: LDS_READ_RET 585; EG: LDS_READ_RET 586; EG: LDS_READ_RET 587; EG: LDS_READ_RET 588; EG: LDS_READ_RET 589; EG: LDS_READ_RET 590; EG: LDS_READ_RET 591define amdgpu_kernel void @local_sextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 { 592 %load = load <64 x i16>, <64 x i16> addrspace(3)* %in 593 %ext = sext <64 x i16> %load to <64 x i32> 594 store <64 x i32> %ext, <64 x i32> addrspace(3)* %out 595 ret void 596} 597 598; FUNC-LABEL: {{^}}local_zextload_i16_to_i64: 599; GFX9-NOT: m0 600; SICIVI: s_mov_b32 m0 601 602; GCN-DAG: ds_read_u16 v[[LO:[0-9]+]], 603; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 604 605; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]] 606 607; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 608; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 609; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 610; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 611; EG-DAG: LDS_WRITE 612define amdgpu_kernel void @local_zextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 { 613 %a = load i16, i16 addrspace(3)* %in 614 %ext = zext i16 %a to i64 615 store i64 %ext, i64 addrspace(3)* %out 616 ret void 617} 618 619; FUNC-LABEL: {{^}}local_sextload_i16_to_i64: 620; GFX9-NOT: m0 621; SICIVI: s_mov_b32 m0 622 623; FIXME: Need to optimize this sequence to avoid an extra shift. 624; t25: i32,ch = load<LD2[%in(addrspace=3)], anyext from i16> t12, t10, undef:i32 625; t28: i64 = any_extend t25 626; t30: i64 = sign_extend_inreg t28, ValueType:ch:i16 627; SI: ds_read_i16 v[[LO:[0-9]+]], 628; GFX89: ds_read_u16 v[[ULO:[0-9]+]] 629; GFX89: v_bfe_i32 v[[LO:[0-9]+]], v[[ULO]], 0, 16 630; GCN-DAG: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]] 631 632; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]] 633 634; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 635; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 636; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP 637; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 638; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal 639; EG-DAG: LDS_WRITE 640; EG-DAG: 16 641; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 642define amdgpu_kernel void @local_sextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 { 643 %a = load i16, i16 addrspace(3)* %in 644 %ext = sext i16 %a to i64 645 store i64 %ext, i64 addrspace(3)* %out 646 ret void 647} 648 649; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i64: 650; GFX9-NOT: m0 651; SICIVI: s_mov_b32 m0 652 653 654; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 655; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 656; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 657; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 658; EG-DAG: LDS_WRITE 659define amdgpu_kernel void @local_zextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 { 660 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in 661 %ext = zext <1 x i16> %load to <1 x i64> 662 store <1 x i64> %ext, <1 x i64> addrspace(3)* %out 663 ret void 664} 665 666; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i64: 667; GFX9-NOT: m0 668; SICIVI: s_mov_b32 m0 669 670 671; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 672; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]] 673; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP 674; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 675; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal 676; EG-DAG: LDS_WRITE 677; EG-DAG: 16 678; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]] 679define amdgpu_kernel void @local_sextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 { 680 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in 681 %ext = sext <1 x i16> %load to <1 x i64> 682 store <1 x i64> %ext, <1 x i64> addrspace(3)* %out 683 ret void 684} 685 686; FUNC-LABEL: {{^}}local_zextload_v2i16_to_v2i64: 687; GFX9-NOT: m0 688; SICIVI: s_mov_b32 m0 689 690 691; EG: LDS_READ_RET 692define amdgpu_kernel void @local_zextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 { 693 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in 694 %ext = zext <2 x i16> %load to <2 x i64> 695 store <2 x i64> %ext, <2 x i64> addrspace(3)* %out 696 ret void 697} 698 699; FUNC-LABEL: {{^}}local_sextload_v2i16_to_v2i64: 700; GFX9-NOT: m0 701; SICIVI: s_mov_b32 m0 702 703 704; EG: LDS_READ_RET 705; EG-DAG: BFE_INT 706; EG-DAG: ASHR 707define amdgpu_kernel void @local_sextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 { 708 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in 709 %ext = sext <2 x i16> %load to <2 x i64> 710 store <2 x i64> %ext, <2 x i64> addrspace(3)* %out 711 ret void 712} 713 714; FUNC-LABEL: {{^}}local_zextload_v4i16_to_v4i64: 715; GFX9-NOT: m0 716; SICIVI: s_mov_b32 m0 717 718 719; EG: LDS_READ_RET 720; EG: LDS_READ_RET 721define amdgpu_kernel void @local_zextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 { 722 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in 723 %ext = zext <4 x i16> %load to <4 x i64> 724 store <4 x i64> %ext, <4 x i64> addrspace(3)* %out 725 ret void 726} 727 728; FUNC-LABEL: {{^}}local_sextload_v4i16_to_v4i64: 729; GFX9-NOT: m0 730; SICIVI: s_mov_b32 m0 731 732 733; EG: LDS_READ_RET 734; EG: LDS_READ_RET 735; EG-DAG: BFE_INT 736; EG-DAG: BFE_INT 737; EG-DAG: ASHR 738; EG-DAG: ASHR 739define amdgpu_kernel void @local_sextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 { 740 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in 741 %ext = sext <4 x i16> %load to <4 x i64> 742 store <4 x i64> %ext, <4 x i64> addrspace(3)* %out 743 ret void 744} 745 746; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i64: 747; GFX9-NOT: m0 748; SICIVI: s_mov_b32 m0 749 750 751; EG: LDS_READ_RET 752; EG: LDS_READ_RET 753; EG: LDS_READ_RET 754; EG: LDS_READ_RET 755define amdgpu_kernel void @local_zextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 { 756 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in 757 %ext = zext <8 x i16> %load to <8 x i64> 758 store <8 x i64> %ext, <8 x i64> addrspace(3)* %out 759 ret void 760} 761 762; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i64: 763; GFX9-NOT: m0 764; SICIVI: s_mov_b32 m0 765 766 767; EG: LDS_READ_RET 768; EG: LDS_READ_RET 769; EG: LDS_READ_RET 770; EG: LDS_READ_RET 771; EG-DAG: BFE_INT 772; EG-DAG: BFE_INT 773; EG-DAG: ASHR 774; EG-DAG: ASHR 775; EG-DAG: BFE_INT 776; EG-DAG: BFE_INT 777; EG-DAG: ASHR 778; EG-DAG: ASHR 779define amdgpu_kernel void @local_sextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 { 780 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in 781 %ext = sext <8 x i16> %load to <8 x i64> 782 store <8 x i64> %ext, <8 x i64> addrspace(3)* %out 783 ret void 784} 785 786; FUNC-LABEL: {{^}}local_zextload_v16i16_to_v16i64: 787; GFX9-NOT: m0 788; SICIVI: s_mov_b32 m0 789 790 791; EG: LDS_READ_RET 792; EG: LDS_READ_RET 793; EG: LDS_READ_RET 794; EG: LDS_READ_RET 795; EG: LDS_READ_RET 796; EG: LDS_READ_RET 797; EG: LDS_READ_RET 798; EG: LDS_READ_RET 799define amdgpu_kernel void @local_zextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 { 800 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in 801 %ext = zext <16 x i16> %load to <16 x i64> 802 store <16 x i64> %ext, <16 x i64> addrspace(3)* %out 803 ret void 804} 805 806; FUNC-LABEL: {{^}}local_sextload_v16i16_to_v16i64: 807; GFX9-NOT: m0 808; SICIVI: s_mov_b32 m0 809 810 811; EG: LDS_READ_RET 812; EG: LDS_READ_RET 813; EG: LDS_READ_RET 814; EG: LDS_READ_RET 815; EG: LDS_READ_RET 816; EG: LDS_READ_RET 817; EG: LDS_READ_RET 818; EG: LDS_READ_RET 819; EG-DAG: BFE_INT 820; EG-DAG: BFE_INT 821; EG-DAG: ASHR 822; EG-DAG: ASHR 823; EG-DAG: BFE_INT 824; EG-DAG: BFE_INT 825; EG-DAG: ASHR 826; EG-DAG: ASHR 827; EG-DAG: BFE_INT 828; EG-DAG: BFE_INT 829; EG-DAG: ASHR 830; EG-DAG: ASHR 831; EG-DAG: BFE_INT 832; EG-DAG: BFE_INT 833; EG-DAG: ASHR 834; EG-DAG: ASHR 835define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 { 836 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in 837 %ext = sext <16 x i16> %load to <16 x i64> 838 store <16 x i64> %ext, <16 x i64> addrspace(3)* %out 839 ret void 840} 841 842; FUNC-LABEL: {{^}}local_zextload_v32i16_to_v32i64: 843; GFX9-NOT: m0 844; SICIVI: s_mov_b32 m0 845 846 847; EG: LDS_READ_RET 848; EG: LDS_READ_RET 849; EG: LDS_READ_RET 850; EG: LDS_READ_RET 851; EG: LDS_READ_RET 852; EG: LDS_READ_RET 853; EG: LDS_READ_RET 854; EG: LDS_READ_RET 855; EG: LDS_READ_RET 856; EG: LDS_READ_RET 857; EG: LDS_READ_RET 858; EG: LDS_READ_RET 859; EG: LDS_READ_RET 860; EG: LDS_READ_RET 861; EG: LDS_READ_RET 862; EG: LDS_READ_RET 863define amdgpu_kernel void @local_zextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 { 864 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in 865 %ext = zext <32 x i16> %load to <32 x i64> 866 store <32 x i64> %ext, <32 x i64> addrspace(3)* %out 867 ret void 868} 869 870; FUNC-LABEL: {{^}}local_sextload_v32i16_to_v32i64: 871; GFX9-NOT: m0 872; SICIVI: s_mov_b32 m0 873 874 875; EG: LDS_READ_RET 876; EG: LDS_READ_RET 877; EG: LDS_READ_RET 878; EG: LDS_READ_RET 879; EG: LDS_READ_RET 880; EG: LDS_READ_RET 881; EG: LDS_READ_RET 882; EG: LDS_READ_RET 883; EG: LDS_READ_RET 884; EG: LDS_READ_RET 885; EG: LDS_READ_RET 886; EG: LDS_READ_RET 887; EG: LDS_READ_RET 888; EG: LDS_READ_RET 889; EG: LDS_READ_RET 890; EG: LDS_READ_RET 891; EG-DAG: BFE_INT 892; EG-DAG: BFE_INT 893; EG-DAG: ASHR 894; EG-DAG: ASHR 895; EG-DAG: BFE_INT 896; EG-DAG: BFE_INT 897; EG-DAG: ASHR 898; EG-DAG: ASHR 899; EG-DAG: BFE_INT 900; EG-DAG: BFE_INT 901; EG-DAG: ASHR 902; EG-DAG: ASHR 903; EG-DAG: BFE_INT 904; EG-DAG: BFE_INT 905; EG-DAG: ASHR 906; EG-DAG: ASHR 907; EG-DAG: BFE_INT 908; EG-DAG: BFE_INT 909; EG-DAG: ASHR 910; EG-DAG: ASHR 911; EG-DAG: BFE_INT 912; EG-DAG: BFE_INT 913; EG-DAG: ASHR 914; EG-DAG: ASHR 915; EG-DAG: BFE_INT 916; EG-DAG: BFE_INT 917; EG-DAG: ASHR 918; EG-DAG: ASHR 919; EG-DAG: BFE_INT 920; EG-DAG: BFE_INT 921; EG-DAG: ASHR 922; EG-DAG: ASHR 923define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 { 924 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in 925 %ext = sext <32 x i16> %load to <32 x i64> 926 store <32 x i64> %ext, <32 x i64> addrspace(3)* %out 927 ret void 928} 929 930; ; XFUNC-LABEL: {{^}}local_zextload_v64i16_to_v64i64: 931; define amdgpu_kernel void @local_zextload_v64i16_to_v64i64(<64 x i64> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 { 932; %load = load <64 x i16>, <64 x i16> addrspace(3)* %in 933; %ext = zext <64 x i16> %load to <64 x i64> 934; store <64 x i64> %ext, <64 x i64> addrspace(3)* %out 935; ret void 936; } 937 938; ; XFUNC-LABEL: {{^}}local_sextload_v64i16_to_v64i64: 939; define amdgpu_kernel void @local_sextload_v64i16_to_v64i64(<64 x i64> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 { 940; %load = load <64 x i16>, <64 x i16> addrspace(3)* %in 941; %ext = sext <64 x i16> %load to <64 x i64> 942; store <64 x i64> %ext, <64 x i64> addrspace(3)* %out 943; ret void 944; } 945 946; Tests if ds_read/write_b128 gets generated for the 16 byte aligned load. 947; FUNC-LABEL: {{^}}local_v8i16_to_128: 948 949; SI-NOT: ds_read_b128 950; SI-NOT: ds_write_b128 951 952; CIVI: ds_read_b128 953; CIVI: ds_write_b128 954 955; EG: LDS_READ_RET 956; EG: LDS_READ_RET 957; EG: LDS_READ_RET 958; EG: LDS_READ_RET 959define amdgpu_kernel void @local_v8i16_to_128(<8 x i16> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) { 960 %ld = load <8 x i16>, <8 x i16> addrspace(3)* %in, align 16 961 store <8 x i16> %ld, <8 x i16> addrspace(3)* %out, align 16 962 ret void 963} 964 965attributes #0 = { nounwind } 966