1; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s 2; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s 3 4; GCN-LABEL: {{^}}load_local_lo_v2i16_undeflo: 5; GCN: s_waitcnt 6; GFX9-NEXT: ds_read_u16_d16 v0, v0 7; GFX9-NEXT: s_waitcnt 8; GFX9-NEXT: s_setpc_b64 9 10; VI: ds_read_u16 11define <2 x i16> @load_local_lo_v2i16_undeflo(i16 addrspace(3)* %in) #0 { 12entry: 13 %load = load i16, i16 addrspace(3)* %in 14 %build = insertelement <2 x i16> undef, i16 %load, i32 0 15 ret <2 x i16> %build 16} 17 18; GCN-LABEL: {{^}}load_local_lo_v2i16_reglo: 19; GCN: s_waitcnt 20; GFX9-NEXT: ds_read_u16_d16 v0, v0 21; GFX9-NEXT: s_waitcnt 22; GFX9-NEXT: s_setpc_b64 23 24; VI: ds_read_u16 25define <2 x i16> @load_local_lo_v2i16_reglo(i16 addrspace(3)* %in, i16 %reg) #0 { 26entry: 27 %load = load i16, i16 addrspace(3)* %in 28 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0 29 %build1 = insertelement <2 x i16> %build0, i16 %load, i32 0 30 ret <2 x i16> %build1 31} 32 33; Show that we get reasonable regalloc without physreg constraints. 34; GCN-LABEL: {{^}}load_local_lo_v2i16_reglo_vreg: 35; GCN: s_waitcnt 36; GFX9-NEXT: ds_read_u16_d16 v0, v0 37; GFX9-NEXT: s_waitcnt 38; GFX9-NEXT: global_store_dword v[0:1], v0, off{{$}} 39; GFX9-NEXT: s_waitcnt 40; GFX9-NEXT: s_setpc_b64 41 42; VI: ds_read_u16 43define void @load_local_lo_v2i16_reglo_vreg(i16 addrspace(3)* %in, i16 %reg) #0 { 44entry: 45 %load = load i16, i16 addrspace(3)* %in 46 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0 47 %build1 = insertelement <2 x i16> %build0, i16 %load, i32 0 48 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 49 ret void 50} 51 52; GCN-LABEL: {{^}}load_local_lo_v2i16_zerolo: 53; GCN: s_waitcnt 54; GFX9-NEXT: v_mov_b32_e32 v1, 0 55; GFX9-NEXT: ds_read_u16_d16 v1, v0 56; GFX9-NEXT: s_waitcnt 57; GFX9-NEXT: v_mov_b32_e32 v0, v1 58; GFX9-NEXT: s_setpc_b64 59 60; VI: ds_read_u16 v 61define <2 x i16> @load_local_lo_v2i16_zerolo(i16 addrspace(3)* %in) #0 { 62entry: 63 %load = load i16, i16 addrspace(3)* %in 64 %build = insertelement <2 x i16> zeroinitializer, i16 %load, i32 0 65 ret <2 x i16> %build 66} 67 68; GCN-LABEL: {{^}}load_local_lo_v2f16_fpimm: 69; GCN: s_waitcnt 70; GFX9-NEXT: v_mov_b32_e32 v1, 2.0 71; GFX9-NEXT: ds_read_u16_d16 v1, v0 72; GFX9-NEXT: s_waitcnt 73; GFX9-NEXT: v_mov_b32_e32 v0, v1 74; GFX9-NEXT: s_setpc_b64 75 76; VI: ds_read_u16 v 77define <2 x half> @load_local_lo_v2f16_fpimm(half addrspace(3)* %in) #0 { 78entry: 79 %load = load half, half addrspace(3)* %in 80 %build = insertelement <2 x half> <half 0.0, half 2.0>, half %load, i32 0 81 ret <2 x half> %build 82} 83 84; GCN-LABEL: {{^}}load_local_lo_v2f16_reghi_vreg: 85; GCN: s_waitcnt 86; GFX9-NEXT: ds_read_u16_d16 v1, v0 87; GFX9-NEXT: s_waitcnt 88; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} 89; GFX9-NEXT: s_waitcnt 90; GFX9-NEXT: s_setpc_b64 91 92; VI: ds_read_u16 v 93define void @load_local_lo_v2f16_reghi_vreg(half addrspace(3)* %in, i32 %reg) #0 { 94entry: 95 %reg.bc = bitcast i32 %reg to <2 x half> 96 %load = load half, half addrspace(3)* %in 97 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 98 store <2 x half> %build1, <2 x half> addrspace(1)* undef 99 ret void 100} 101 102; GCN-LABEL: {{^}}load_local_lo_v2f16_reglo_vreg: 103 104; GFX9: ds_read_u16 v 105; GFX9: v_and_b32_e32 v{{[0-9]+}}, 0xffff, v{{[0-9]+}} 106; GFX9: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, v{{[0-9]+}} 107; GFX9: global_store_dword 108 109; VI: ds_read_u16 v 110define void @load_local_lo_v2f16_reglo_vreg(half addrspace(3)* %in, half %reg) #0 { 111entry: 112 %load = load half, half addrspace(3)* %in 113 %build0 = insertelement <2 x half> undef, half %reg, i32 1 114 %build1 = insertelement <2 x half> %build0, half %load, i32 0 115 store <2 x half> %build1, <2 x half> addrspace(1)* undef 116 ret void 117} 118 119; GCN-LABEL: {{^}}load_local_lo_v2i16_reghi_vreg_zexti8: 120; GCN: s_waitcnt 121; GFX9-NEXT: ds_read_u8_d16 v1, v0 122; GFX9-NEXT: s_waitcnt 123; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} 124; GFX9-NEXT: s_waitcnt 125; GFX9-NEXT: s_setpc_b64 126 127; VI: ds_read_u8 v 128define void @load_local_lo_v2i16_reghi_vreg_zexti8(i8 addrspace(3)* %in, i32 %reg) #0 { 129entry: 130 %reg.bc = bitcast i32 %reg to <2 x i16> 131 %load = load i8, i8 addrspace(3)* %in 132 %ext = zext i8 %load to i16 133 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 134 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 135 ret void 136} 137 138; GCN-LABEL: {{^}}load_local_lo_v2i16_reglo_vreg_zexti8: 139; GCN: s_waitcnt 140; GFX9: ds_read_u8 v 141; GFX9: global_store_dword 142; GFX9-NEXT: s_waitcnt 143; GFX9-NEXT: s_setpc_b64 144 145; VI: ds_read_u8 v 146define void @load_local_lo_v2i16_reglo_vreg_zexti8(i8 addrspace(3)* %in, i16 %reg) #0 { 147entry: 148 %load = load i8, i8 addrspace(3)* %in 149 %ext = zext i8 %load to i16 150 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 1 151 %build1 = insertelement <2 x i16> %build0, i16 %ext, i32 0 152 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 153 ret void 154} 155 156; GCN-LABEL: {{^}}load_local_lo_v2i16_reghi_vreg_sexti8: 157; GCN: s_waitcnt 158; GFX9-NEXT: ds_read_i8_d16 v1, v0 159; GFX9-NEXT: s_waitcnt 160; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} 161; GFX9-NEXT: s_waitcnt 162; GFX9-NEXT: s_setpc_b64 163 164; VI: ds_read_i8 v 165define void @load_local_lo_v2i16_reghi_vreg_sexti8(i8 addrspace(3)* %in, i32 %reg) #0 { 166entry: 167 %reg.bc = bitcast i32 %reg to <2 x i16> 168 %load = load i8, i8 addrspace(3)* %in 169 %ext = sext i8 %load to i16 170 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 171 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 172 ret void 173} 174 175; GCN-LABEL: {{^}}load_local_lo_v2i16_reglo_vreg_sexti8: 176; GCN: s_waitcnt 177; GFX9: ds_read_i8 v 178; GFX9: v_and_b32_e32 v{{[0-9]+}}, 0xffff, v{{[0-9]+}} 179; GFX9: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, v{{[0-9]+}} 180 181; VI: ds_read_i8 v 182define void @load_local_lo_v2i16_reglo_vreg_sexti8(i8 addrspace(3)* %in, i16 %reg) #0 { 183entry: 184 %load = load i8, i8 addrspace(3)* %in 185 %ext = sext i8 %load to i16 186 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 1 187 %build1 = insertelement <2 x i16> %build0, i16 %ext, i32 0 188 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 189 ret void 190} 191 192; GCN-LABEL: {{^}}load_global_lo_v2i16_reglo_vreg: 193; GCN: s_waitcnt 194; GFX9-NEXT: global_load_short_d16 v2, v[0:1], off offset:-4094 195; GFX9-NEXT: s_waitcnt 196; GFX9-NEXT: global_store_dword 197; GFX9-NEXT: s_waitcnt 198; GFX9-NEXT: s_setpc_b64 199define void @load_global_lo_v2i16_reglo_vreg(i16 addrspace(1)* %in, i32 %reg) #0 { 200entry: 201 %reg.bc = bitcast i32 %reg to <2 x i16> 202 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 -2047 203 %load = load i16, i16 addrspace(1)* %gep 204 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 205 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 206 ret void 207} 208 209; GCN-LABEL: {{^}}load_global_lo_v2f16_reglo_vreg: 210; GCN: s_waitcnt 211; GFX9-NEXT: global_load_short_d16 v2, v[0:1], off offset:-4094 212; GFX9-NEXT: s_waitcnt 213; GFX9-NEXT: global_store_dword 214; GFX9-NEXT: s_waitcnt 215; GFX9-NEXT: s_setpc_b64 216define void @load_global_lo_v2f16_reglo_vreg(half addrspace(1)* %in, i32 %reg) #0 { 217entry: 218 %reg.bc = bitcast i32 %reg to <2 x half> 219 %gep = getelementptr inbounds half, half addrspace(1)* %in, i64 -2047 220 %load = load half, half addrspace(1)* %gep 221 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 222 store <2 x half> %build1, <2 x half> addrspace(1)* undef 223 ret void 224} 225 226; GCN-LABEL: {{^}}load_global_lo_v2i16_reglo_vreg_zexti8: 227; GCN: s_waitcnt 228; GFX9-NEXT: global_load_ubyte_d16 v2, v[0:1], off offset:-4095 229; GFX9-NEXT: s_waitcnt 230; GFX9-NEXT: global_store_dword 231; GFX9-NEXT: s_waitcnt 232; GFX9-NEXT: s_setpc_b64 233define void @load_global_lo_v2i16_reglo_vreg_zexti8(i8 addrspace(1)* %in, i32 %reg) #0 { 234entry: 235 %reg.bc = bitcast i32 %reg to <2 x i16> 236 %gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095 237 %load = load i8, i8 addrspace(1)* %gep 238 %ext = zext i8 %load to i16 239 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 240 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 241 ret void 242} 243 244; GCN-LABEL: {{^}}load_global_lo_v2i16_reglo_vreg_sexti8: 245; GCN: s_waitcnt 246; GFX9-NEXT: global_load_sbyte_d16 v2, v[0:1], off offset:-4095 247; GFX9-NEXT: s_waitcnt 248; GFX9-NEXT: global_store_dword 249; GFX9-NEXT: s_waitcnt 250; GFX9-NEXT: s_setpc_b64 251define void @load_global_lo_v2i16_reglo_vreg_sexti8(i8 addrspace(1)* %in, i32 %reg) #0 { 252entry: 253 %reg.bc = bitcast i32 %reg to <2 x i16> 254 %gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095 255 %load = load i8, i8 addrspace(1)* %gep 256 %ext = sext i8 %load to i16 257 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 258 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 259 ret void 260} 261 262; GCN-LABEL: {{^}}load_flat_lo_v2i16_reghi_vreg: 263; GCN: s_waitcnt 264; GFX9-NEXT: flat_load_short_d16 v2, v[0:1] 265; GFX9-NEXT: s_waitcnt 266; GFX9-NEXT: global_store_dword v[0:1], v2 267; GFX9-NEXT: s_waitcnt 268; GFX9-NEXT: s_setpc_b64 269 270; VI: flat_load_ushort v{{[0-9]+}} 271; VI: v_or_b32_e32 272define void @load_flat_lo_v2i16_reghi_vreg(i16* %in, i32 %reg) #0 { 273entry: 274 %reg.bc = bitcast i32 %reg to <2 x i16> 275 %load = load i16, i16* %in 276 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 277 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 278 ret void 279} 280 281; GCN-LABEL: {{^}}load_flat_lo_v2f16_reghi_vreg: 282; GCN: s_waitcnt 283; GFX9-NEXT: flat_load_short_d16 v2, v[0:1] 284; GFX9-NEXT: s_waitcnt 285; GFX9-NEXT: global_store_dword v[0:1], v2 286; GFX9-NEXT: s_waitcnt 287; GFX9-NEXT: s_setpc_b64 288 289; VI: flat_load_ushort v{{[0-9]+}} 290; VI: v_or_b32_e32 291define void @load_flat_lo_v2f16_reghi_vreg(half* %in, i32 %reg) #0 { 292entry: 293 %reg.bc = bitcast i32 %reg to <2 x half> 294 %load = load half, half* %in 295 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 296 store <2 x half> %build1, <2 x half> addrspace(1)* undef 297 ret void 298} 299 300; GCN-LABEL: {{^}}load_flat_lo_v2i16_reglo_vreg_zexti8: 301; GCN: s_waitcnt 302; GFX9-NEXT: flat_load_ubyte_d16 v2, v[0:1] 303; GFX9-NEXT: s_waitcnt 304; GFX9-NEXT: global_store_dword v[0:1], v2 305; GFX9-NEXT: s_waitcnt 306; GFX9-NEXT: s_setpc_b64 307 308; VI: flat_load_ubyte [[LO:v[0-9]+]] 309; VI: v_lshrrev_b32_e32 [[HI:v[0-9]+]], 16, v2 310; VI: s_mov_b32 [[MASK:s[0-9]+]], 0x5040c00 311; VI: v_perm_b32 [[RES:v[0-9]+]], [[HI]], [[LO]], [[MASK]] 312; VI: flat_store_dword v[0:1], [[RES]] 313define void @load_flat_lo_v2i16_reglo_vreg_zexti8(i8* %in, i32 %reg) #0 { 314entry: 315 %reg.bc = bitcast i32 %reg to <2 x i16> 316 %load = load i8, i8* %in 317 %ext = zext i8 %load to i16 318 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 319 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 320 ret void 321} 322 323; GCN-LABEL: {{^}}load_flat_lo_v2i16_reglo_vreg_sexti8: 324; GCN: s_waitcnt 325; GFX9-NEXT: flat_load_sbyte_d16 v2, v[0:1] 326; GFX9-NEXT: s_waitcnt 327; GFX9-NEXT: global_store_dword v[0:1], v2 328; GFX9-NEXT: s_waitcnt 329; GFX9-NEXT: s_setpc_b64 330 331; VI: flat_load_sbyte v{{[0-9]+}} 332; VI: v_or_b32_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 333 334define void @load_flat_lo_v2i16_reglo_vreg_sexti8(i8* %in, i32 %reg) #0 { 335entry: 336 %reg.bc = bitcast i32 %reg to <2 x i16> 337 %load = load i8, i8* %in 338 %ext = sext i8 %load to i16 339 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 340 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 341 ret void 342} 343 344; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg: 345; GCN: s_waitcnt 346; GFX9: buffer_load_short_d16 v0, off, s[0:3], s5 offset:4094{{$}} 347; GFX9-NEXT: s_waitcnt 348; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 349; GFX9-NEXT: s_waitcnt 350; GFX9-NEXT: s_setpc_b64 351 352; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} 353define void @load_private_lo_v2i16_reglo_vreg(i16 addrspace(5)* byval %in, i32 %reg) #0 { 354entry: 355 %reg.bc = bitcast i32 %reg to <2 x i16> 356 %gep = getelementptr inbounds i16, i16 addrspace(5)* %in, i64 2045 357 %load = load i16, i16 addrspace(5)* %gep 358 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 359 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 360 ret void 361} 362 363; GCN-LABEL: {{^}}load_private_lo_v2i16_reghi_vreg: 364; GCN: s_waitcnt 365; GFX9: buffer_load_ushort v1, off, s[0:3], s5 offset:4094{{$}} 366; GFX9-NEXT: s_waitcnt 367; GFX9: v_and_b32 368; GFX9: v_lshl_or_b32 369 370; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} 371; GFX9-NEXT: s_waitcnt 372; GFX9-NEXT: s_setpc_b64 373 374; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} 375define void @load_private_lo_v2i16_reghi_vreg(i16 addrspace(5)* byval %in, i16 %reg) #0 { 376entry: 377 %gep = getelementptr inbounds i16, i16 addrspace(5)* %in, i64 2045 378 %load = load i16, i16 addrspace(5)* %gep 379 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 1 380 %build1 = insertelement <2 x i16> %build0, i16 %load, i32 0 381 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 382 ret void 383} 384 385; GCN-LABEL: {{^}}load_private_lo_v2f16_reglo_vreg: 386; GCN: s_waitcnt 387; GFX9: buffer_load_short_d16 v0, off, s[0:3], s5 offset:4094{{$}} 388; GFX9-NEXT: s_waitcnt 389; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 390; GFX9-NEXT: s_waitcnt 391; GFX9-NEXT: s_setpc_b64 392 393; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} 394define void @load_private_lo_v2f16_reglo_vreg(half addrspace(5)* byval %in, i32 %reg) #0 { 395entry: 396 %reg.bc = bitcast i32 %reg to <2 x half> 397 %gep = getelementptr inbounds half, half addrspace(5)* %in, i64 2045 398 %load = load half, half addrspace(5)* %gep 399 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 400 store <2 x half> %build1, <2 x half> addrspace(1)* undef 401 ret void 402} 403 404; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_nooff: 405; GCN: s_waitcnt 406; GFX9-NEXT: buffer_load_short_d16 v1, off, s[0:3], s4 offset:4094{{$}} 407; GFX9-NEXT: s_waitcnt 408; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 409; GFX9-NEXT: s_waitcnt 410; GFX9-NEXT: s_setpc_b64 411 412; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} 413define void @load_private_lo_v2i16_reglo_vreg_nooff(i16 addrspace(5)* %in, i32 %reg) #0 { 414entry: 415 %reg.bc = bitcast i32 %reg to <2 x i16> 416 %load = load volatile i16, i16 addrspace(5)* inttoptr (i32 4094 to i16 addrspace(5)*) 417 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 418 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 419 ret void 420} 421 422; GCN-LABEL: {{^}}load_private_lo_v2i16_reghi_vreg_nooff: 423; GCN: s_waitcnt 424; GFX9-NEXT: buffer_load_short_d16 v1, off, s[0:3], s4 offset:4094{{$}} 425; GFX9-NEXT: s_waitcnt 426; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 427; GFX9-NEXT: s_waitcnt 428; GFX9-NEXT: s_setpc_b64 429 430; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} 431define void @load_private_lo_v2i16_reghi_vreg_nooff(i16 addrspace(5)* %in, i32 %reg) #0 { 432entry: 433 %reg.bc = bitcast i32 %reg to <2 x i16> 434 %load = load volatile i16, i16 addrspace(5)* inttoptr (i32 4094 to i16 addrspace(5)*) 435 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 436 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 437 ret void 438} 439 440; GCN-LABEL: {{^}}load_private_lo_v2f16_reglo_vreg_nooff: 441; GCN: s_waitcnt 442; GFX9-NEXT: buffer_load_short_d16 v1, off, s[0:3], s4 offset:4094{{$}} 443; GFX9-NEXT: s_waitcnt 444; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 445; GFX9-NEXT: s_waitcnt 446; GFX9-NEXT: s_setpc_b64 447 448; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} 449define void @load_private_lo_v2f16_reglo_vreg_nooff(half addrspace(5)* %in, i32 %reg) #0 { 450entry: 451 %reg.bc = bitcast i32 %reg to <2 x half> 452 %load = load volatile half, half addrspace(5)* inttoptr (i32 4094 to half addrspace(5)*) 453 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 454 store <2 x half> %build1, <2 x half> addrspace(1)* undef 455 ret void 456} 457 458; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_zexti8: 459; GCN: s_waitcnt 460; GFX9: buffer_load_ubyte_d16 v0, off, s[0:3], s5 offset:4095{{$}} 461; GFX9-NEXT: s_waitcnt 462; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 463; GFX9-NEXT: s_waitcnt 464; GFX9-NEXT: s_setpc_b64 465 466; VI: buffer_load_ubyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} 467define void @load_private_lo_v2i16_reglo_vreg_zexti8(i8 addrspace(5)* byval %in, i32 %reg) #0 { 468entry: 469 %reg.bc = bitcast i32 %reg to <2 x i16> 470 %gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091 471 %load = load i8, i8 addrspace(5)* %gep 472 %ext = zext i8 %load to i16 473 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 474 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 475 ret void 476} 477 478; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_sexti8: 479; GCN: s_waitcnt 480; GFX9: buffer_load_sbyte_d16 v0, off, s[0:3], s5 offset:4095{{$}} 481; GFX9-NEXT: s_waitcnt 482; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 483; GFX9-NEXT: s_waitcnt 484; GFX9-NEXT: s_setpc_b64 485 486; VI: buffer_load_sbyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} 487define void @load_private_lo_v2i16_reglo_vreg_sexti8(i8 addrspace(5)* byval %in, i32 %reg) #0 { 488entry: 489 %reg.bc = bitcast i32 %reg to <2 x i16> 490 %gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091 491 %load = load i8, i8 addrspace(5)* %gep 492 %ext = sext i8 %load to i16 493 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 494 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 495 ret void 496} 497 498; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_nooff_zexti8: 499; GCN: s_waitcnt 500; GFX9-NEXT: buffer_load_ubyte_d16 v1, off, s[0:3], s4 offset:4094{{$}} 501; GFX9-NEXT: s_waitcnt 502; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 503; GFX9-NEXT: s_waitcnt 504; GFX9-NEXT: s_setpc_b64 505 506; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} 507define void @load_private_lo_v2i16_reglo_vreg_nooff_zexti8(i8 addrspace(5)* %in, i32 %reg) #0 { 508entry: 509 %reg.bc = bitcast i32 %reg to <2 x i16> 510 %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) 511 %ext = zext i8 %load to i16 512 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 513 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 514 ret void 515} 516 517; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_nooff_sexti8: 518; GCN: s_waitcnt 519; GFX9-NEXT: buffer_load_sbyte_d16 v1, off, s[0:3], s4 offset:4094{{$}} 520; GFX9-NEXT: s_waitcnt 521; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 522; GFX9-NEXT: s_waitcnt 523; GFX9-NEXT: s_setpc_b64 524 525; VI: buffer_load_sbyte v0, off, s[0:3], s4 offset:4094{{$}} 526define void @load_private_lo_v2i16_reglo_vreg_nooff_sexti8(i8 addrspace(5)* %in, i32 %reg) #0 { 527entry: 528 %reg.bc = bitcast i32 %reg to <2 x i16> 529 %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) 530 %ext = sext i8 %load to i16 531 %build1 = insertelement <2 x i16> %reg.bc, i16 %ext, i32 0 532 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 533 ret void 534} 535 536; GCN-LABEL: {{^}}load_private_lo_v2f16_reglo_vreg_nooff_zexti8: 537; GCN: s_waitcnt 538; GFX9-NEXT: buffer_load_ubyte_d16 v1, off, s[0:3], s4 offset:4094{{$}} 539; GFX9-NEXT: s_waitcnt 540; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 541; GFX9-NEXT: s_waitcnt 542; GFX9-NEXT: s_setpc_b64 543 544; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} 545define void @load_private_lo_v2f16_reglo_vreg_nooff_zexti8(i8 addrspace(5)* %in, i32 %reg) #0 { 546entry: 547 %reg.bc = bitcast i32 %reg to <2 x half> 548 %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) 549 %ext = zext i8 %load to i16 550 %bc.ext = bitcast i16 %ext to half 551 %build1 = insertelement <2 x half> %reg.bc, half %bc.ext, i32 0 552 store <2 x half> %build1, <2 x half> addrspace(1)* undef 553 ret void 554} 555 556; GCN-LABEL: {{^}}load_constant_lo_v2i16_reglo_vreg: 557; GCN: s_waitcnt 558; GFX9-NEXT: global_load_short_d16 v2, v[0:1], off offset:-4094 559; GFX9-NEXT: s_waitcnt 560; GFX9-NEXT: global_store_dword 561; GFX9-NEXT: s_waitcnt 562; GFX9-NEXT: s_setpc_b64 563 564; VI: flat_load_ushort 565define void @load_constant_lo_v2i16_reglo_vreg(i16 addrspace(4)* %in, i32 %reg) #0 { 566entry: 567 %reg.bc = bitcast i32 %reg to <2 x i16> 568 %gep = getelementptr inbounds i16, i16 addrspace(4)* %in, i64 -2047 569 %load = load i16, i16 addrspace(4)* %gep 570 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 571 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 572 ret void 573} 574 575; GCN-LABEL: load_constant_lo_v2f16_reglo_vreg 576; GCN: s_waitcnt 577; GFX9-NEXT: global_load_short_d16 v2, v[0:1], off offset:-4094 578; GFX9-NEXT: s_waitcnt 579; GFX9-NEXT: global_store_dword 580; GFX9-NEXT: s_waitcnt 581; GFX9-NEXT: s_setpc_b64 582 583; VI: flat_load_ushort 584define void @load_constant_lo_v2f16_reglo_vreg(half addrspace(4)* %in, i32 %reg) #0 { 585entry: 586 %reg.bc = bitcast i32 %reg to <2 x half> 587 %gep = getelementptr inbounds half, half addrspace(4)* %in, i64 -2047 588 %load = load half, half addrspace(4)* %gep 589 %build1 = insertelement <2 x half> %reg.bc, half %load, i32 0 590 store <2 x half> %build1, <2 x half> addrspace(1)* undef 591 ret void 592} 593 594; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_to_offset: 595; GFX9: buffer_store_dword 596; GFX9-NEXT: buffer_load_short_d16 v0, off, s[0:3], s5 offset:4094 597 598; VI: buffer_load_ushort v 599define void @load_private_lo_v2i16_reglo_vreg_to_offset(i32 %reg) #0 { 600entry: 601 %obj0 = alloca [10 x i32], align 4, addrspace(5) 602 %obj1 = alloca [4096 x i16], align 2, addrspace(5) 603 %reg.bc = bitcast i32 %reg to <2 x i16> 604 %bc = bitcast [10 x i32] addrspace(5)* %obj0 to i32 addrspace(5)* 605 store volatile i32 123, i32 addrspace(5)* %bc 606 %gep = getelementptr inbounds [4096 x i16], [4096 x i16] addrspace(5)* %obj1, i32 0, i32 2025 607 %load = load volatile i16, i16 addrspace(5)* %gep 608 %build1 = insertelement <2 x i16> %reg.bc, i16 %load, i32 0 609 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 610 ret void 611} 612 613; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_sexti8_to_offset: 614; GFX9: buffer_store_dword 615; GFX9-NEXT: buffer_load_sbyte_d16 v0, off, s[0:3], s5 offset:4095 616 617; VI: buffer_load_sbyte v 618define void @load_private_lo_v2i16_reglo_vreg_sexti8_to_offset(i32 %reg) #0 { 619entry: 620 %obj0 = alloca [10 x i32], align 4, addrspace(5) 621 %obj1 = alloca [4096 x i8], align 2, addrspace(5) 622 %reg.bc = bitcast i32 %reg to <2 x i16> 623 %bc = bitcast [10 x i32] addrspace(5)* %obj0 to i32 addrspace(5)* 624 store volatile i32 123, i32 addrspace(5)* %bc 625 %gep = getelementptr inbounds [4096 x i8], [4096 x i8] addrspace(5)* %obj1, i32 0, i32 4051 626 %load = load volatile i8, i8 addrspace(5)* %gep 627 %load.ext = sext i8 %load to i16 628 %build1 = insertelement <2 x i16> %reg.bc, i16 %load.ext, i32 0 629 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 630 ret void 631} 632 633; GCN-LABEL: {{^}}load_private_lo_v2i16_reglo_vreg_zexti8_to_offset: 634; GFX9: buffer_store_dword 635; GFX9-NEXT: buffer_load_ubyte_d16 v0, off, s[0:3], s5 offset:4095 636 637; VI: buffer_load_ubyte v 638define void @load_private_lo_v2i16_reglo_vreg_zexti8_to_offset(i32 %reg) #0 { 639entry: 640 %obj0 = alloca [10 x i32], align 4, addrspace(5) 641 %obj1 = alloca [4096 x i8], align 2, addrspace(5) 642 %reg.bc = bitcast i32 %reg to <2 x i16> 643 %bc = bitcast [10 x i32] addrspace(5)* %obj0 to i32 addrspace(5)* 644 store volatile i32 123, i32 addrspace(5)* %bc 645 %gep = getelementptr inbounds [4096 x i8], [4096 x i8] addrspace(5)* %obj1, i32 0, i32 4051 646 %load = load volatile i8, i8 addrspace(5)* %gep 647 %load.ext = zext i8 %load to i16 648 %build1 = insertelement <2 x i16> %reg.bc, i16 %load.ext, i32 0 649 store <2 x i16> %build1, <2 x i16> addrspace(1)* undef 650 ret void 651} 652 653attributes #0 = { nounwind } 654