1; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
4; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
5; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
6
7; FUNC-LABEL: sin_f32
8; EG: MULADD_IEEE *
9; EG: FRACT *
10; EG: ADD *
11; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
12; EG-NOT: SIN
13
14; GCN: v_mul_f32
15; SICIVI: v_fract_f32
16; GFX9-NOT: v_fract_f32
17; GCN: v_sin_f32
18; GCN-NOT: v_sin_f32
19define amdgpu_kernel void @sin_f32(float addrspace(1)* %out, float %x) #1 {
20   %sin = call float @llvm.sin.f32(float %x)
21   store float %sin, float addrspace(1)* %out
22   ret void
23}
24
25; FUNC-LABEL: {{^}}safe_sin_3x_f32:
26; GCN: v_mul_f32
27; GCN: v_mul_f32
28; SICIVI: v_fract_f32
29; GFX9-NOT: v_fract_f32
30; GCN: v_sin_f32
31; GCN-NOT: v_sin_f32
32define amdgpu_kernel void @safe_sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
33  %y = fmul float 3.0, %x
34  %sin = call float @llvm.sin.f32(float %y)
35  store float %sin, float addrspace(1)* %out
36  ret void
37}
38
39; FUNC-LABEL: {{^}}unsafe_sin_3x_f32:
40; GCN-NOT: v_add_f32
41; GCN: 0x3ef47644
42; GCN: v_mul_f32
43; SICIVI: v_fract_f32
44; GFX9-NOT: v_fract_f32
45; GCN: v_sin_f32
46; GCN-NOT: v_sin_f32
47define amdgpu_kernel void @unsafe_sin_3x_f32(float addrspace(1)* %out, float %x) #2 {
48  %y = fmul float 3.0, %x
49  %sin = call float @llvm.sin.f32(float %y)
50  store float %sin, float addrspace(1)* %out
51  ret void
52}
53
54; FUNC-LABEL: {{^}}safe_sin_2x_f32:
55; GCN: v_add_f32
56; GCN: v_mul_f32
57; SICIVI: v_fract_f32
58; GFX9-NOT: v_fract_f32
59; GCN: v_sin_f32
60; GCN-NOT: v_sin_f32
61define amdgpu_kernel void @safe_sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
62  %y = fmul float 2.0, %x
63  %sin = call float @llvm.sin.f32(float %y)
64  store float %sin, float addrspace(1)* %out
65  ret void
66}
67
68; FUNC-LABEL: {{^}}unsafe_sin_2x_f32:
69; GCN-NOT: v_add_f32
70; GCN: 0x3ea2f983
71; GCN: v_mul_f32
72; SICIVI: v_fract_f32
73; GFX9-NOT: v_fract_f32
74; GCN: v_sin_f32
75; GCN-NOT: v_sin_f32
76define amdgpu_kernel void @unsafe_sin_2x_f32(float addrspace(1)* %out, float %x) #2 {
77  %y = fmul float 2.0, %x
78  %sin = call float @llvm.sin.f32(float %y)
79  store float %sin, float addrspace(1)* %out
80  ret void
81}
82
83; FUNC-LABEL: {{^}}test_safe_2sin_f32:
84; GCN: v_add_f32
85; GCN: v_mul_f32
86; SICIVI: v_fract_f32
87; GFX9-NOT: v_fract_f32
88; GCN: v_sin_f32
89; GCN-NOT: v_sin_f32
90define amdgpu_kernel void @test_safe_2sin_f32(float addrspace(1)* %out, float %x) #1 {
91   %y = fmul float 2.0, %x
92   %sin = call float @llvm.sin.f32(float %y)
93   store float %sin, float addrspace(1)* %out
94   ret void
95}
96
97; FUNC-LABEL: {{^}}test_unsafe_2sin_f32:
98; GCN: 0x3ea2f983
99; GCN: v_mul_f32
100; SICIVI: v_fract_f32
101; GFX9-NOT: v_fract_f32
102; GCN: v_sin_f32
103; GCN-NOT: v_sin_f32
104define amdgpu_kernel void @test_unsafe_2sin_f32(float addrspace(1)* %out, float %x) #2 {
105   %y = fmul float 2.0, %x
106   %sin = call float @llvm.sin.f32(float %y)
107   store float %sin, float addrspace(1)* %out
108   ret void
109}
110
111; FUNC-LABEL: {{^}}sin_v4f32:
112; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
113; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
114; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
115; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
116; EG-NOT: SIN
117
118; GCN: v_sin_f32
119; GCN: v_sin_f32
120; GCN: v_sin_f32
121; GCN: v_sin_f32
122; GCN-NOT: v_sin_f32
123define amdgpu_kernel void @sin_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %vx) #1 {
124   %sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)
125   store <4 x float> %sin, <4 x float> addrspace(1)* %out
126   ret void
127}
128
129declare float @llvm.sin.f32(float) #0
130declare <4 x float> @llvm.sin.v4f32(<4 x float>) #0
131
132attributes #0 = { nounwind readnone }
133attributes #1 = { nounwind "unsafe-fp-math"="false" }
134attributes #2 = { nounwind "unsafe-fp-math"="true" }
135