1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s
2
3declare i32 @llvm.amdgcn.readlane(i32, i32) #0
4
5; CHECK-LABEL: {{^}}test_readlane_sreg:
6; CHECK: v_readlane_b32 s{{[0-9]+}}, v{{[0-9]+}}, s{{[0-9]+}}
7define void @test_readlane_sreg(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #1 {
8  %readlane = call i32 @llvm.amdgcn.readlane(i32 %src0, i32 %src1)
9  store i32 %readlane, i32 addrspace(1)* %out, align 4
10  ret void
11}
12
13; CHECK-LABEL: {{^}}test_readlane_imm_sreg:
14; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]]], 32
15; CHECK: v_readlane_b32 s{{[0-9]+}}, [[VVAL]], s{{[0-9]+}}
16define void @test_readlane_imm_sreg(i32 addrspace(1)* %out, i32 %src1) #1 {
17  %readlane = call i32 @llvm.amdgcn.readlane(i32 32, i32 %src1)
18  store i32 %readlane, i32 addrspace(1)* %out, align 4
19  ret void
20}
21
22; TODO: m0 should be folded.
23; CHECK-LABEL: {{^}}test_readlane_m0_sreg:
24; CHECK: s_mov_b32 m0, -1
25; CHECK: s_mov_b32 [[COPY_M0:s[0-9]+]], m0
26; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]]], [[COPY_M0]]
27; CHECK: v_readlane_b32 s{{[0-9]+}}, [[VVAL]], s{{[0-9]+}}
28define void @test_readlane_m0_sreg(i32 addrspace(1)* %out, i32 %src1) #1 {
29  %m0 = call i32 asm "s_mov_b32 m0, -1", "={M0}"()
30  %readlane = call i32 @llvm.amdgcn.readlane(i32 %m0, i32 %src1)
31  store i32 %readlane, i32 addrspace(1)* %out, align 4
32  ret void
33}
34
35; CHECK-LABEL: {{^}}test_readlane_imm:
36; CHECK: v_readlane_b32 s{{[0-9]+}}, v{{[0-9]+}}, 32
37define void @test_readlane_imm(i32 addrspace(1)* %out, i32 %src0) #1 {
38  %readlane = call i32 @llvm.amdgcn.readlane(i32 %src0, i32 32) #0
39  store i32 %readlane, i32 addrspace(1)* %out, align 4
40  ret void
41}
42
43attributes #0 = { nounwind readnone convergent }
44attributes #1 = { nounwind }
45