1; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
2; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
3
4; GCN-LABEL: {{^}}test_init_exec:
5; GFX1032: s_mov_b32 exec_lo, 0x12345
6; GFX1064: s_mov_b64 exec, 0x12345
7; GCN: v_add_f32_e32 v0,
8define amdgpu_ps float @test_init_exec(float %a, float %b) {
9main_body:
10  %s = fadd float %a, %b
11  call void @llvm.amdgcn.init.exec(i64 74565)
12  ret float %s
13}
14
15; GCN-LABEL: {{^}}test_init_exec_from_input:
16; GCN: s_bfe_u32 s0, s3, 0x70008
17; GFX1032: s_bfm_b32 exec_lo, s0, 0
18; GFX1032: s_cmp_eq_u32 s0, 32
19; GFX1032: s_cmov_b32 exec_lo, -1
20; GFX1064: s_bfm_b64 exec, s0, 0
21; GFX1064: s_cmp_eq_u32 s0, 64
22; GFX1064: s_cmov_b64 exec, -1
23; GCN: v_add_f32_e32 v0,
24define amdgpu_ps float @test_init_exec_from_input(i32 inreg, i32 inreg, i32 inreg, i32 inreg %count, float %a, float %b) {
25main_body:
26  %s = fadd float %a, %b
27  call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
28  ret float %s
29}
30
31declare void @llvm.amdgcn.init.exec(i64)
32declare void @llvm.amdgcn.init.exec.from.input(i32, i32)
33