1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10 %s
4; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10 %s
5
6define amdgpu_ps void @store_f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
7; GFX9-LABEL: store_f32_1d:
8; GFX9:       ; %bb.0: ; %main_body
9; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x1 unorm a16
10; GFX9-NEXT:    s_endpgm
11;
12; GFX10-LABEL: store_f32_1d:
13; GFX10:       ; %bb.0: ; %main_body
14; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm a16
15; GFX10-NEXT:    s_endpgm
16main_body:
17  %x = extractelement <2 x i16> %coords, i32 0
18  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
19  ret void
20}
21
22define amdgpu_ps void @store_v2f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
23; GFX9-LABEL: store_v2f32_1d:
24; GFX9:       ; %bb.0: ; %main_body
25; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x3 unorm a16
26; GFX9-NEXT:    s_endpgm
27;
28; GFX10-LABEL: store_v2f32_1d:
29; GFX10:       ; %bb.0: ; %main_body
30; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm a16
31; GFX10-NEXT:    s_endpgm
32main_body:
33  %x = extractelement <2 x i16> %coords, i32 0
34  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
35  ret void
36}
37
38define amdgpu_ps void @store_v3f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
39; GFX9-LABEL: store_v3f32_1d:
40; GFX9:       ; %bb.0: ; %main_body
41; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x7 unorm a16
42; GFX9-NEXT:    s_endpgm
43;
44; GFX10-LABEL: store_v3f32_1d:
45; GFX10:       ; %bb.0: ; %main_body
46; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm a16
47; GFX10-NEXT:    s_endpgm
48main_body:
49  %x = extractelement <2 x i16> %coords, i32 0
50  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
51  ret void
52}
53
54define amdgpu_ps void @store_v4f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
55; GFX9-LABEL: store_v4f32_1d:
56; GFX9:       ; %bb.0: ; %main_body
57; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0xf unorm a16
58; GFX9-NEXT:    s_endpgm
59;
60; GFX10-LABEL: store_v4f32_1d:
61; GFX10:       ; %bb.0: ; %main_body
62; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
63; GFX10-NEXT:    s_endpgm
64main_body:
65  %x = extractelement <2 x i16> %coords, i32 0
66  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
67  ret void
68}
69
70define amdgpu_ps void @store_f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
71; GFX9-LABEL: store_f32_2d:
72; GFX9:       ; %bb.0: ; %main_body
73; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x1 unorm a16
74; GFX9-NEXT:    s_endpgm
75;
76; GFX10-LABEL: store_f32_2d:
77; GFX10:       ; %bb.0: ; %main_body
78; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm a16
79; GFX10-NEXT:    s_endpgm
80main_body:
81  %x = extractelement <2 x i16> %coords, i32 0
82  %y = extractelement <2 x i16> %coords, i32 1
83  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
84  ret void
85}
86
87define amdgpu_ps void @store_v2f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
88; GFX9-LABEL: store_v2f32_2d:
89; GFX9:       ; %bb.0: ; %main_body
90; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x3 unorm a16
91; GFX9-NEXT:    s_endpgm
92;
93; GFX10-LABEL: store_v2f32_2d:
94; GFX10:       ; %bb.0: ; %main_body
95; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm a16
96; GFX10-NEXT:    s_endpgm
97main_body:
98  %x = extractelement <2 x i16> %coords, i32 0
99  %y = extractelement <2 x i16> %coords, i32 1
100  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
101  ret void
102}
103
104define amdgpu_ps void @store_v3f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
105; GFX9-LABEL: store_v3f32_2d:
106; GFX9:       ; %bb.0: ; %main_body
107; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x7 unorm a16
108; GFX9-NEXT:    s_endpgm
109;
110; GFX10-LABEL: store_v3f32_2d:
111; GFX10:       ; %bb.0: ; %main_body
112; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm a16
113; GFX10-NEXT:    s_endpgm
114main_body:
115  %x = extractelement <2 x i16> %coords, i32 0
116  %y = extractelement <2 x i16> %coords, i32 1
117  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
118  ret void
119}
120
121define amdgpu_ps void @store_v4f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
122; GFX9-LABEL: store_v4f32_2d:
123; GFX9:       ; %bb.0: ; %main_body
124; GFX9-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0xf unorm a16
125; GFX9-NEXT:    s_endpgm
126;
127; GFX10-LABEL: store_v4f32_2d:
128; GFX10:       ; %bb.0: ; %main_body
129; GFX10-NEXT:    image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
130; GFX10-NEXT:    s_endpgm
131main_body:
132  %x = extractelement <2 x i16> %coords, i32 0
133  %y = extractelement <2 x i16> %coords, i32 1
134  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
135  ret void
136}
137
138define amdgpu_ps void @store_f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
139; GFX9-LABEL: store_f32_3d:
140; GFX9:       ; %bb.0: ; %main_body
141; GFX9-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x1 unorm a16
142; GFX9-NEXT:    s_endpgm
143;
144; GFX10-LABEL: store_f32_3d:
145; GFX10:       ; %bb.0: ; %main_body
146; GFX10-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_3D unorm a16
147; GFX10-NEXT:    s_endpgm
148main_body:
149  %x = extractelement <2 x i16> %coords_lo, i32 0
150  %y = extractelement <2 x i16> %coords_lo, i32 1
151  %z = extractelement <2 x i16> %coords_hi, i32 0
152  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
153  ret void
154}
155
156define amdgpu_ps void @store_v2f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
157; GFX9-LABEL: store_v2f32_3d:
158; GFX9:       ; %bb.0: ; %main_body
159; GFX9-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x3 unorm a16
160; GFX9-NEXT:    s_endpgm
161;
162; GFX10-LABEL: store_v2f32_3d:
163; GFX10:       ; %bb.0: ; %main_body
164; GFX10-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_3D unorm a16
165; GFX10-NEXT:    s_endpgm
166main_body:
167  %x = extractelement <2 x i16> %coords_lo, i32 0
168  %y = extractelement <2 x i16> %coords_lo, i32 1
169  %z = extractelement <2 x i16> %coords_hi, i32 0
170  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
171  ret void
172}
173
174define amdgpu_ps void @store_v3f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
175; GFX9-LABEL: store_v3f32_3d:
176; GFX9:       ; %bb.0: ; %main_body
177; GFX9-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x7 unorm a16
178; GFX9-NEXT:    s_endpgm
179;
180; GFX10-LABEL: store_v3f32_3d:
181; GFX10:       ; %bb.0: ; %main_body
182; GFX10-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_3D unorm a16
183; GFX10-NEXT:    s_endpgm
184main_body:
185  %x = extractelement <2 x i16> %coords_lo, i32 0
186  %y = extractelement <2 x i16> %coords_lo, i32 1
187  %z = extractelement <2 x i16> %coords_hi, i32 0
188  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
189  ret void
190}
191
192define amdgpu_ps void @store_v4f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
193; GFX9-LABEL: store_v4f32_3d:
194; GFX9:       ; %bb.0: ; %main_body
195; GFX9-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0xf unorm a16
196; GFX9-NEXT:    s_endpgm
197;
198; GFX10-LABEL: store_v4f32_3d:
199; GFX10:       ; %bb.0: ; %main_body
200; GFX10-NEXT:    image_store v[2:5], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
201; GFX10-NEXT:    s_endpgm
202main_body:
203  %x = extractelement <2 x i16> %coords_lo, i32 0
204  %y = extractelement <2 x i16> %coords_lo, i32 1
205  %z = extractelement <2 x i16> %coords_hi, i32 0
206  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
207  ret void
208}
209
210declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #2
211declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #2
212declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #2
213
214attributes #0 = { nounwind }
215attributes #1 = { nounwind readonly }
216