1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10 %s
4
5define amdgpu_ps <4 x float> @sample_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s) {
6; GFX9-LABEL: sample_1d:
7; GFX9:       ; %bb.0: ; %main_body
8; GFX9-NEXT:    s_mov_b64 s[12:13], exec
9; GFX9-NEXT:    s_wqm_b64 exec, exec
10; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
11; GFX9-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
12; GFX9-NEXT:    s_waitcnt vmcnt(0)
13; GFX9-NEXT:    ; return to shader part epilog
14;
15; GFX10-LABEL: sample_1d:
16; GFX10:       ; %bb.0: ; %main_body
17; GFX10-NEXT:    s_mov_b32 s12, exec_lo
18; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
19; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
20; GFX10-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
21; GFX10-NEXT:    s_waitcnt vmcnt(0)
22; GFX10-NEXT:    ; return to shader part epilog
23main_body:
24  %v = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f16(i32 15, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
25  ret <4 x float> %v
26}
27
28define amdgpu_ps <4 x float> @sample_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t) {
29; GFX9-LABEL: sample_2d:
30; GFX9:       ; %bb.0: ; %main_body
31; GFX9-NEXT:    s_mov_b64 s[12:13], exec
32; GFX9-NEXT:    s_wqm_b64 exec, exec
33; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
34; GFX9-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
35; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
36; GFX9-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
37; GFX9-NEXT:    s_waitcnt vmcnt(0)
38; GFX9-NEXT:    ; return to shader part epilog
39;
40; GFX10-LABEL: sample_2d:
41; GFX10:       ; %bb.0: ; %main_body
42; GFX10-NEXT:    s_mov_b32 s12, exec_lo
43; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
44; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
45; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
46; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
47; GFX10-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
48; GFX10-NEXT:    s_waitcnt vmcnt(0)
49; GFX10-NEXT:    ; return to shader part epilog
50main_body:
51  %v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f16(i32 15, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
52  ret <4 x float> %v
53}
54
55define amdgpu_ps <4 x float> @sample_3d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t, half %r) {
56; GFX9-LABEL: sample_3d:
57; GFX9:       ; %bb.0: ; %main_body
58; GFX9-NEXT:    s_mov_b64 s[12:13], exec
59; GFX9-NEXT:    s_wqm_b64 exec, exec
60; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
61; GFX9-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
62; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
63; GFX9-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf a16
64; GFX9-NEXT:    s_waitcnt vmcnt(0)
65; GFX9-NEXT:    ; return to shader part epilog
66;
67; GFX10-LABEL: sample_3d:
68; GFX10:       ; %bb.0: ; %main_body
69; GFX10-NEXT:    s_mov_b32 s12, exec_lo
70; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
71; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
72; GFX10-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
73; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
74; GFX10-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16
75; GFX10-NEXT:    s_waitcnt vmcnt(0)
76; GFX10-NEXT:    ; return to shader part epilog
77main_body:
78  %v = call <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f16(i32 15, half %s, half %t, half %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
79  ret <4 x float> %v
80}
81
82define amdgpu_ps <4 x float> @sample_cube(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t, half %face) {
83; GFX9-LABEL: sample_cube:
84; GFX9:       ; %bb.0: ; %main_body
85; GFX9-NEXT:    s_mov_b64 s[12:13], exec
86; GFX9-NEXT:    s_wqm_b64 exec, exec
87; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
88; GFX9-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
89; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
90; GFX9-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf a16 da
91; GFX9-NEXT:    s_waitcnt vmcnt(0)
92; GFX9-NEXT:    ; return to shader part epilog
93;
94; GFX10-LABEL: sample_cube:
95; GFX10:       ; %bb.0: ; %main_body
96; GFX10-NEXT:    s_mov_b32 s12, exec_lo
97; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
98; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
99; GFX10-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
100; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
101; GFX10-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_CUBE a16
102; GFX10-NEXT:    s_waitcnt vmcnt(0)
103; GFX10-NEXT:    ; return to shader part epilog
104main_body:
105  %v = call <4 x float> @llvm.amdgcn.image.sample.cube.v4f32.f16(i32 15, half %s, half %t, half %face, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
106  ret <4 x float> %v
107}
108
109define amdgpu_ps <4 x float> @sample_1darray(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %slice) {
110; GFX9-LABEL: sample_1darray:
111; GFX9:       ; %bb.0: ; %main_body
112; GFX9-NEXT:    s_mov_b64 s[12:13], exec
113; GFX9-NEXT:    s_wqm_b64 exec, exec
114; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
115; GFX9-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
116; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
117; GFX9-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16 da
118; GFX9-NEXT:    s_waitcnt vmcnt(0)
119; GFX9-NEXT:    ; return to shader part epilog
120;
121; GFX10-LABEL: sample_1darray:
122; GFX10:       ; %bb.0: ; %main_body
123; GFX10-NEXT:    s_mov_b32 s12, exec_lo
124; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
125; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
126; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
127; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
128; GFX10-NEXT:    image_sample v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY a16
129; GFX10-NEXT:    s_waitcnt vmcnt(0)
130; GFX10-NEXT:    ; return to shader part epilog
131main_body:
132  %v = call <4 x float> @llvm.amdgcn.image.sample.1darray.v4f32.f16(i32 15, half %s, half %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
133  ret <4 x float> %v
134}
135
136define amdgpu_ps <4 x float> @sample_2darray(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t, half %slice) {
137; GFX9-LABEL: sample_2darray:
138; GFX9:       ; %bb.0: ; %main_body
139; GFX9-NEXT:    s_mov_b64 s[12:13], exec
140; GFX9-NEXT:    s_wqm_b64 exec, exec
141; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
142; GFX9-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
143; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
144; GFX9-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf a16 da
145; GFX9-NEXT:    s_waitcnt vmcnt(0)
146; GFX9-NEXT:    ; return to shader part epilog
147;
148; GFX10-LABEL: sample_2darray:
149; GFX10:       ; %bb.0: ; %main_body
150; GFX10-NEXT:    s_mov_b32 s12, exec_lo
151; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
152; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
153; GFX10-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
154; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
155; GFX10-NEXT:    image_sample v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY a16
156; GFX10-NEXT:    s_waitcnt vmcnt(0)
157; GFX10-NEXT:    ; return to shader part epilog
158main_body:
159  %v = call <4 x float> @llvm.amdgcn.image.sample.2darray.v4f32.f16(i32 15, half %s, half %t, half %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
160  ret <4 x float> %v
161}
162
163define amdgpu_ps <4 x float> @sample_c_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s) {
164; GFX9-LABEL: sample_c_1d:
165; GFX9:       ; %bb.0: ; %main_body
166; GFX9-NEXT:    s_mov_b64 s[12:13], exec
167; GFX9-NEXT:    s_wqm_b64 exec, exec
168; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
169; GFX9-NEXT:    image_sample_c v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
170; GFX9-NEXT:    s_waitcnt vmcnt(0)
171; GFX9-NEXT:    ; return to shader part epilog
172;
173; GFX10-LABEL: sample_c_1d:
174; GFX10:       ; %bb.0: ; %main_body
175; GFX10-NEXT:    s_mov_b32 s12, exec_lo
176; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
177; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
178; GFX10-NEXT:    image_sample_c v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
179; GFX10-NEXT:    s_waitcnt vmcnt(0)
180; GFX10-NEXT:    ; return to shader part epilog
181main_body:
182  %v = call <4 x float> @llvm.amdgcn.image.sample.c.1d.v4f32.f16(i32 15, float %zcompare, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
183  ret <4 x float> %v
184}
185
186define amdgpu_ps <4 x float> @sample_c_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %t) {
187; GFX9-LABEL: sample_c_2d:
188; GFX9:       ; %bb.0: ; %main_body
189; GFX9-NEXT:    s_mov_b64 s[12:13], exec
190; GFX9-NEXT:    s_wqm_b64 exec, exec
191; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
192; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
193; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
194; GFX9-NEXT:    image_sample_c v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
195; GFX9-NEXT:    s_waitcnt vmcnt(0)
196; GFX9-NEXT:    ; return to shader part epilog
197;
198; GFX10-LABEL: sample_c_2d:
199; GFX10:       ; %bb.0: ; %main_body
200; GFX10-NEXT:    s_mov_b32 s12, exec_lo
201; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
202; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
203; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
204; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
205; GFX10-NEXT:    image_sample_c v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
206; GFX10-NEXT:    s_waitcnt vmcnt(0)
207; GFX10-NEXT:    ; return to shader part epilog
208main_body:
209  %v = call <4 x float> @llvm.amdgcn.image.sample.c.2d.v4f32.f16(i32 15, float %zcompare, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
210  ret <4 x float> %v
211}
212
213define amdgpu_ps <4 x float> @sample_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %clamp) {
214; GFX9-LABEL: sample_cl_1d:
215; GFX9:       ; %bb.0: ; %main_body
216; GFX9-NEXT:    s_mov_b64 s[12:13], exec
217; GFX9-NEXT:    s_wqm_b64 exec, exec
218; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
219; GFX9-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
220; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
221; GFX9-NEXT:    image_sample_cl v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
222; GFX9-NEXT:    s_waitcnt vmcnt(0)
223; GFX9-NEXT:    ; return to shader part epilog
224;
225; GFX10-LABEL: sample_cl_1d:
226; GFX10:       ; %bb.0: ; %main_body
227; GFX10-NEXT:    s_mov_b32 s12, exec_lo
228; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
229; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
230; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
231; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
232; GFX10-NEXT:    image_sample_cl v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
233; GFX10-NEXT:    s_waitcnt vmcnt(0)
234; GFX10-NEXT:    ; return to shader part epilog
235main_body:
236  %v = call <4 x float> @llvm.amdgcn.image.sample.cl.1d.v4f32.f16(i32 15, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
237  ret <4 x float> %v
238}
239
240define amdgpu_ps <4 x float> @sample_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t, half %clamp) {
241; GFX9-LABEL: sample_cl_2d:
242; GFX9:       ; %bb.0: ; %main_body
243; GFX9-NEXT:    s_mov_b64 s[12:13], exec
244; GFX9-NEXT:    s_wqm_b64 exec, exec
245; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
246; GFX9-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
247; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
248; GFX9-NEXT:    image_sample_cl v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf a16
249; GFX9-NEXT:    s_waitcnt vmcnt(0)
250; GFX9-NEXT:    ; return to shader part epilog
251;
252; GFX10-LABEL: sample_cl_2d:
253; GFX10:       ; %bb.0: ; %main_body
254; GFX10-NEXT:    s_mov_b32 s12, exec_lo
255; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
256; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
257; GFX10-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
258; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
259; GFX10-NEXT:    image_sample_cl v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
260; GFX10-NEXT:    s_waitcnt vmcnt(0)
261; GFX10-NEXT:    ; return to shader part epilog
262main_body:
263  %v = call <4 x float> @llvm.amdgcn.image.sample.cl.2d.v4f32.f16(i32 15, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
264  ret <4 x float> %v
265}
266
267define amdgpu_ps <4 x float> @sample_c_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %clamp) {
268; GFX9-LABEL: sample_c_cl_1d:
269; GFX9:       ; %bb.0: ; %main_body
270; GFX9-NEXT:    s_mov_b64 s[12:13], exec
271; GFX9-NEXT:    s_wqm_b64 exec, exec
272; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
273; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
274; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
275; GFX9-NEXT:    image_sample_c_cl v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
276; GFX9-NEXT:    s_waitcnt vmcnt(0)
277; GFX9-NEXT:    ; return to shader part epilog
278;
279; GFX10-LABEL: sample_c_cl_1d:
280; GFX10:       ; %bb.0: ; %main_body
281; GFX10-NEXT:    s_mov_b32 s12, exec_lo
282; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
283; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
284; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
285; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
286; GFX10-NEXT:    image_sample_c_cl v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
287; GFX10-NEXT:    s_waitcnt vmcnt(0)
288; GFX10-NEXT:    ; return to shader part epilog
289main_body:
290  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cl.1d.v4f32.f16(i32 15, float %zcompare, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
291  ret <4 x float> %v
292}
293
294define amdgpu_ps <4 x float> @sample_c_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %t, half %clamp) {
295; GFX9-LABEL: sample_c_cl_2d:
296; GFX9:       ; %bb.0: ; %main_body
297; GFX9-NEXT:    s_mov_b64 s[12:13], exec
298; GFX9-NEXT:    s_wqm_b64 exec, exec
299; GFX9-NEXT:    v_mov_b32_e32 v5, v3
300; GFX9-NEXT:    v_mov_b32_e32 v3, v0
301; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v1
302; GFX9-NEXT:    v_lshl_or_b32 v4, v2, 16, v0
303; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
304; GFX9-NEXT:    image_sample_c_cl v[0:3], v[3:5], s[0:7], s[8:11] dmask:0xf a16
305; GFX9-NEXT:    s_waitcnt vmcnt(0)
306; GFX9-NEXT:    ; return to shader part epilog
307;
308; GFX10-LABEL: sample_c_cl_2d:
309; GFX10:       ; %bb.0: ; %main_body
310; GFX10-NEXT:    s_mov_b32 s12, exec_lo
311; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
312; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
313; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
314; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
315; GFX10-NEXT:    image_sample_c_cl v[0:3], [v0, v1, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
316; GFX10-NEXT:    s_waitcnt vmcnt(0)
317; GFX10-NEXT:    ; return to shader part epilog
318main_body:
319  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cl.2d.v4f32.f16(i32 15, float %zcompare, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
320  ret <4 x float> %v
321}
322
323define amdgpu_ps <4 x float> @sample_b_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, half %s) {
324; GFX9-LABEL: sample_b_1d:
325; GFX9:       ; %bb.0: ; %main_body
326; GFX9-NEXT:    s_mov_b64 s[12:13], exec
327; GFX9-NEXT:    s_wqm_b64 exec, exec
328; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
329; GFX9-NEXT:    image_sample_b v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
330; GFX9-NEXT:    s_waitcnt vmcnt(0)
331; GFX9-NEXT:    ; return to shader part epilog
332;
333; GFX10-LABEL: sample_b_1d:
334; GFX10:       ; %bb.0: ; %main_body
335; GFX10-NEXT:    s_mov_b32 s12, exec_lo
336; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
337; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
338; GFX10-NEXT:    image_sample_b v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
339; GFX10-NEXT:    s_waitcnt vmcnt(0)
340; GFX10-NEXT:    ; return to shader part epilog
341main_body:
342  %v = call <4 x float> @llvm.amdgcn.image.sample.b.1d.v4f32.f16.f16(i32 15, half %bias, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
343  ret <4 x float> %v
344}
345
346define amdgpu_ps <4 x float> @sample_b_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, half %s, half %t) {
347; GFX9-LABEL: sample_b_2d:
348; GFX9:       ; %bb.0: ; %main_body
349; GFX9-NEXT:    s_mov_b64 s[12:13], exec
350; GFX9-NEXT:    s_wqm_b64 exec, exec
351; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
352; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
353; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
354; GFX9-NEXT:    image_sample_b v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
355; GFX9-NEXT:    s_waitcnt vmcnt(0)
356; GFX9-NEXT:    ; return to shader part epilog
357;
358; GFX10-LABEL: sample_b_2d:
359; GFX10:       ; %bb.0: ; %main_body
360; GFX10-NEXT:    s_mov_b32 s12, exec_lo
361; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
362; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
363; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
364; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
365; GFX10-NEXT:    image_sample_b v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
366; GFX10-NEXT:    s_waitcnt vmcnt(0)
367; GFX10-NEXT:    ; return to shader part epilog
368main_body:
369  %v = call <4 x float> @llvm.amdgcn.image.sample.b.2d.v4f32.f16.f16(i32 15, half %bias, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
370  ret <4 x float> %v
371}
372
373define amdgpu_ps <4 x float> @sample_c_b_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, float %zcompare, half %s) {
374; GFX9-LABEL: sample_c_b_1d:
375; GFX9:       ; %bb.0: ; %main_body
376; GFX9-NEXT:    s_mov_b64 s[12:13], exec
377; GFX9-NEXT:    s_wqm_b64 exec, exec
378; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
379; GFX9-NEXT:    image_sample_c_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
380; GFX9-NEXT:    s_waitcnt vmcnt(0)
381; GFX9-NEXT:    ; return to shader part epilog
382;
383; GFX10-LABEL: sample_c_b_1d:
384; GFX10:       ; %bb.0: ; %main_body
385; GFX10-NEXT:    s_mov_b32 s12, exec_lo
386; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
387; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
388; GFX10-NEXT:    image_sample_c_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
389; GFX10-NEXT:    s_waitcnt vmcnt(0)
390; GFX10-NEXT:    ; return to shader part epilog
391main_body:
392  %v = call <4 x float> @llvm.amdgcn.image.sample.c.b.1d.v4f32.f16.f16(i32 15, half %bias, float %zcompare, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
393  ret <4 x float> %v
394}
395
396define amdgpu_ps <4 x float> @sample_c_b_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, float %zcompare, half %s, half %t) {
397; GFX9-LABEL: sample_c_b_2d:
398; GFX9:       ; %bb.0: ; %main_body
399; GFX9-NEXT:    s_mov_b64 s[12:13], exec
400; GFX9-NEXT:    s_wqm_b64 exec, exec
401; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
402; GFX9-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
403; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
404; GFX9-NEXT:    image_sample_c_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
405; GFX9-NEXT:    s_waitcnt vmcnt(0)
406; GFX9-NEXT:    ; return to shader part epilog
407;
408; GFX10-LABEL: sample_c_b_2d:
409; GFX10:       ; %bb.0: ; %main_body
410; GFX10-NEXT:    s_mov_b32 s12, exec_lo
411; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
412; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
413; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
414; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
415; GFX10-NEXT:    image_sample_c_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
416; GFX10-NEXT:    s_waitcnt vmcnt(0)
417; GFX10-NEXT:    ; return to shader part epilog
418main_body:
419  %v = call <4 x float> @llvm.amdgcn.image.sample.c.b.2d.v4f32.f16.f16(i32 15, half %bias, float %zcompare, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
420  ret <4 x float> %v
421}
422
423define amdgpu_ps <4 x float> @sample_b_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, half %s, half %clamp) {
424; GFX9-LABEL: sample_b_cl_1d:
425; GFX9:       ; %bb.0: ; %main_body
426; GFX9-NEXT:    s_mov_b64 s[12:13], exec
427; GFX9-NEXT:    s_wqm_b64 exec, exec
428; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
429; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
430; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
431; GFX9-NEXT:    image_sample_b_cl v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
432; GFX9-NEXT:    s_waitcnt vmcnt(0)
433; GFX9-NEXT:    ; return to shader part epilog
434;
435; GFX10-LABEL: sample_b_cl_1d:
436; GFX10:       ; %bb.0: ; %main_body
437; GFX10-NEXT:    s_mov_b32 s12, exec_lo
438; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
439; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
440; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
441; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
442; GFX10-NEXT:    image_sample_b_cl v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
443; GFX10-NEXT:    s_waitcnt vmcnt(0)
444; GFX10-NEXT:    ; return to shader part epilog
445main_body:
446  %v = call <4 x float> @llvm.amdgcn.image.sample.b.cl.1d.v4f32.f16.f16(i32 15, half %bias, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
447  ret <4 x float> %v
448}
449
450define amdgpu_ps <4 x float> @sample_b_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, half %s, half %t, half %clamp) {
451; GFX9-LABEL: sample_b_cl_2d:
452; GFX9:       ; %bb.0: ; %main_body
453; GFX9-NEXT:    s_mov_b64 s[12:13], exec
454; GFX9-NEXT:    s_wqm_b64 exec, exec
455; GFX9-NEXT:    v_mov_b32_e32 v5, v3
456; GFX9-NEXT:    v_mov_b32_e32 v3, v0
457; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v1
458; GFX9-NEXT:    v_lshl_or_b32 v4, v2, 16, v0
459; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
460; GFX9-NEXT:    image_sample_b_cl v[0:3], v[3:5], s[0:7], s[8:11] dmask:0xf a16
461; GFX9-NEXT:    s_waitcnt vmcnt(0)
462; GFX9-NEXT:    ; return to shader part epilog
463;
464; GFX10-LABEL: sample_b_cl_2d:
465; GFX10:       ; %bb.0: ; %main_body
466; GFX10-NEXT:    s_mov_b32 s12, exec_lo
467; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
468; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
469; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
470; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
471; GFX10-NEXT:    image_sample_b_cl v[0:3], [v0, v1, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
472; GFX10-NEXT:    s_waitcnt vmcnt(0)
473; GFX10-NEXT:    ; return to shader part epilog
474main_body:
475  %v = call <4 x float> @llvm.amdgcn.image.sample.b.cl.2d.v4f32.f16.f16(i32 15, half %bias, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
476  ret <4 x float> %v
477}
478
479define amdgpu_ps <4 x float> @sample_c_b_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, float %zcompare, half %s, half %clamp) {
480; GFX9-LABEL: sample_c_b_cl_1d:
481; GFX9:       ; %bb.0: ; %main_body
482; GFX9-NEXT:    s_mov_b64 s[12:13], exec
483; GFX9-NEXT:    s_wqm_b64 exec, exec
484; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
485; GFX9-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
486; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
487; GFX9-NEXT:    image_sample_c_b_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
488; GFX9-NEXT:    s_waitcnt vmcnt(0)
489; GFX9-NEXT:    ; return to shader part epilog
490;
491; GFX10-LABEL: sample_c_b_cl_1d:
492; GFX10:       ; %bb.0: ; %main_body
493; GFX10-NEXT:    s_mov_b32 s12, exec_lo
494; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
495; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
496; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
497; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
498; GFX10-NEXT:    image_sample_c_b_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
499; GFX10-NEXT:    s_waitcnt vmcnt(0)
500; GFX10-NEXT:    ; return to shader part epilog
501main_body:
502  %v = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.1d.v4f32.f16.f16(i32 15, half %bias, float %zcompare, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
503  ret <4 x float> %v
504}
505
506define amdgpu_ps <4 x float> @sample_c_b_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %bias, float %zcompare, half %s, half %t, half %clamp) {
507; GFX9-LABEL: sample_c_b_cl_2d:
508; GFX9:       ; %bb.0: ; %main_body
509; GFX9-NEXT:    s_mov_b64 s[12:13], exec
510; GFX9-NEXT:    s_wqm_b64 exec, exec
511; GFX9-NEXT:    v_mov_b32_e32 v7, v4
512; GFX9-NEXT:    v_mov_b32_e32 v4, v0
513; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v2
514; GFX9-NEXT:    v_mov_b32_e32 v5, v1
515; GFX9-NEXT:    v_lshl_or_b32 v6, v3, 16, v0
516; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
517; GFX9-NEXT:    image_sample_c_b_cl v[0:3], v[4:7], s[0:7], s[8:11] dmask:0xf a16
518; GFX9-NEXT:    s_waitcnt vmcnt(0)
519; GFX9-NEXT:    ; return to shader part epilog
520;
521; GFX10-LABEL: sample_c_b_cl_2d:
522; GFX10:       ; %bb.0: ; %main_body
523; GFX10-NEXT:    s_mov_b32 s12, exec_lo
524; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
525; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
526; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
527; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
528; GFX10-NEXT:    image_sample_c_b_cl v[0:3], [v0, v1, v2, v4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
529; GFX10-NEXT:    s_waitcnt vmcnt(0)
530; GFX10-NEXT:    ; return to shader part epilog
531main_body:
532  %v = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.2d.v4f32.f16.f16(i32 15, half %bias, float %zcompare, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
533  ret <4 x float> %v
534}
535
536define amdgpu_ps <4 x float> @sample_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, half %s) {
537; GFX9-LABEL: sample_d_1d:
538; GFX9:       ; %bb.0: ; %main_body
539; GFX9-NEXT:    image_sample_d v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
540; GFX9-NEXT:    s_waitcnt vmcnt(0)
541; GFX9-NEXT:    ; return to shader part epilog
542;
543; GFX10-LABEL: sample_d_1d:
544; GFX10:       ; %bb.0: ; %main_body
545; GFX10-NEXT:    image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
546; GFX10-NEXT:    s_waitcnt vmcnt(0)
547; GFX10-NEXT:    ; return to shader part epilog
548main_body:
549  %v = call <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f16(i32 15, half %dsdh, half %dsdv, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
550  ret <4 x float> %v
551}
552
553define amdgpu_ps <4 x float> @sample_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t) {
554; GFX9-LABEL: sample_d_2d:
555; GFX9:       ; %bb.0: ; %main_body
556; GFX9-NEXT:    v_and_b32_e32 v4, 0xffff, v4
557; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
558; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
559; GFX9-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
560; GFX9-NEXT:    v_lshl_or_b32 v3, v3, 16, v2
561; GFX9-NEXT:    v_lshl_or_b32 v2, v1, 16, v0
562; GFX9-NEXT:    image_sample_d v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf a16
563; GFX9-NEXT:    s_waitcnt vmcnt(0)
564; GFX9-NEXT:    ; return to shader part epilog
565;
566; GFX10-LABEL: sample_d_2d:
567; GFX10:       ; %bb.0: ; %main_body
568; GFX10-NEXT:    v_and_b32_e32 v4, 0xffff, v4
569; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
570; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
571; GFX10-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
572; GFX10-NEXT:    v_lshl_or_b32 v3, v3, 16, v2
573; GFX10-NEXT:    v_lshl_or_b32 v2, v1, 16, v0
574; GFX10-NEXT:    image_sample_d_g16 v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
575; GFX10-NEXT:    s_waitcnt vmcnt(0)
576; GFX10-NEXT:    ; return to shader part epilog
577main_body:
578  %v = call <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f16(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
579  ret <4 x float> %v
580}
581
582define amdgpu_ps <4 x float> @sample_d_3d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, half %s, half %t, half %r) {
583; GFX9-LABEL: sample_d_3d:
584; GFX9:       ; %bb.0: ; %main_body
585; GFX9-NEXT:    v_mov_b32_e32 v12, v8
586; GFX9-NEXT:    v_mov_b32_e32 v8, v2
587; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v6
588; GFX9-NEXT:    v_lshl_or_b32 v11, v7, 16, v2
589; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v3
590; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
591; GFX9-NEXT:    v_mov_b32_e32 v10, v5
592; GFX9-NEXT:    v_lshl_or_b32 v9, v4, 16, v2
593; GFX9-NEXT:    v_lshl_or_b32 v7, v1, 16, v0
594; GFX9-NEXT:    image_sample_d v[0:3], v[7:12], s[0:7], s[8:11] dmask:0xf a16
595; GFX9-NEXT:    s_waitcnt vmcnt(0)
596; GFX9-NEXT:    ; return to shader part epilog
597;
598; GFX10-LABEL: sample_d_3d:
599; GFX10:       ; %bb.0: ; %main_body
600; GFX10-NEXT:    v_mov_b32_e32 v12, v8
601; GFX10-NEXT:    v_mov_b32_e32 v8, v2
602; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v6
603; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
604; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
605; GFX10-NEXT:    v_mov_b32_e32 v10, v5
606; GFX10-NEXT:    v_lshl_or_b32 v11, v7, 16, v2
607; GFX10-NEXT:    v_lshl_or_b32 v9, v4, 16, v3
608; GFX10-NEXT:    v_lshl_or_b32 v7, v1, 16, v0
609; GFX10-NEXT:    image_sample_d_g16 v[0:3], v[7:12], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16
610; GFX10-NEXT:    s_waitcnt vmcnt(0)
611; GFX10-NEXT:    ; return to shader part epilog
612main_body:
613  %v = call <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f16(i32 15, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, half %s, half %t, half %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
614  ret <4 x float> %v
615}
616
617define amdgpu_ps <4 x float> @sample_c_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, half %s) {
618; GFX9-LABEL: sample_c_d_1d:
619; GFX9:       ; %bb.0: ; %main_body
620; GFX9-NEXT:    image_sample_c_d v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
621; GFX9-NEXT:    s_waitcnt vmcnt(0)
622; GFX9-NEXT:    ; return to shader part epilog
623;
624; GFX10-LABEL: sample_c_d_1d:
625; GFX10:       ; %bb.0: ; %main_body
626; GFX10-NEXT:    image_sample_c_d_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
627; GFX10-NEXT:    s_waitcnt vmcnt(0)
628; GFX10-NEXT:    ; return to shader part epilog
629main_body:
630  %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dsdv, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
631  ret <4 x float> %v
632}
633
634define amdgpu_ps <4 x float> @sample_c_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t) {
635; GFX9-LABEL: sample_c_d_2d:
636; GFX9:       ; %bb.0: ; %main_body
637; GFX9-NEXT:    v_mov_b32_e32 v7, v3
638; GFX9-NEXT:    v_mov_b32_e32 v8, v2
639; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v5
640; GFX9-NEXT:    v_lshl_or_b32 v3, v6, 16, v2
641; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v7
642; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
643; GFX9-NEXT:    v_lshl_or_b32 v2, v4, 16, v2
644; GFX9-NEXT:    v_lshl_or_b32 v1, v8, 16, v1
645; GFX9-NEXT:    image_sample_c_d v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
646; GFX9-NEXT:    s_waitcnt vmcnt(0)
647; GFX9-NEXT:    ; return to shader part epilog
648;
649; GFX10-LABEL: sample_c_d_2d:
650; GFX10:       ; %bb.0: ; %main_body
651; GFX10-NEXT:    v_and_b32_e32 v5, 0xffff, v5
652; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
653; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
654; GFX10-NEXT:    v_lshl_or_b32 v5, v6, 16, v5
655; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
656; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
657; GFX10-NEXT:    image_sample_c_d_g16 v[0:3], [v0, v1, v3, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
658; GFX10-NEXT:    s_waitcnt vmcnt(0)
659; GFX10-NEXT:    ; return to shader part epilog
660main_body:
661  %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
662  ret <4 x float> %v
663}
664
665define amdgpu_ps <4 x float> @sample_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, half %s, half %clamp) {
666; GFX9-LABEL: sample_d_cl_1d:
667; GFX9:       ; %bb.0: ; %main_body
668; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
669; GFX9-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
670; GFX9-NEXT:    image_sample_d_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
671; GFX9-NEXT:    s_waitcnt vmcnt(0)
672; GFX9-NEXT:    ; return to shader part epilog
673;
674; GFX10-LABEL: sample_d_cl_1d:
675; GFX10:       ; %bb.0: ; %main_body
676; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
677; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
678; GFX10-NEXT:    image_sample_d_cl_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
679; GFX10-NEXT:    s_waitcnt vmcnt(0)
680; GFX10-NEXT:    ; return to shader part epilog
681main_body:
682  %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f16(i32 15, half %dsdh, half %dsdv, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
683  ret <4 x float> %v
684}
685
686define amdgpu_ps <4 x float> @sample_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp) {
687; GFX9-LABEL: sample_d_cl_2d:
688; GFX9:       ; %bb.0: ; %main_body
689; GFX9-NEXT:    v_and_b32_e32 v4, 0xffff, v4
690; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
691; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
692; GFX9-NEXT:    v_lshl_or_b32 v5, v5, 16, v4
693; GFX9-NEXT:    v_lshl_or_b32 v4, v3, 16, v2
694; GFX9-NEXT:    v_lshl_or_b32 v3, v1, 16, v0
695; GFX9-NEXT:    image_sample_d_cl v[0:3], v[3:6], s[0:7], s[8:11] dmask:0xf a16
696; GFX9-NEXT:    s_waitcnt vmcnt(0)
697; GFX9-NEXT:    ; return to shader part epilog
698;
699; GFX10-LABEL: sample_d_cl_2d:
700; GFX10:       ; %bb.0: ; %main_body
701; GFX10-NEXT:    v_and_b32_e32 v4, 0xffff, v4
702; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
703; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
704; GFX10-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
705; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
706; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
707; GFX10-NEXT:    image_sample_d_cl_g16 v[0:3], [v0, v2, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
708; GFX10-NEXT:    s_waitcnt vmcnt(0)
709; GFX10-NEXT:    ; return to shader part epilog
710main_body:
711  %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f16(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
712  ret <4 x float> %v
713}
714
715define amdgpu_ps <4 x float> @sample_c_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, half %s, half %clamp) {
716; GFX9-LABEL: sample_c_d_cl_1d:
717; GFX9:       ; %bb.0: ; %main_body
718; GFX9-NEXT:    v_and_b32_e32 v3, 0xffff, v3
719; GFX9-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
720; GFX9-NEXT:    image_sample_c_d_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
721; GFX9-NEXT:    s_waitcnt vmcnt(0)
722; GFX9-NEXT:    ; return to shader part epilog
723;
724; GFX10-LABEL: sample_c_d_cl_1d:
725; GFX10:       ; %bb.0: ; %main_body
726; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
727; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
728; GFX10-NEXT:    image_sample_c_d_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
729; GFX10-NEXT:    s_waitcnt vmcnt(0)
730; GFX10-NEXT:    ; return to shader part epilog
731main_body:
732  %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dsdv, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
733  ret <4 x float> %v
734}
735
736define amdgpu_ps <4 x float> @sample_c_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp) {
737; GFX9-LABEL: sample_c_d_cl_2d:
738; GFX9:       ; %bb.0: ; %main_body
739; GFX9-NEXT:    v_mov_b32_e32 v11, v7
740; GFX9-NEXT:    v_mov_b32_e32 v7, v0
741; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v5
742; GFX9-NEXT:    v_lshl_or_b32 v10, v6, 16, v0
743; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v3
744; GFX9-NEXT:    v_lshl_or_b32 v9, v4, 16, v0
745; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v1
746; GFX9-NEXT:    v_lshl_or_b32 v8, v2, 16, v0
747; GFX9-NEXT:    image_sample_c_d_cl v[0:3], v[7:11], s[0:7], s[8:11] dmask:0xf a16
748; GFX9-NEXT:    s_waitcnt vmcnt(0)
749; GFX9-NEXT:    ; return to shader part epilog
750;
751; GFX10-LABEL: sample_c_d_cl_2d:
752; GFX10:       ; %bb.0: ; %main_body
753; GFX10-NEXT:    v_and_b32_e32 v5, 0xffff, v5
754; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
755; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
756; GFX10-NEXT:    v_lshl_or_b32 v5, v6, 16, v5
757; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
758; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
759; GFX10-NEXT:    image_sample_c_d_cl_g16 v[0:3], [v0, v1, v3, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
760; GFX10-NEXT:    s_waitcnt vmcnt(0)
761; GFX10-NEXT:    ; return to shader part epilog
762main_body:
763  %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
764  ret <4 x float> %v
765}
766
767define amdgpu_ps <4 x float> @sample_cd_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, half %s) {
768; GFX9-LABEL: sample_cd_1d:
769; GFX9:       ; %bb.0: ; %main_body
770; GFX9-NEXT:    image_sample_cd v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
771; GFX9-NEXT:    s_waitcnt vmcnt(0)
772; GFX9-NEXT:    ; return to shader part epilog
773;
774; GFX10-LABEL: sample_cd_1d:
775; GFX10:       ; %bb.0: ; %main_body
776; GFX10-NEXT:    image_sample_cd_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
777; GFX10-NEXT:    s_waitcnt vmcnt(0)
778; GFX10-NEXT:    ; return to shader part epilog
779main_body:
780  %v = call <4 x float> @llvm.amdgcn.image.sample.cd.1d.v4f32.f16.f16(i32 15, half %dsdh, half %dsdv, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
781  ret <4 x float> %v
782}
783
784define amdgpu_ps <4 x float> @sample_cd_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t) {
785; GFX9-LABEL: sample_cd_2d:
786; GFX9:       ; %bb.0: ; %main_body
787; GFX9-NEXT:    v_and_b32_e32 v4, 0xffff, v4
788; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
789; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
790; GFX9-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
791; GFX9-NEXT:    v_lshl_or_b32 v3, v3, 16, v2
792; GFX9-NEXT:    v_lshl_or_b32 v2, v1, 16, v0
793; GFX9-NEXT:    image_sample_cd v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf a16
794; GFX9-NEXT:    s_waitcnt vmcnt(0)
795; GFX9-NEXT:    ; return to shader part epilog
796;
797; GFX10-LABEL: sample_cd_2d:
798; GFX10:       ; %bb.0: ; %main_body
799; GFX10-NEXT:    v_and_b32_e32 v4, 0xffff, v4
800; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
801; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
802; GFX10-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
803; GFX10-NEXT:    v_lshl_or_b32 v3, v3, 16, v2
804; GFX10-NEXT:    v_lshl_or_b32 v2, v1, 16, v0
805; GFX10-NEXT:    image_sample_cd_g16 v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
806; GFX10-NEXT:    s_waitcnt vmcnt(0)
807; GFX10-NEXT:    ; return to shader part epilog
808main_body:
809  %v = call <4 x float> @llvm.amdgcn.image.sample.cd.2d.v4f32.f16.f16(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
810  ret <4 x float> %v
811}
812
813define amdgpu_ps <4 x float> @sample_c_cd_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, half %s) {
814; GFX9-LABEL: sample_c_cd_1d:
815; GFX9:       ; %bb.0: ; %main_body
816; GFX9-NEXT:    image_sample_c_cd v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
817; GFX9-NEXT:    s_waitcnt vmcnt(0)
818; GFX9-NEXT:    ; return to shader part epilog
819;
820; GFX10-LABEL: sample_c_cd_1d:
821; GFX10:       ; %bb.0: ; %main_body
822; GFX10-NEXT:    image_sample_c_cd_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
823; GFX10-NEXT:    s_waitcnt vmcnt(0)
824; GFX10-NEXT:    ; return to shader part epilog
825main_body:
826  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.1d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dsdv, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
827  ret <4 x float> %v
828}
829
830define amdgpu_ps <4 x float> @sample_c_cd_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t) {
831; GFX9-LABEL: sample_c_cd_2d:
832; GFX9:       ; %bb.0: ; %main_body
833; GFX9-NEXT:    v_mov_b32_e32 v7, v3
834; GFX9-NEXT:    v_mov_b32_e32 v8, v2
835; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v5
836; GFX9-NEXT:    v_lshl_or_b32 v3, v6, 16, v2
837; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v7
838; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
839; GFX9-NEXT:    v_lshl_or_b32 v2, v4, 16, v2
840; GFX9-NEXT:    v_lshl_or_b32 v1, v8, 16, v1
841; GFX9-NEXT:    image_sample_c_cd v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
842; GFX9-NEXT:    s_waitcnt vmcnt(0)
843; GFX9-NEXT:    ; return to shader part epilog
844;
845; GFX10-LABEL: sample_c_cd_2d:
846; GFX10:       ; %bb.0: ; %main_body
847; GFX10-NEXT:    v_and_b32_e32 v5, 0xffff, v5
848; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
849; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
850; GFX10-NEXT:    v_lshl_or_b32 v5, v6, 16, v5
851; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
852; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
853; GFX10-NEXT:    image_sample_c_cd_g16 v[0:3], [v0, v1, v3, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
854; GFX10-NEXT:    s_waitcnt vmcnt(0)
855; GFX10-NEXT:    ; return to shader part epilog
856main_body:
857  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.2d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
858  ret <4 x float> %v
859}
860
861define amdgpu_ps <4 x float> @sample_cd_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, half %s, half %clamp) {
862; GFX9-LABEL: sample_cd_cl_1d:
863; GFX9:       ; %bb.0: ; %main_body
864; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
865; GFX9-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
866; GFX9-NEXT:    image_sample_cd_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf a16
867; GFX9-NEXT:    s_waitcnt vmcnt(0)
868; GFX9-NEXT:    ; return to shader part epilog
869;
870; GFX10-LABEL: sample_cd_cl_1d:
871; GFX10:       ; %bb.0: ; %main_body
872; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
873; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
874; GFX10-NEXT:    image_sample_cd_cl_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
875; GFX10-NEXT:    s_waitcnt vmcnt(0)
876; GFX10-NEXT:    ; return to shader part epilog
877main_body:
878  %v = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.1d.v4f32.f16.f16(i32 15, half %dsdh, half %dsdv, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
879  ret <4 x float> %v
880}
881
882define amdgpu_ps <4 x float> @sample_cd_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp) {
883; GFX9-LABEL: sample_cd_cl_2d:
884; GFX9:       ; %bb.0: ; %main_body
885; GFX9-NEXT:    v_and_b32_e32 v4, 0xffff, v4
886; GFX9-NEXT:    v_and_b32_e32 v2, 0xffff, v2
887; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
888; GFX9-NEXT:    v_lshl_or_b32 v5, v5, 16, v4
889; GFX9-NEXT:    v_lshl_or_b32 v4, v3, 16, v2
890; GFX9-NEXT:    v_lshl_or_b32 v3, v1, 16, v0
891; GFX9-NEXT:    image_sample_cd_cl v[0:3], v[3:6], s[0:7], s[8:11] dmask:0xf a16
892; GFX9-NEXT:    s_waitcnt vmcnt(0)
893; GFX9-NEXT:    ; return to shader part epilog
894;
895; GFX10-LABEL: sample_cd_cl_2d:
896; GFX10:       ; %bb.0: ; %main_body
897; GFX10-NEXT:    v_and_b32_e32 v4, 0xffff, v4
898; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
899; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
900; GFX10-NEXT:    v_lshl_or_b32 v4, v5, 16, v4
901; GFX10-NEXT:    v_lshl_or_b32 v2, v3, 16, v2
902; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
903; GFX10-NEXT:    image_sample_cd_cl_g16 v[0:3], [v0, v2, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
904; GFX10-NEXT:    s_waitcnt vmcnt(0)
905; GFX10-NEXT:    ; return to shader part epilog
906main_body:
907  %v = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.2d.v4f32.f16.f16(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
908  ret <4 x float> %v
909}
910
911define amdgpu_ps <4 x float> @sample_c_cd_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, half %s, half %clamp) {
912; GFX9-LABEL: sample_c_cd_cl_1d:
913; GFX9:       ; %bb.0: ; %main_body
914; GFX9-NEXT:    v_and_b32_e32 v3, 0xffff, v3
915; GFX9-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
916; GFX9-NEXT:    image_sample_c_cd_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf a16
917; GFX9-NEXT:    s_waitcnt vmcnt(0)
918; GFX9-NEXT:    ; return to shader part epilog
919;
920; GFX10-LABEL: sample_c_cd_cl_1d:
921; GFX10:       ; %bb.0: ; %main_body
922; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
923; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
924; GFX10-NEXT:    image_sample_c_cd_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
925; GFX10-NEXT:    s_waitcnt vmcnt(0)
926; GFX10-NEXT:    ; return to shader part epilog
927main_body:
928  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.1d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dsdv, half %s, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
929  ret <4 x float> %v
930}
931
932define amdgpu_ps <4 x float> @sample_c_cd_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp) {
933; GFX9-LABEL: sample_c_cd_cl_2d:
934; GFX9:       ; %bb.0: ; %main_body
935; GFX9-NEXT:    v_mov_b32_e32 v11, v7
936; GFX9-NEXT:    v_mov_b32_e32 v7, v0
937; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v5
938; GFX9-NEXT:    v_lshl_or_b32 v10, v6, 16, v0
939; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v3
940; GFX9-NEXT:    v_lshl_or_b32 v9, v4, 16, v0
941; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v1
942; GFX9-NEXT:    v_lshl_or_b32 v8, v2, 16, v0
943; GFX9-NEXT:    image_sample_c_cd_cl v[0:3], v[7:11], s[0:7], s[8:11] dmask:0xf a16
944; GFX9-NEXT:    s_waitcnt vmcnt(0)
945; GFX9-NEXT:    ; return to shader part epilog
946;
947; GFX10-LABEL: sample_c_cd_cl_2d:
948; GFX10:       ; %bb.0: ; %main_body
949; GFX10-NEXT:    v_and_b32_e32 v5, 0xffff, v5
950; GFX10-NEXT:    v_and_b32_e32 v3, 0xffff, v3
951; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
952; GFX10-NEXT:    v_lshl_or_b32 v5, v6, 16, v5
953; GFX10-NEXT:    v_lshl_or_b32 v3, v4, 16, v3
954; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
955; GFX10-NEXT:    image_sample_c_cd_cl_g16 v[0:3], [v0, v1, v3, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
956; GFX10-NEXT:    s_waitcnt vmcnt(0)
957; GFX10-NEXT:    ; return to shader part epilog
958main_body:
959  %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.2d.v4f32.f32.f16(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
960  ret <4 x float> %v
961}
962
963define amdgpu_ps <4 x float> @sample_l_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %lod) {
964; GFX9-LABEL: sample_l_1d:
965; GFX9:       ; %bb.0: ; %main_body
966; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
967; GFX9-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
968; GFX9-NEXT:    image_sample_l v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
969; GFX9-NEXT:    s_waitcnt vmcnt(0)
970; GFX9-NEXT:    ; return to shader part epilog
971;
972; GFX10-LABEL: sample_l_1d:
973; GFX10:       ; %bb.0: ; %main_body
974; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
975; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
976; GFX10-NEXT:    image_sample_l v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
977; GFX10-NEXT:    s_waitcnt vmcnt(0)
978; GFX10-NEXT:    ; return to shader part epilog
979main_body:
980  %v = call <4 x float> @llvm.amdgcn.image.sample.l.1d.v4f32.f16(i32 15, half %s, half %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
981  ret <4 x float> %v
982}
983
984define amdgpu_ps <4 x float> @sample_l_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t, half %lod) {
985; GFX9-LABEL: sample_l_2d:
986; GFX9:       ; %bb.0: ; %main_body
987; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
988; GFX9-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
989; GFX9-NEXT:    image_sample_l v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf a16
990; GFX9-NEXT:    s_waitcnt vmcnt(0)
991; GFX9-NEXT:    ; return to shader part epilog
992;
993; GFX10-LABEL: sample_l_2d:
994; GFX10:       ; %bb.0: ; %main_body
995; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
996; GFX10-NEXT:    v_lshl_or_b32 v1, v1, 16, v0
997; GFX10-NEXT:    image_sample_l v[0:3], v[1:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
998; GFX10-NEXT:    s_waitcnt vmcnt(0)
999; GFX10-NEXT:    ; return to shader part epilog
1000main_body:
1001  %v = call <4 x float> @llvm.amdgcn.image.sample.l.2d.v4f32.f16(i32 15, half %s, half %t, half %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1002  ret <4 x float> %v
1003}
1004
1005define amdgpu_ps <4 x float> @sample_c_l_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %lod) {
1006; GFX9-LABEL: sample_c_l_1d:
1007; GFX9:       ; %bb.0: ; %main_body
1008; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
1009; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
1010; GFX9-NEXT:    image_sample_c_l v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
1011; GFX9-NEXT:    s_waitcnt vmcnt(0)
1012; GFX9-NEXT:    ; return to shader part epilog
1013;
1014; GFX10-LABEL: sample_c_l_1d:
1015; GFX10:       ; %bb.0: ; %main_body
1016; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
1017; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
1018; GFX10-NEXT:    image_sample_c_l v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
1019; GFX10-NEXT:    s_waitcnt vmcnt(0)
1020; GFX10-NEXT:    ; return to shader part epilog
1021main_body:
1022  %v = call <4 x float> @llvm.amdgcn.image.sample.c.l.1d.v4f32.f16(i32 15, float %zcompare, half %s, half %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1023  ret <4 x float> %v
1024}
1025
1026define amdgpu_ps <4 x float> @sample_c_l_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %t, half %lod) {
1027; GFX9-LABEL: sample_c_l_2d:
1028; GFX9:       ; %bb.0: ; %main_body
1029; GFX9-NEXT:    v_mov_b32_e32 v5, v3
1030; GFX9-NEXT:    v_mov_b32_e32 v3, v0
1031; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v1
1032; GFX9-NEXT:    v_lshl_or_b32 v4, v2, 16, v0
1033; GFX9-NEXT:    image_sample_c_l v[0:3], v[3:5], s[0:7], s[8:11] dmask:0xf a16
1034; GFX9-NEXT:    s_waitcnt vmcnt(0)
1035; GFX9-NEXT:    ; return to shader part epilog
1036;
1037; GFX10-LABEL: sample_c_l_2d:
1038; GFX10:       ; %bb.0: ; %main_body
1039; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
1040; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
1041; GFX10-NEXT:    image_sample_c_l v[0:3], [v0, v1, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
1042; GFX10-NEXT:    s_waitcnt vmcnt(0)
1043; GFX10-NEXT:    ; return to shader part epilog
1044main_body:
1045  %v = call <4 x float> @llvm.amdgcn.image.sample.c.l.2d.v4f32.f16(i32 15, float %zcompare, half %s, half %t, half %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1046  ret <4 x float> %v
1047}
1048
1049define amdgpu_ps <4 x float> @sample_lz_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s) {
1050; GFX9-LABEL: sample_lz_1d:
1051; GFX9:       ; %bb.0: ; %main_body
1052; GFX9-NEXT:    image_sample_lz v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
1053; GFX9-NEXT:    s_waitcnt vmcnt(0)
1054; GFX9-NEXT:    ; return to shader part epilog
1055;
1056; GFX10-LABEL: sample_lz_1d:
1057; GFX10:       ; %bb.0: ; %main_body
1058; GFX10-NEXT:    image_sample_lz v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
1059; GFX10-NEXT:    s_waitcnt vmcnt(0)
1060; GFX10-NEXT:    ; return to shader part epilog
1061main_body:
1062  %v = call <4 x float> @llvm.amdgcn.image.sample.lz.1d.v4f32.f16(i32 15, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1063  ret <4 x float> %v
1064}
1065
1066define amdgpu_ps <4 x float> @sample_lz_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t) {
1067; GFX9-LABEL: sample_lz_2d:
1068; GFX9:       ; %bb.0: ; %main_body
1069; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v0
1070; GFX9-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
1071; GFX9-NEXT:    image_sample_lz v[0:3], v0, s[0:7], s[8:11] dmask:0xf a16
1072; GFX9-NEXT:    s_waitcnt vmcnt(0)
1073; GFX9-NEXT:    ; return to shader part epilog
1074;
1075; GFX10-LABEL: sample_lz_2d:
1076; GFX10:       ; %bb.0: ; %main_body
1077; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0
1078; GFX10-NEXT:    v_lshl_or_b32 v0, v1, 16, v0
1079; GFX10-NEXT:    image_sample_lz v[0:3], v0, s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
1080; GFX10-NEXT:    s_waitcnt vmcnt(0)
1081; GFX10-NEXT:    ; return to shader part epilog
1082main_body:
1083  %v = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f16(i32 15, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1084  ret <4 x float> %v
1085}
1086
1087define amdgpu_ps <4 x float> @sample_c_lz_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s) {
1088; GFX9-LABEL: sample_c_lz_1d:
1089; GFX9:       ; %bb.0: ; %main_body
1090; GFX9-NEXT:    image_sample_c_lz v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
1091; GFX9-NEXT:    s_waitcnt vmcnt(0)
1092; GFX9-NEXT:    ; return to shader part epilog
1093;
1094; GFX10-LABEL: sample_c_lz_1d:
1095; GFX10:       ; %bb.0: ; %main_body
1096; GFX10-NEXT:    image_sample_c_lz v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
1097; GFX10-NEXT:    s_waitcnt vmcnt(0)
1098; GFX10-NEXT:    ; return to shader part epilog
1099main_body:
1100  %v = call <4 x float> @llvm.amdgcn.image.sample.c.lz.1d.v4f32.f16(i32 15, float %zcompare, half %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1101  ret <4 x float> %v
1102}
1103
1104define amdgpu_ps <4 x float> @sample_c_lz_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %s, half %t) {
1105; GFX9-LABEL: sample_c_lz_2d:
1106; GFX9:       ; %bb.0: ; %main_body
1107; GFX9-NEXT:    v_and_b32_e32 v1, 0xffff, v1
1108; GFX9-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
1109; GFX9-NEXT:    image_sample_c_lz v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf a16
1110; GFX9-NEXT:    s_waitcnt vmcnt(0)
1111; GFX9-NEXT:    ; return to shader part epilog
1112;
1113; GFX10-LABEL: sample_c_lz_2d:
1114; GFX10:       ; %bb.0: ; %main_body
1115; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v1
1116; GFX10-NEXT:    v_lshl_or_b32 v1, v2, 16, v1
1117; GFX10-NEXT:    image_sample_c_lz v[0:3], v[0:1], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
1118; GFX10-NEXT:    s_waitcnt vmcnt(0)
1119; GFX10-NEXT:    ; return to shader part epilog
1120main_body:
1121  %v = call <4 x float> @llvm.amdgcn.image.sample.c.lz.2d.v4f32.f16(i32 15, float %zcompare, half %s, half %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1122  ret <4 x float> %v
1123}
1124
1125define amdgpu_ps float @sample_c_d_o_2darray_V1(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %slice) {
1126; GFX9-LABEL: sample_c_d_o_2darray_V1:
1127; GFX9:       ; %bb.0: ; %main_body
1128; GFX9-NEXT:    v_mov_b32_e32 v13, v8
1129; GFX9-NEXT:    v_mov_b32_e32 v8, v0
1130; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v6
1131; GFX9-NEXT:    v_lshl_or_b32 v12, v7, 16, v0
1132; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v4
1133; GFX9-NEXT:    v_lshl_or_b32 v11, v5, 16, v0
1134; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v2
1135; GFX9-NEXT:    v_mov_b32_e32 v9, v1
1136; GFX9-NEXT:    v_lshl_or_b32 v10, v3, 16, v0
1137; GFX9-NEXT:    image_sample_c_d_o v0, v[8:13], s[0:7], s[8:11] dmask:0x4 a16 da
1138; GFX9-NEXT:    s_waitcnt vmcnt(0)
1139; GFX9-NEXT:    ; return to shader part epilog
1140;
1141; GFX10-LABEL: sample_c_d_o_2darray_V1:
1142; GFX10:       ; %bb.0: ; %main_body
1143; GFX10-NEXT:    v_mov_b32_e32 v13, v8
1144; GFX10-NEXT:    v_mov_b32_e32 v9, v1
1145; GFX10-NEXT:    v_mov_b32_e32 v8, v0
1146; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v6
1147; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v4
1148; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
1149; GFX10-NEXT:    v_lshl_or_b32 v12, v7, 16, v0
1150; GFX10-NEXT:    v_lshl_or_b32 v11, v5, 16, v1
1151; GFX10-NEXT:    v_lshl_or_b32 v10, v3, 16, v2
1152; GFX10-NEXT:    image_sample_c_d_o_g16 v0, v[8:13], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY a16
1153; GFX10-NEXT:    s_waitcnt vmcnt(0)
1154; GFX10-NEXT:    ; return to shader part epilog
1155main_body:
1156  %v = call float @llvm.amdgcn.image.sample.c.d.o.2darray.f32.f16.f16(i32 4, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1157  ret float %v
1158}
1159
1160define amdgpu_ps <2 x float> @sample_c_d_o_2darray_V2(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %slice) {
1161; GFX9-LABEL: sample_c_d_o_2darray_V2:
1162; GFX9:       ; %bb.0: ; %main_body
1163; GFX9-NEXT:    v_mov_b32_e32 v13, v8
1164; GFX9-NEXT:    v_mov_b32_e32 v8, v0
1165; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v6
1166; GFX9-NEXT:    v_lshl_or_b32 v12, v7, 16, v0
1167; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v4
1168; GFX9-NEXT:    v_lshl_or_b32 v11, v5, 16, v0
1169; GFX9-NEXT:    v_and_b32_e32 v0, 0xffff, v2
1170; GFX9-NEXT:    v_mov_b32_e32 v9, v1
1171; GFX9-NEXT:    v_lshl_or_b32 v10, v3, 16, v0
1172; GFX9-NEXT:    image_sample_c_d_o v[0:1], v[8:13], s[0:7], s[8:11] dmask:0x6 a16 da
1173; GFX9-NEXT:    s_waitcnt vmcnt(0)
1174; GFX9-NEXT:    ; return to shader part epilog
1175;
1176; GFX10-LABEL: sample_c_d_o_2darray_V2:
1177; GFX10:       ; %bb.0: ; %main_body
1178; GFX10-NEXT:    v_mov_b32_e32 v13, v8
1179; GFX10-NEXT:    v_mov_b32_e32 v9, v1
1180; GFX10-NEXT:    v_mov_b32_e32 v8, v0
1181; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v6
1182; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v4
1183; GFX10-NEXT:    v_and_b32_e32 v2, 0xffff, v2
1184; GFX10-NEXT:    v_lshl_or_b32 v12, v7, 16, v0
1185; GFX10-NEXT:    v_lshl_or_b32 v11, v5, 16, v1
1186; GFX10-NEXT:    v_lshl_or_b32 v10, v3, 16, v2
1187; GFX10-NEXT:    image_sample_c_d_o_g16 v[0:1], v[8:13], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY a16
1188; GFX10-NEXT:    s_waitcnt vmcnt(0)
1189; GFX10-NEXT:    ; return to shader part epilog
1190main_body:
1191  %v = call <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f32.f16(i32 6, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, half %s, half %t, half %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
1192  ret <2 x float> %v
1193}
1194
1195declare <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f16(i32, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1196declare <8 x float> @llvm.amdgcn.image.sample.1d.v8f32.f16(i32, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1197declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1198declare <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1199declare <4 x float> @llvm.amdgcn.image.sample.cube.v4f32.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1200declare <4 x float> @llvm.amdgcn.image.sample.1darray.v4f32.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1201declare <4 x float> @llvm.amdgcn.image.sample.2darray.v4f32.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1202
1203declare <4 x float> @llvm.amdgcn.image.sample.c.1d.v4f32.f16(i32, float, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1204declare <4 x float> @llvm.amdgcn.image.sample.c.2d.v4f32.f16(i32, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1205declare <4 x float> @llvm.amdgcn.image.sample.cl.1d.v4f32.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1206declare <4 x float> @llvm.amdgcn.image.sample.cl.2d.v4f32.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1207declare <4 x float> @llvm.amdgcn.image.sample.c.cl.1d.v4f32.f16(i32, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1208declare <4 x float> @llvm.amdgcn.image.sample.c.cl.2d.v4f32.f16(i32, float, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1209
1210declare <4 x float> @llvm.amdgcn.image.sample.b.1d.v4f32.f16.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1211declare <4 x float> @llvm.amdgcn.image.sample.b.2d.v4f32.f16.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1212declare <4 x float> @llvm.amdgcn.image.sample.c.b.1d.v4f32.f16.f16(i32, half, float, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1213declare <4 x float> @llvm.amdgcn.image.sample.c.b.2d.v4f32.f16.f16(i32, half, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1214declare <4 x float> @llvm.amdgcn.image.sample.b.cl.1d.v4f32.f16.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1215declare <4 x float> @llvm.amdgcn.image.sample.b.cl.2d.v4f32.f16.f16(i32, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1216declare <4 x float> @llvm.amdgcn.image.sample.c.b.cl.1d.v4f32.f16.f16(i32, half, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1217declare <4 x float> @llvm.amdgcn.image.sample.c.b.cl.2d.v4f32.f16.f16(i32, half, float, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1218
1219declare <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1220declare <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f16(i32, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1221declare <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f16(i32, half, half, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1222declare <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f32.f16(i32, float, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1223declare <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f32.f16(i32, float, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1224declare <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f16(i32, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1225declare <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f16(i32, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1226declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f32.f16(i32, float, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1227declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f32.f16(i32, float, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1228
1229declare <4 x float> @llvm.amdgcn.image.sample.cd.1d.v4f32.f16.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1230declare <4 x float> @llvm.amdgcn.image.sample.cd.2d.v4f32.f16.f16(i32, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1231declare <4 x float> @llvm.amdgcn.image.sample.c.cd.1d.v4f32.f32.f16(i32, float, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1232declare <4 x float> @llvm.amdgcn.image.sample.c.cd.2d.v4f32.f32.f16(i32, float, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1233declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.1d.v4f32.f16.f16(i32, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1234declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.2d.v4f32.f16.f16(i32, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1235declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.1d.v4f32.f32.f16(i32, float, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1236declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.2d.v4f32.f32.f16(i32, float, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1237
1238declare <4 x float> @llvm.amdgcn.image.sample.l.1d.v4f32.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1239declare <4 x float> @llvm.amdgcn.image.sample.l.2d.v4f32.f16(i32, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1240declare <4 x float> @llvm.amdgcn.image.sample.c.l.1d.v4f32.f16(i32, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1241declare <4 x float> @llvm.amdgcn.image.sample.c.l.2d.v4f32.f16(i32, float, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1242
1243declare <4 x float> @llvm.amdgcn.image.sample.lz.1d.v4f32.f16(i32, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1244declare <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f16(i32, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1245declare <4 x float> @llvm.amdgcn.image.sample.c.lz.1d.v4f32.f16(i32, float, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1246declare <4 x float> @llvm.amdgcn.image.sample.c.lz.2d.v4f32.f16(i32, float, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1247
1248declare float @llvm.amdgcn.image.sample.c.d.o.2darray.f32.f16.f16(i32, i32, float, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1249declare <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f32.f16(i32, i32, float, half, half, half, half, half, half, half, <8 x i32>, <4 x i32>, i1, i32, i32) #1
1250
1251attributes #0 = { nounwind }
1252attributes #1 = { nounwind readonly }
1253attributes #2 = { nounwind readnone }
1254