1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX10 %s
4
5define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
6; GFX9-LABEL: load_1d:
7; GFX9:       ; %bb.0: ; %main_body
8; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
9; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
10; GFX9-NEXT:    ; return to shader part epilog
11;
12; GFX10-LABEL: load_1d:
13; GFX10:       ; %bb.0: ; %main_body
14; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
15; GFX10-NEXT:    ; implicit-def: $vcc_hi
16; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
17; GFX10-NEXT:    ; return to shader part epilog
18main_body:
19  %s = extractelement <2 x i16> %coords, i32 0
20  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
21  ret <4 x float> %v
22}
23
24define amdgpu_ps <4 x float> @load_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
25; GFX9-LABEL: load_2d:
26; GFX9:       ; %bb.0: ; %main_body
27; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
28; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
29; GFX9-NEXT:    ; return to shader part epilog
30;
31; GFX10-LABEL: load_2d:
32; GFX10:       ; %bb.0: ; %main_body
33; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
34; GFX10-NEXT:    ; implicit-def: $vcc_hi
35; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
36; GFX10-NEXT:    ; return to shader part epilog
37main_body:
38  %s = extractelement <2 x i16> %coords, i32 0
39  %t = extractelement <2 x i16> %coords, i32 1
40  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
41  ret <4 x float> %v
42}
43
44define amdgpu_ps <4 x float> @load_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
45; GFX9-LABEL: load_3d:
46; GFX9:       ; %bb.0: ; %main_body
47; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
48; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
49; GFX9-NEXT:    ; return to shader part epilog
50;
51; GFX10-LABEL: load_3d:
52; GFX10:       ; %bb.0: ; %main_body
53; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
54; GFX10-NEXT:    ; implicit-def: $vcc_hi
55; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
56; GFX10-NEXT:    ; return to shader part epilog
57main_body:
58  %s = extractelement <2 x i16> %coords_lo, i32 0
59  %t = extractelement <2 x i16> %coords_lo, i32 1
60  %r = extractelement <2 x i16> %coords_hi, i32 0
61  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
62  ret <4 x float> %v
63}
64
65define amdgpu_ps <4 x float> @load_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
66; GFX9-LABEL: load_cube:
67; GFX9:       ; %bb.0: ; %main_body
68; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
69; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
70; GFX9-NEXT:    ; return to shader part epilog
71;
72; GFX10-LABEL: load_cube:
73; GFX10:       ; %bb.0: ; %main_body
74; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
75; GFX10-NEXT:    ; implicit-def: $vcc_hi
76; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
77; GFX10-NEXT:    ; return to shader part epilog
78main_body:
79  %s = extractelement <2 x i16> %coords_lo, i32 0
80  %t = extractelement <2 x i16> %coords_lo, i32 1
81  %slice = extractelement <2 x i16> %coords_hi, i32 0
82  %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
83  ret <4 x float> %v
84}
85
86define amdgpu_ps <4 x float> @load_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
87; GFX9-LABEL: load_1darray:
88; GFX9:       ; %bb.0: ; %main_body
89; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
90; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
91; GFX9-NEXT:    ; return to shader part epilog
92;
93; GFX10-LABEL: load_1darray:
94; GFX10:       ; %bb.0: ; %main_body
95; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
96; GFX10-NEXT:    ; implicit-def: $vcc_hi
97; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
98; GFX10-NEXT:    ; return to shader part epilog
99main_body:
100  %s = extractelement <2 x i16> %coords, i32 0
101  %slice = extractelement <2 x i16> %coords, i32 1
102  %v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
103  ret <4 x float> %v
104}
105
106define amdgpu_ps <4 x float> @load_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
107; GFX9-LABEL: load_2darray:
108; GFX9:       ; %bb.0: ; %main_body
109; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
110; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
111; GFX9-NEXT:    ; return to shader part epilog
112;
113; GFX10-LABEL: load_2darray:
114; GFX10:       ; %bb.0: ; %main_body
115; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
116; GFX10-NEXT:    ; implicit-def: $vcc_hi
117; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
118; GFX10-NEXT:    ; return to shader part epilog
119main_body:
120  %s = extractelement <2 x i16> %coords_lo, i32 0
121  %t = extractelement <2 x i16> %coords_lo, i32 1
122  %slice = extractelement <2 x i16> %coords_hi, i32 0
123  %v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
124  ret <4 x float> %v
125}
126
127define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
128; GFX9-LABEL: load_2dmsaa:
129; GFX9:       ; %bb.0: ; %main_body
130; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
131; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
132; GFX9-NEXT:    ; return to shader part epilog
133;
134; GFX10-LABEL: load_2dmsaa:
135; GFX10:       ; %bb.0: ; %main_body
136; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
137; GFX10-NEXT:    ; implicit-def: $vcc_hi
138; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
139; GFX10-NEXT:    ; return to shader part epilog
140main_body:
141  %s = extractelement <2 x i16> %coords_lo, i32 0
142  %t = extractelement <2 x i16> %coords_lo, i32 1
143  %fragid = extractelement <2 x i16> %coords_hi, i32 0
144  %v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
145  ret <4 x float> %v
146}
147
148define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
149; GFX9-LABEL: load_2darraymsaa:
150; GFX9:       ; %bb.0: ; %main_body
151; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
152; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
153; GFX9-NEXT:    ; return to shader part epilog
154;
155; GFX10-LABEL: load_2darraymsaa:
156; GFX10:       ; %bb.0: ; %main_body
157; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
158; GFX10-NEXT:    ; implicit-def: $vcc_hi
159; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
160; GFX10-NEXT:    ; return to shader part epilog
161main_body:
162  %s = extractelement <2 x i16> %coords_lo, i32 0
163  %t = extractelement <2 x i16> %coords_lo, i32 1
164  %slice = extractelement <2 x i16> %coords_hi, i32 0
165  %fragid = extractelement <2 x i16> %coords_hi, i32 1
166  %v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
167  ret <4 x float> %v
168}
169
170define amdgpu_ps <4 x float> @load_mip_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
171; GFX9-LABEL: load_mip_1d:
172; GFX9:       ; %bb.0: ; %main_body
173; GFX9-NEXT:    image_load_mip v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
174; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
175; GFX9-NEXT:    ; return to shader part epilog
176;
177; GFX10-LABEL: load_mip_1d:
178; GFX10:       ; %bb.0: ; %main_body
179; GFX10-NEXT:    image_load_mip v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
180; GFX10-NEXT:    ; implicit-def: $vcc_hi
181; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
182; GFX10-NEXT:    ; return to shader part epilog
183main_body:
184  %s = extractelement <2 x i16> %coords, i32 0
185  %mip = extractelement <2 x i16> %coords, i32 1
186  %v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
187  ret <4 x float> %v
188}
189
190define amdgpu_ps <4 x float> @load_mip_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
191; GFX9-LABEL: load_mip_2d:
192; GFX9:       ; %bb.0: ; %main_body
193; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
194; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
195; GFX9-NEXT:    ; return to shader part epilog
196;
197; GFX10-LABEL: load_mip_2d:
198; GFX10:       ; %bb.0: ; %main_body
199; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
200; GFX10-NEXT:    ; implicit-def: $vcc_hi
201; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
202; GFX10-NEXT:    ; return to shader part epilog
203main_body:
204  %s = extractelement <2 x i16> %coords_lo, i32 0
205  %t = extractelement <2 x i16> %coords_lo, i32 1
206  %mip = extractelement <2 x i16> %coords_hi, i32 0
207  %v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
208  ret <4 x float> %v
209}
210
211define amdgpu_ps <4 x float> @load_mip_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
212; GFX9-LABEL: load_mip_3d:
213; GFX9:       ; %bb.0: ; %main_body
214; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
215; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
216; GFX9-NEXT:    ; return to shader part epilog
217;
218; GFX10-LABEL: load_mip_3d:
219; GFX10:       ; %bb.0: ; %main_body
220; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
221; GFX10-NEXT:    ; implicit-def: $vcc_hi
222; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
223; GFX10-NEXT:    ; return to shader part epilog
224main_body:
225  %s = extractelement <2 x i16> %coords_lo, i32 0
226  %t = extractelement <2 x i16> %coords_lo, i32 1
227  %r = extractelement <2 x i16> %coords_hi, i32 0
228  %mip = extractelement <2 x i16> %coords_hi, i32 1
229  %v = call <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
230  ret <4 x float> %v
231}
232
233define amdgpu_ps <4 x float> @load_mip_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
234; GFX9-LABEL: load_mip_cube:
235; GFX9:       ; %bb.0: ; %main_body
236; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
237; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
238; GFX9-NEXT:    ; return to shader part epilog
239;
240; GFX10-LABEL: load_mip_cube:
241; GFX10:       ; %bb.0: ; %main_body
242; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
243; GFX10-NEXT:    ; implicit-def: $vcc_hi
244; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
245; GFX10-NEXT:    ; return to shader part epilog
246main_body:
247  %s = extractelement <2 x i16> %coords_lo, i32 0
248  %t = extractelement <2 x i16> %coords_lo, i32 1
249  %slice = extractelement <2 x i16> %coords_hi, i32 0
250  %mip = extractelement <2 x i16> %coords_hi, i32 1
251  %v = call <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
252  ret <4 x float> %v
253}
254
255define amdgpu_ps <4 x float> @load_mip_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
256; GFX9-LABEL: load_mip_1darray:
257; GFX9:       ; %bb.0: ; %main_body
258; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
259; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
260; GFX9-NEXT:    ; return to shader part epilog
261;
262; GFX10-LABEL: load_mip_1darray:
263; GFX10:       ; %bb.0: ; %main_body
264; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
265; GFX10-NEXT:    ; implicit-def: $vcc_hi
266; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
267; GFX10-NEXT:    ; return to shader part epilog
268main_body:
269  %s = extractelement <2 x i16> %coords_lo, i32 0
270  %slice = extractelement <2 x i16> %coords_lo, i32 1
271  %mip = extractelement <2 x i16> %coords_hi, i32 0
272  %v = call <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
273  ret <4 x float> %v
274}
275
276define amdgpu_ps <4 x float> @load_mip_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
277; GFX9-LABEL: load_mip_2darray:
278; GFX9:       ; %bb.0: ; %main_body
279; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
280; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
281; GFX9-NEXT:    ; return to shader part epilog
282;
283; GFX10-LABEL: load_mip_2darray:
284; GFX10:       ; %bb.0: ; %main_body
285; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
286; GFX10-NEXT:    ; implicit-def: $vcc_hi
287; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
288; GFX10-NEXT:    ; return to shader part epilog
289main_body:
290  %s = extractelement <2 x i16> %coords_lo, i32 0
291  %t = extractelement <2 x i16> %coords_lo, i32 1
292  %slice = extractelement <2 x i16> %coords_hi, i32 0
293  %mip = extractelement <2 x i16> %coords_hi, i32 1
294  %v = call <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
295  ret <4 x float> %v
296}
297
298define amdgpu_ps void @store_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
299; GFX9-LABEL: store_1d:
300; GFX9:       ; %bb.0: ; %main_body
301; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
302; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
303;
304; GFX10-LABEL: store_1d:
305; GFX10:       ; %bb.0: ; %main_body
306; GFX10-NEXT:    ; implicit-def: $vcc_hi
307; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
308; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
309main_body:
310  %s = extractelement <2 x i16> %coords, i32 0
311  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
312  ret void
313}
314
315define amdgpu_ps void @store_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
316; GFX9-LABEL: store_2d:
317; GFX9:       ; %bb.0: ; %main_body
318; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
319; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
320;
321; GFX10-LABEL: store_2d:
322; GFX10:       ; %bb.0: ; %main_body
323; GFX10-NEXT:    ; implicit-def: $vcc_hi
324; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
325; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
326main_body:
327  %s = extractelement <2 x i16> %coords, i32 0
328  %t = extractelement <2 x i16> %coords, i32 1
329  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
330  ret void
331}
332
333define amdgpu_ps void @store_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
334; GFX9-LABEL: store_3d:
335; GFX9:       ; %bb.0: ; %main_body
336; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
337; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
338;
339; GFX10-LABEL: store_3d:
340; GFX10:       ; %bb.0: ; %main_body
341; GFX10-NEXT:    ; implicit-def: $vcc_hi
342; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
343; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
344main_body:
345  %s = extractelement <2 x i16> %coords_lo, i32 0
346  %t = extractelement <2 x i16> %coords_lo, i32 1
347  %r = extractelement <2 x i16> %coords_hi, i32 0
348  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
349  ret void
350}
351
352define amdgpu_ps void @store_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
353; GFX9-LABEL: store_cube:
354; GFX9:       ; %bb.0: ; %main_body
355; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
356; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
357;
358; GFX10-LABEL: store_cube:
359; GFX10:       ; %bb.0: ; %main_body
360; GFX10-NEXT:    ; implicit-def: $vcc_hi
361; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
362; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
363main_body:
364  %s = extractelement <2 x i16> %coords_lo, i32 0
365  %t = extractelement <2 x i16> %coords_lo, i32 1
366  %slice = extractelement <2 x i16> %coords_hi, i32 0
367  call void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
368  ret void
369}
370
371define amdgpu_ps void @store_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
372; GFX9-LABEL: store_1darray:
373; GFX9:       ; %bb.0: ; %main_body
374; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
375; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
376;
377; GFX10-LABEL: store_1darray:
378; GFX10:       ; %bb.0: ; %main_body
379; GFX10-NEXT:    ; implicit-def: $vcc_hi
380; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
381; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
382main_body:
383  %s = extractelement <2 x i16> %coords, i32 0
384  %slice = extractelement <2 x i16> %coords, i32 1
385  call void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
386  ret void
387}
388
389define amdgpu_ps void @store_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
390; GFX9-LABEL: store_2darray:
391; GFX9:       ; %bb.0: ; %main_body
392; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
393; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
394;
395; GFX10-LABEL: store_2darray:
396; GFX10:       ; %bb.0: ; %main_body
397; GFX10-NEXT:    ; implicit-def: $vcc_hi
398; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
399; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
400main_body:
401  %s = extractelement <2 x i16> %coords_lo, i32 0
402  %t = extractelement <2 x i16> %coords_lo, i32 1
403  %slice = extractelement <2 x i16> %coords_hi, i32 0
404  call void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
405  ret void
406}
407
408define amdgpu_ps void @store_2dmsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
409; GFX9-LABEL: store_2dmsaa:
410; GFX9:       ; %bb.0: ; %main_body
411; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
412; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
413;
414; GFX10-LABEL: store_2dmsaa:
415; GFX10:       ; %bb.0: ; %main_body
416; GFX10-NEXT:    ; implicit-def: $vcc_hi
417; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
418; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
419main_body:
420  %s = extractelement <2 x i16> %coords_lo, i32 0
421  %t = extractelement <2 x i16> %coords_lo, i32 1
422  %fragid = extractelement <2 x i16> %coords_hi, i32 0
423  call void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
424  ret void
425}
426
427define amdgpu_ps void @store_2darraymsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
428; GFX9-LABEL: store_2darraymsaa:
429; GFX9:       ; %bb.0: ; %main_body
430; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
431; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
432;
433; GFX10-LABEL: store_2darraymsaa:
434; GFX10:       ; %bb.0: ; %main_body
435; GFX10-NEXT:    ; implicit-def: $vcc_hi
436; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
437; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
438main_body:
439  %s = extractelement <2 x i16> %coords_lo, i32 0
440  %t = extractelement <2 x i16> %coords_lo, i32 1
441  %slice = extractelement <2 x i16> %coords_hi, i32 0
442  %fragid = extractelement <2 x i16> %coords_hi, i32 1
443  call void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
444  ret void
445}
446
447define amdgpu_ps void @store_mip_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
448; GFX9-LABEL: store_mip_1d:
449; GFX9:       ; %bb.0: ; %main_body
450; GFX9-NEXT:    image_store_mip v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
451; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
452;
453; GFX10-LABEL: store_mip_1d:
454; GFX10:       ; %bb.0: ; %main_body
455; GFX10-NEXT:    ; implicit-def: $vcc_hi
456; GFX10-NEXT:    image_store_mip v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
457; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
458main_body:
459  %s = extractelement <2 x i16> %coords, i32 0
460  %mip = extractelement <2 x i16> %coords, i32 1
461  call void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
462  ret void
463}
464
465define amdgpu_ps void @store_mip_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
466; GFX9-LABEL: store_mip_2d:
467; GFX9:       ; %bb.0: ; %main_body
468; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
469; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
470;
471; GFX10-LABEL: store_mip_2d:
472; GFX10:       ; %bb.0: ; %main_body
473; GFX10-NEXT:    ; implicit-def: $vcc_hi
474; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
475; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
476main_body:
477  %s = extractelement <2 x i16> %coords_lo, i32 0
478  %t = extractelement <2 x i16> %coords_lo, i32 1
479  %mip = extractelement <2 x i16> %coords_hi, i32 0
480  call void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
481  ret void
482}
483
484define amdgpu_ps void @store_mip_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
485; GFX9-LABEL: store_mip_3d:
486; GFX9:       ; %bb.0: ; %main_body
487; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
488; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
489;
490; GFX10-LABEL: store_mip_3d:
491; GFX10:       ; %bb.0: ; %main_body
492; GFX10-NEXT:    ; implicit-def: $vcc_hi
493; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
494; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
495main_body:
496  %s = extractelement <2 x i16> %coords_lo, i32 0
497  %t = extractelement <2 x i16> %coords_lo, i32 1
498  %r = extractelement <2 x i16> %coords_hi, i32 0
499  %mip = extractelement <2 x i16> %coords_hi, i32 1
500  call void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
501  ret void
502}
503
504define amdgpu_ps void @store_mip_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
505; GFX9-LABEL: store_mip_cube:
506; GFX9:       ; %bb.0: ; %main_body
507; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
508; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
509;
510; GFX10-LABEL: store_mip_cube:
511; GFX10:       ; %bb.0: ; %main_body
512; GFX10-NEXT:    ; implicit-def: $vcc_hi
513; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
514; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
515main_body:
516  %s = extractelement <2 x i16> %coords_lo, i32 0
517  %t = extractelement <2 x i16> %coords_lo, i32 1
518  %slice = extractelement <2 x i16> %coords_hi, i32 0
519  %mip = extractelement <2 x i16> %coords_hi, i32 1
520  call void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
521  ret void
522}
523
524define amdgpu_ps void @store_mip_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
525; GFX9-LABEL: store_mip_1darray:
526; GFX9:       ; %bb.0: ; %main_body
527; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
528; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
529;
530; GFX10-LABEL: store_mip_1darray:
531; GFX10:       ; %bb.0: ; %main_body
532; GFX10-NEXT:    ; implicit-def: $vcc_hi
533; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
534; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
535main_body:
536  %s = extractelement <2 x i16> %coords_lo, i32 0
537  %slice = extractelement <2 x i16> %coords_lo, i32 1
538  %mip = extractelement <2 x i16> %coords_hi, i32 0
539  call void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
540  ret void
541}
542
543define amdgpu_ps void @store_mip_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
544; GFX9-LABEL: store_mip_2darray:
545; GFX9:       ; %bb.0: ; %main_body
546; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
547; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
548;
549; GFX10-LABEL: store_mip_2darray:
550; GFX10:       ; %bb.0: ; %main_body
551; GFX10-NEXT:    ; implicit-def: $vcc_hi
552; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
553; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
554main_body:
555  %s = extractelement <2 x i16> %coords_lo, i32 0
556  %t = extractelement <2 x i16> %coords_lo, i32 1
557  %slice = extractelement <2 x i16> %coords_hi, i32 0
558  %mip = extractelement <2 x i16> %coords_hi, i32 1
559  call void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
560  ret void
561}
562
563define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
564; GFX9-LABEL: getresinfo_1d:
565; GFX9:       ; %bb.0: ; %main_body
566; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
567; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
568; GFX9-NEXT:    ; return to shader part epilog
569;
570; GFX10-LABEL: getresinfo_1d:
571; GFX10:       ; %bb.0: ; %main_body
572; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
573; GFX10-NEXT:    ; implicit-def: $vcc_hi
574; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
575; GFX10-NEXT:    ; return to shader part epilog
576main_body:
577  %mip = extractelement <2 x i16> %coords, i32 0
578  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
579  ret <4 x float> %v
580}
581
582define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
583; GFX9-LABEL: getresinfo_2d:
584; GFX9:       ; %bb.0: ; %main_body
585; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
586; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
587; GFX9-NEXT:    ; return to shader part epilog
588;
589; GFX10-LABEL: getresinfo_2d:
590; GFX10:       ; %bb.0: ; %main_body
591; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
592; GFX10-NEXT:    ; implicit-def: $vcc_hi
593; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
594; GFX10-NEXT:    ; return to shader part epilog
595main_body:
596  %mip = extractelement <2 x i16> %coords, i32 0
597  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
598  ret <4 x float> %v
599}
600
601define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
602; GFX9-LABEL: getresinfo_3d:
603; GFX9:       ; %bb.0: ; %main_body
604; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
605; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
606; GFX9-NEXT:    ; return to shader part epilog
607;
608; GFX10-LABEL: getresinfo_3d:
609; GFX10:       ; %bb.0: ; %main_body
610; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
611; GFX10-NEXT:    ; implicit-def: $vcc_hi
612; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
613; GFX10-NEXT:    ; return to shader part epilog
614main_body:
615  %mip = extractelement <2 x i16> %coords, i32 0
616  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
617  ret <4 x float> %v
618}
619
620define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
621; GFX9-LABEL: getresinfo_cube:
622; GFX9:       ; %bb.0: ; %main_body
623; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
624; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
625; GFX9-NEXT:    ; return to shader part epilog
626;
627; GFX10-LABEL: getresinfo_cube:
628; GFX10:       ; %bb.0: ; %main_body
629; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
630; GFX10-NEXT:    ; implicit-def: $vcc_hi
631; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
632; GFX10-NEXT:    ; return to shader part epilog
633main_body:
634  %mip = extractelement <2 x i16> %coords, i32 0
635  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
636  ret <4 x float> %v
637}
638
639define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
640; GFX9-LABEL: getresinfo_1darray:
641; GFX9:       ; %bb.0: ; %main_body
642; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
643; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
644; GFX9-NEXT:    ; return to shader part epilog
645;
646; GFX10-LABEL: getresinfo_1darray:
647; GFX10:       ; %bb.0: ; %main_body
648; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
649; GFX10-NEXT:    ; implicit-def: $vcc_hi
650; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
651; GFX10-NEXT:    ; return to shader part epilog
652main_body:
653  %mip = extractelement <2 x i16> %coords, i32 0
654  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
655  ret <4 x float> %v
656}
657
658define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
659; GFX9-LABEL: getresinfo_2darray:
660; GFX9:       ; %bb.0: ; %main_body
661; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
662; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
663; GFX9-NEXT:    ; return to shader part epilog
664;
665; GFX10-LABEL: getresinfo_2darray:
666; GFX10:       ; %bb.0: ; %main_body
667; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
668; GFX10-NEXT:    ; implicit-def: $vcc_hi
669; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
670; GFX10-NEXT:    ; return to shader part epilog
671main_body:
672  %mip = extractelement <2 x i16> %coords, i32 0
673  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
674  ret <4 x float> %v
675}
676
677define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
678; GFX9-LABEL: getresinfo_2dmsaa:
679; GFX9:       ; %bb.0: ; %main_body
680; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
681; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
682; GFX9-NEXT:    ; return to shader part epilog
683;
684; GFX10-LABEL: getresinfo_2dmsaa:
685; GFX10:       ; %bb.0: ; %main_body
686; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
687; GFX10-NEXT:    ; implicit-def: $vcc_hi
688; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
689; GFX10-NEXT:    ; return to shader part epilog
690main_body:
691  %mip = extractelement <2 x i16> %coords, i32 0
692  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
693  ret <4 x float> %v
694}
695
696define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
697; GFX9-LABEL: getresinfo_2darraymsaa:
698; GFX9:       ; %bb.0: ; %main_body
699; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
700; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
701; GFX9-NEXT:    ; return to shader part epilog
702;
703; GFX10-LABEL: getresinfo_2darraymsaa:
704; GFX10:       ; %bb.0: ; %main_body
705; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
706; GFX10-NEXT:    ; implicit-def: $vcc_hi
707; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
708; GFX10-NEXT:    ; return to shader part epilog
709main_body:
710  %mip = extractelement <2 x i16> %coords, i32 0
711  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
712  ret <4 x float> %v
713}
714
715define amdgpu_ps float @load_1d_V1(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
716; GFX9-LABEL: load_1d_V1:
717; GFX9:       ; %bb.0: ; %main_body
718; GFX9-NEXT:    image_load v0, v0, s[0:7] dmask:0x8 unorm a16 ; encoding: [0x00,0x98,0x00,0xf0,0x00,0x00,0x00,0x00]
719; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
720; GFX9-NEXT:    ; return to shader part epilog
721;
722; GFX10-LABEL: load_1d_V1:
723; GFX10:       ; %bb.0: ; %main_body
724; GFX10-NEXT:    image_load v0, v0, s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x18,0x00,0xf0,0x00,0x00,0x00,0x40]
725; GFX10-NEXT:    ; implicit-def: $vcc_hi
726; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
727; GFX10-NEXT:    ; return to shader part epilog
728main_body:
729  %s = extractelement <2 x i16> %coords, i32 0
730  %v = call float @llvm.amdgcn.image.load.1d.f32.i16(i32 8, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
731  ret float %v
732}
733
734define amdgpu_ps <2 x float> @load_1d_V2(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
735; GFX9-LABEL: load_1d_V2:
736; GFX9:       ; %bb.0: ; %main_body
737; GFX9-NEXT:    image_load v[0:1], v0, s[0:7] dmask:0x9 unorm a16 ; encoding: [0x00,0x99,0x00,0xf0,0x00,0x00,0x00,0x00]
738; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
739; GFX9-NEXT:    ; return to shader part epilog
740;
741; GFX10-LABEL: load_1d_V2:
742; GFX10:       ; %bb.0: ; %main_body
743; GFX10-NEXT:    image_load v[0:1], v0, s[0:7] dmask:0x9 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x19,0x00,0xf0,0x00,0x00,0x00,0x40]
744; GFX10-NEXT:    ; implicit-def: $vcc_hi
745; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
746; GFX10-NEXT:    ; return to shader part epilog
747main_body:
748  %s = extractelement <2 x i16> %coords, i32 0
749  %v = call <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32 9, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
750  ret <2 x float> %v
751}
752
753define amdgpu_ps void @store_1d_V1(<8 x i32> inreg %rsrc, float %vdata, <2 x i16> %coords) {
754; GFX9-LABEL: store_1d_V1:
755; GFX9:       ; %bb.0: ; %main_body
756; GFX9-NEXT:    image_store v0, v1, s[0:7] dmask:0x2 unorm a16 ; encoding: [0x00,0x92,0x20,0xf0,0x01,0x00,0x00,0x00]
757; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
758;
759; GFX10-LABEL: store_1d_V1:
760; GFX10:       ; %bb.0: ; %main_body
761; GFX10-NEXT:    ; implicit-def: $vcc_hi
762; GFX10-NEXT:    image_store v0, v1, s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x12,0x20,0xf0,0x01,0x00,0x00,0x40]
763; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
764main_body:
765  %s = extractelement <2 x i16> %coords, i32 0
766  call void @llvm.amdgcn.image.store.1d.f32.i16(float %vdata, i32 2, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
767  ret void
768}
769
770define amdgpu_ps void @store_1d_V2(<8 x i32> inreg %rsrc, <2 x float> %vdata, <2 x i16> %coords) {
771; GFX9-LABEL: store_1d_V2:
772; GFX9:       ; %bb.0: ; %main_body
773; GFX9-NEXT:    image_store v[0:1], v2, s[0:7] dmask:0xc unorm a16 ; encoding: [0x00,0x9c,0x20,0xf0,0x02,0x00,0x00,0x00]
774; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
775;
776; GFX10-LABEL: store_1d_V2:
777; GFX10:       ; %bb.0: ; %main_body
778; GFX10-NEXT:    ; implicit-def: $vcc_hi
779; GFX10-NEXT:    image_store v[0:1], v2, s[0:7] dmask:0xc dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1c,0x20,0xf0,0x02,0x00,0x00,0x40]
780; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
781main_body:
782  %s = extractelement <2 x i16> %coords, i32 0
783  call void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float> %vdata, i32 12, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
784  ret void
785}
786
787define amdgpu_ps <4 x float> @load_1d_glc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
788; GFX9-LABEL: load_1d_glc:
789; GFX9:       ; %bb.0: ; %main_body
790; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc a16 ; encoding: [0x00,0xbf,0x00,0xf0,0x00,0x00,0x00,0x00]
791; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
792; GFX9-NEXT:    ; return to shader part epilog
793;
794; GFX10-LABEL: load_1d_glc:
795; GFX10:       ; %bb.0: ; %main_body
796; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 ; encoding: [0x00,0x3f,0x00,0xf0,0x00,0x00,0x00,0x40]
797; GFX10-NEXT:    ; implicit-def: $vcc_hi
798; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
799; GFX10-NEXT:    ; return to shader part epilog
800main_body:
801  %s = extractelement <2 x i16> %coords, i32 0
802  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
803  ret <4 x float> %v
804}
805
806define amdgpu_ps <4 x float> @load_1d_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
807; GFX9-LABEL: load_1d_slc:
808; GFX9:       ; %bb.0: ; %main_body
809; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm slc a16 ; encoding: [0x00,0x9f,0x00,0xf2,0x00,0x00,0x00,0x00]
810; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
811; GFX9-NEXT:    ; return to shader part epilog
812;
813; GFX10-LABEL: load_1d_slc:
814; GFX10:       ; %bb.0: ; %main_body
815; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 ; encoding: [0x00,0x1f,0x00,0xf2,0x00,0x00,0x00,0x40]
816; GFX10-NEXT:    ; implicit-def: $vcc_hi
817; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
818; GFX10-NEXT:    ; return to shader part epilog
819main_body:
820  %s = extractelement <2 x i16> %coords, i32 0
821  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
822  ret <4 x float> %v
823}
824
825define amdgpu_ps <4 x float> @load_1d_glc_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
826; GFX9-LABEL: load_1d_glc_slc:
827; GFX9:       ; %bb.0: ; %main_body
828; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc slc a16 ; encoding: [0x00,0xbf,0x00,0xf2,0x00,0x00,0x00,0x00]
829; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
830; GFX9-NEXT:    ; return to shader part epilog
831;
832; GFX10-LABEL: load_1d_glc_slc:
833; GFX10:       ; %bb.0: ; %main_body
834; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 ; encoding: [0x00,0x3f,0x00,0xf2,0x00,0x00,0x00,0x40]
835; GFX10-NEXT:    ; implicit-def: $vcc_hi
836; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
837; GFX10-NEXT:    ; return to shader part epilog
838main_body:
839  %s = extractelement <2 x i16> %coords, i32 0
840  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
841  ret <4 x float> %v
842}
843
844define amdgpu_ps void @store_1d_glc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
845; GFX9-LABEL: store_1d_glc:
846; GFX9:       ; %bb.0: ; %main_body
847; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc a16 ; encoding: [0x00,0xbf,0x20,0xf0,0x04,0x00,0x00,0x00]
848; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
849;
850; GFX10-LABEL: store_1d_glc:
851; GFX10:       ; %bb.0: ; %main_body
852; GFX10-NEXT:    ; implicit-def: $vcc_hi
853; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 ; encoding: [0x00,0x3f,0x20,0xf0,0x04,0x00,0x00,0x40]
854; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
855main_body:
856  %s = extractelement <2 x i16> %coords, i32 0
857  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
858  ret void
859}
860
861define amdgpu_ps void @store_1d_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
862; GFX9-LABEL: store_1d_slc:
863; GFX9:       ; %bb.0: ; %main_body
864; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm slc a16 ; encoding: [0x00,0x9f,0x20,0xf2,0x04,0x00,0x00,0x00]
865; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
866;
867; GFX10-LABEL: store_1d_slc:
868; GFX10:       ; %bb.0: ; %main_body
869; GFX10-NEXT:    ; implicit-def: $vcc_hi
870; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 ; encoding: [0x00,0x1f,0x20,0xf2,0x04,0x00,0x00,0x40]
871; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
872main_body:
873  %s = extractelement <2 x i16> %coords, i32 0
874  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
875  ret void
876}
877
878define amdgpu_ps void @store_1d_glc_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
879; GFX9-LABEL: store_1d_glc_slc:
880; GFX9:       ; %bb.0: ; %main_body
881; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc slc a16 ; encoding: [0x00,0xbf,0x20,0xf2,0x04,0x00,0x00,0x00]
882; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
883;
884; GFX10-LABEL: store_1d_glc_slc:
885; GFX10:       ; %bb.0: ; %main_body
886; GFX10-NEXT:    ; implicit-def: $vcc_hi
887; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 ; encoding: [0x00,0x3f,0x20,0xf2,0x04,0x00,0x00,0x40]
888; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
889main_body:
890  %s = extractelement <2 x i16> %coords, i32 0
891  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
892  ret void
893}
894
895define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) #0 {
896; GFX9-LABEL: getresinfo_dmask0:
897; GFX9:       ; %bb.0: ; %main_body
898; GFX9-NEXT:    ; return to shader part epilog
899;
900; GFX10-LABEL: getresinfo_dmask0:
901; GFX10:       ; %bb.0: ; %main_body
902; GFX10-NEXT:    ; implicit-def: $vcc_hi
903; GFX10-NEXT:    ; return to shader part epilog
904main_body:
905  %mip = extractelement <2 x i16> %coords, i32 0
906  %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
907  ret <4 x float> %r
908}
909
910declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #1
911declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
912declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
913declare <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
914declare <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
915declare <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
916declare <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
917declare <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
918
919declare <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
920declare <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
921declare <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
922declare <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
923declare <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
924declare <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
925
926declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #0
927declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
928declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
929declare void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
930declare void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
931declare void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
932declare void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
933declare void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
934
935declare void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
936declare void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
937declare void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
938declare void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
939declare void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
940declare void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
941
942declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
943declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
944declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
945declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
946declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
947declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
948declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
949declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
950
951declare float @llvm.amdgcn.image.load.1d.f32.i16(i32, i16, <8 x i32>, i32, i32) #1
952declare float @llvm.amdgcn.image.load.2d.f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
953declare <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32, i16, <8 x i32>, i32, i32) #1
954declare void @llvm.amdgcn.image.store.1d.f32.i16(float, i32, i16, <8 x i32>, i32, i32) #0
955declare void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float>, i32, i16, <8 x i32>, i32, i32) #0
956
957attributes #0 = { nounwind }
958attributes #1 = { nounwind readonly }
959attributes #2 = { nounwind readnone }
960