1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s 3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s 4; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s 5 6define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 7; GFX9-LABEL: load_1d: 8; GFX9: ; %bb.0: ; %main_body 9; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 10; GFX9-NEXT: s_waitcnt vmcnt(0) 11; GFX9-NEXT: ; return to shader part epilog 12; 13; GFX10PLUS-LABEL: load_1d: 14; GFX10PLUS: ; %bb.0: ; %main_body 15; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 16; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 17; GFX10PLUS-NEXT: ; return to shader part epilog 18main_body: 19 %s = extractelement <2 x i16> %coords, i32 0 20 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 21 ret <4 x float> %v 22} 23 24define amdgpu_ps <4 x float> @load_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 25; GFX9-LABEL: load_2d: 26; GFX9: ; %bb.0: ; %main_body 27; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 28; GFX9-NEXT: s_waitcnt vmcnt(0) 29; GFX9-NEXT: ; return to shader part epilog 30; 31; GFX10PLUS-LABEL: load_2d: 32; GFX10PLUS: ; %bb.0: ; %main_body 33; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 34; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 35; GFX10PLUS-NEXT: ; return to shader part epilog 36main_body: 37 %s = extractelement <2 x i16> %coords, i32 0 38 %t = extractelement <2 x i16> %coords, i32 1 39 %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0) 40 ret <4 x float> %v 41} 42 43define amdgpu_ps <4 x float> @load_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 44; GFX9-LABEL: load_3d: 45; GFX9: ; %bb.0: ; %main_body 46; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 47; GFX9-NEXT: s_waitcnt vmcnt(0) 48; GFX9-NEXT: ; return to shader part epilog 49; 50; GFX10PLUS-LABEL: load_3d: 51; GFX10PLUS: ; %bb.0: ; %main_body 52; GFX10PLUS-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 53; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 54; GFX10PLUS-NEXT: ; return to shader part epilog 55main_body: 56 %s = extractelement <2 x i16> %coords_lo, i32 0 57 %t = extractelement <2 x i16> %coords_lo, i32 1 58 %r = extractelement <2 x i16> %coords_hi, i32 0 59 %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0) 60 ret <4 x float> %v 61} 62 63define amdgpu_ps <4 x float> @load_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 64; GFX9-LABEL: load_cube: 65; GFX9: ; %bb.0: ; %main_body 66; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 67; GFX9-NEXT: s_waitcnt vmcnt(0) 68; GFX9-NEXT: ; return to shader part epilog 69; 70; GFX10PLUS-LABEL: load_cube: 71; GFX10PLUS: ; %bb.0: ; %main_body 72; GFX10PLUS-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 73; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 74; GFX10PLUS-NEXT: ; return to shader part epilog 75main_body: 76 %s = extractelement <2 x i16> %coords_lo, i32 0 77 %t = extractelement <2 x i16> %coords_lo, i32 1 78 %slice = extractelement <2 x i16> %coords_hi, i32 0 79 %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 80 ret <4 x float> %v 81} 82 83define amdgpu_ps <4 x float> @load_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 84; GFX9-LABEL: load_1darray: 85; GFX9: ; %bb.0: ; %main_body 86; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 87; GFX9-NEXT: s_waitcnt vmcnt(0) 88; GFX9-NEXT: ; return to shader part epilog 89; 90; GFX10PLUS-LABEL: load_1darray: 91; GFX10PLUS: ; %bb.0: ; %main_body 92; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 93; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 94; GFX10PLUS-NEXT: ; return to shader part epilog 95main_body: 96 %s = extractelement <2 x i16> %coords, i32 0 97 %slice = extractelement <2 x i16> %coords, i32 1 98 %v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 99 ret <4 x float> %v 100} 101 102define amdgpu_ps <4 x float> @load_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 103; GFX9-LABEL: load_2darray: 104; GFX9: ; %bb.0: ; %main_body 105; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 106; GFX9-NEXT: s_waitcnt vmcnt(0) 107; GFX9-NEXT: ; return to shader part epilog 108; 109; GFX10PLUS-LABEL: load_2darray: 110; GFX10PLUS: ; %bb.0: ; %main_body 111; GFX10PLUS-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 112; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 113; GFX10PLUS-NEXT: ; return to shader part epilog 114main_body: 115 %s = extractelement <2 x i16> %coords_lo, i32 0 116 %t = extractelement <2 x i16> %coords_lo, i32 1 117 %slice = extractelement <2 x i16> %coords_hi, i32 0 118 %v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 119 ret <4 x float> %v 120} 121 122define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 123; GFX9-LABEL: load_2dmsaa: 124; GFX9: ; %bb.0: ; %main_body 125; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 126; GFX9-NEXT: s_waitcnt vmcnt(0) 127; GFX9-NEXT: ; return to shader part epilog 128; 129; GFX10PLUS-LABEL: load_2dmsaa: 130; GFX10PLUS: ; %bb.0: ; %main_body 131; GFX10PLUS-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 132; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 133; GFX10PLUS-NEXT: ; return to shader part epilog 134main_body: 135 %s = extractelement <2 x i16> %coords_lo, i32 0 136 %t = extractelement <2 x i16> %coords_lo, i32 1 137 %fragid = extractelement <2 x i16> %coords_hi, i32 0 138 %v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) 139 ret <4 x float> %v 140} 141 142define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 143; GFX9-LABEL: load_2darraymsaa: 144; GFX9: ; %bb.0: ; %main_body 145; GFX9-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 146; GFX9-NEXT: s_waitcnt vmcnt(0) 147; GFX9-NEXT: ; return to shader part epilog 148; 149; GFX10PLUS-LABEL: load_2darraymsaa: 150; GFX10PLUS: ; %bb.0: ; %main_body 151; GFX10PLUS-NEXT: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 152; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 153; GFX10PLUS-NEXT: ; return to shader part epilog 154main_body: 155 %s = extractelement <2 x i16> %coords_lo, i32 0 156 %t = extractelement <2 x i16> %coords_lo, i32 1 157 %slice = extractelement <2 x i16> %coords_hi, i32 0 158 %fragid = extractelement <2 x i16> %coords_hi, i32 1 159 %v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) 160 ret <4 x float> %v 161} 162 163define amdgpu_ps <4 x float> @load_mip_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 164; GFX9-LABEL: load_mip_1d: 165; GFX9: ; %bb.0: ; %main_body 166; GFX9-NEXT: image_load_mip v[0:3], v0, s[0:7] dmask:0xf unorm a16 167; GFX9-NEXT: s_waitcnt vmcnt(0) 168; GFX9-NEXT: ; return to shader part epilog 169; 170; GFX10PLUS-LABEL: load_mip_1d: 171; GFX10PLUS: ; %bb.0: ; %main_body 172; GFX10PLUS-NEXT: image_load_mip v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 173; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 174; GFX10PLUS-NEXT: ; return to shader part epilog 175main_body: 176 %s = extractelement <2 x i16> %coords, i32 0 177 %mip = extractelement <2 x i16> %coords, i32 1 178 %v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 179 ret <4 x float> %v 180} 181 182define amdgpu_ps <4 x float> @load_mip_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 183; GFX9-LABEL: load_mip_2d: 184; GFX9: ; %bb.0: ; %main_body 185; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 186; GFX9-NEXT: s_waitcnt vmcnt(0) 187; GFX9-NEXT: ; return to shader part epilog 188; 189; GFX10PLUS-LABEL: load_mip_2d: 190; GFX10PLUS: ; %bb.0: ; %main_body 191; GFX10PLUS-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 192; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 193; GFX10PLUS-NEXT: ; return to shader part epilog 194main_body: 195 %s = extractelement <2 x i16> %coords_lo, i32 0 196 %t = extractelement <2 x i16> %coords_lo, i32 1 197 %mip = extractelement <2 x i16> %coords_hi, i32 0 198 %v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 199 ret <4 x float> %v 200} 201 202define amdgpu_ps <4 x float> @load_mip_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 203; GFX9-LABEL: load_mip_3d: 204; GFX9: ; %bb.0: ; %main_body 205; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 206; GFX9-NEXT: s_waitcnt vmcnt(0) 207; GFX9-NEXT: ; return to shader part epilog 208; 209; GFX10PLUS-LABEL: load_mip_3d: 210; GFX10PLUS: ; %bb.0: ; %main_body 211; GFX10PLUS-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 212; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 213; GFX10PLUS-NEXT: ; return to shader part epilog 214main_body: 215 %s = extractelement <2 x i16> %coords_lo, i32 0 216 %t = extractelement <2 x i16> %coords_lo, i32 1 217 %r = extractelement <2 x i16> %coords_hi, i32 0 218 %mip = extractelement <2 x i16> %coords_hi, i32 1 219 %v = call <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 220 ret <4 x float> %v 221} 222 223define amdgpu_ps <4 x float> @load_mip_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 224; GFX9-LABEL: load_mip_cube: 225; GFX9: ; %bb.0: ; %main_body 226; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 227; GFX9-NEXT: s_waitcnt vmcnt(0) 228; GFX9-NEXT: ; return to shader part epilog 229; 230; GFX10PLUS-LABEL: load_mip_cube: 231; GFX10PLUS: ; %bb.0: ; %main_body 232; GFX10PLUS-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 233; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 234; GFX10PLUS-NEXT: ; return to shader part epilog 235main_body: 236 %s = extractelement <2 x i16> %coords_lo, i32 0 237 %t = extractelement <2 x i16> %coords_lo, i32 1 238 %slice = extractelement <2 x i16> %coords_hi, i32 0 239 %mip = extractelement <2 x i16> %coords_hi, i32 1 240 %v = call <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 241 ret <4 x float> %v 242} 243 244define amdgpu_ps <4 x float> @load_mip_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 245; GFX9-LABEL: load_mip_1darray: 246; GFX9: ; %bb.0: ; %main_body 247; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 248; GFX9-NEXT: s_waitcnt vmcnt(0) 249; GFX9-NEXT: ; return to shader part epilog 250; 251; GFX10PLUS-LABEL: load_mip_1darray: 252; GFX10PLUS: ; %bb.0: ; %main_body 253; GFX10PLUS-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 254; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 255; GFX10PLUS-NEXT: ; return to shader part epilog 256main_body: 257 %s = extractelement <2 x i16> %coords_lo, i32 0 258 %slice = extractelement <2 x i16> %coords_lo, i32 1 259 %mip = extractelement <2 x i16> %coords_hi, i32 0 260 %v = call <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 261 ret <4 x float> %v 262} 263 264define amdgpu_ps <4 x float> @load_mip_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 265; GFX9-LABEL: load_mip_2darray: 266; GFX9: ; %bb.0: ; %main_body 267; GFX9-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da 268; GFX9-NEXT: s_waitcnt vmcnt(0) 269; GFX9-NEXT: ; return to shader part epilog 270; 271; GFX10PLUS-LABEL: load_mip_2darray: 272; GFX10PLUS: ; %bb.0: ; %main_body 273; GFX10PLUS-NEXT: image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 274; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 275; GFX10PLUS-NEXT: ; return to shader part epilog 276main_body: 277 %s = extractelement <2 x i16> %coords_lo, i32 0 278 %t = extractelement <2 x i16> %coords_lo, i32 1 279 %slice = extractelement <2 x i16> %coords_hi, i32 0 280 %mip = extractelement <2 x i16> %coords_hi, i32 1 281 %v = call <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 282 ret <4 x float> %v 283} 284 285define amdgpu_ps void @store_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 286; GFX9-LABEL: store_1d: 287; GFX9: ; %bb.0: ; %main_body 288; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 289; GFX9-NEXT: s_endpgm 290; 291; GFX10-LABEL: store_1d: 292; GFX10: ; %bb.0: ; %main_body 293; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 294; GFX10-NEXT: s_endpgm 295; 296; GFX11-LABEL: store_1d: 297; GFX11: ; %bb.0: ; %main_body 298; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 299; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 300; GFX11-NEXT: s_endpgm 301main_body: 302 %s = extractelement <2 x i16> %coords, i32 0 303 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 304 ret void 305} 306 307define amdgpu_ps void @store_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 308; GFX9-LABEL: store_2d: 309; GFX9: ; %bb.0: ; %main_body 310; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 311; GFX9-NEXT: s_endpgm 312; 313; GFX10-LABEL: store_2d: 314; GFX10: ; %bb.0: ; %main_body 315; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 316; GFX10-NEXT: s_endpgm 317; 318; GFX11-LABEL: store_2d: 319; GFX11: ; %bb.0: ; %main_body 320; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 321; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 322; GFX11-NEXT: s_endpgm 323main_body: 324 %s = extractelement <2 x i16> %coords, i32 0 325 %t = extractelement <2 x i16> %coords, i32 1 326 call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0) 327 ret void 328} 329 330define amdgpu_ps void @store_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 331; GFX9-LABEL: store_3d: 332; GFX9: ; %bb.0: ; %main_body 333; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 334; GFX9-NEXT: s_endpgm 335; 336; GFX10-LABEL: store_3d: 337; GFX10: ; %bb.0: ; %main_body 338; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 339; GFX10-NEXT: s_endpgm 340; 341; GFX11-LABEL: store_3d: 342; GFX11: ; %bb.0: ; %main_body 343; GFX11-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 344; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 345; GFX11-NEXT: s_endpgm 346main_body: 347 %s = extractelement <2 x i16> %coords_lo, i32 0 348 %t = extractelement <2 x i16> %coords_lo, i32 1 349 %r = extractelement <2 x i16> %coords_hi, i32 0 350 call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0) 351 ret void 352} 353 354define amdgpu_ps void @store_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 355; GFX9-LABEL: store_cube: 356; GFX9: ; %bb.0: ; %main_body 357; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 358; GFX9-NEXT: s_endpgm 359; 360; GFX10-LABEL: store_cube: 361; GFX10: ; %bb.0: ; %main_body 362; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 363; GFX10-NEXT: s_endpgm 364; 365; GFX11-LABEL: store_cube: 366; GFX11: ; %bb.0: ; %main_body 367; GFX11-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 368; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 369; GFX11-NEXT: s_endpgm 370main_body: 371 %s = extractelement <2 x i16> %coords_lo, i32 0 372 %t = extractelement <2 x i16> %coords_lo, i32 1 373 %slice = extractelement <2 x i16> %coords_hi, i32 0 374 call void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 375 ret void 376} 377 378define amdgpu_ps void @store_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 379; GFX9-LABEL: store_1darray: 380; GFX9: ; %bb.0: ; %main_body 381; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 da 382; GFX9-NEXT: s_endpgm 383; 384; GFX10-LABEL: store_1darray: 385; GFX10: ; %bb.0: ; %main_body 386; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 387; GFX10-NEXT: s_endpgm 388; 389; GFX11-LABEL: store_1darray: 390; GFX11: ; %bb.0: ; %main_body 391; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 392; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 393; GFX11-NEXT: s_endpgm 394main_body: 395 %s = extractelement <2 x i16> %coords, i32 0 396 %slice = extractelement <2 x i16> %coords, i32 1 397 call void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 398 ret void 399} 400 401define amdgpu_ps void @store_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 402; GFX9-LABEL: store_2darray: 403; GFX9: ; %bb.0: ; %main_body 404; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 405; GFX9-NEXT: s_endpgm 406; 407; GFX10-LABEL: store_2darray: 408; GFX10: ; %bb.0: ; %main_body 409; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 410; GFX10-NEXT: s_endpgm 411; 412; GFX11-LABEL: store_2darray: 413; GFX11: ; %bb.0: ; %main_body 414; GFX11-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 415; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 416; GFX11-NEXT: s_endpgm 417main_body: 418 %s = extractelement <2 x i16> %coords_lo, i32 0 419 %t = extractelement <2 x i16> %coords_lo, i32 1 420 %slice = extractelement <2 x i16> %coords_hi, i32 0 421 call void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0) 422 ret void 423} 424 425define amdgpu_ps void @store_2dmsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 426; GFX9-LABEL: store_2dmsaa: 427; GFX9: ; %bb.0: ; %main_body 428; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 429; GFX9-NEXT: s_endpgm 430; 431; GFX10-LABEL: store_2dmsaa: 432; GFX10: ; %bb.0: ; %main_body 433; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 434; GFX10-NEXT: s_endpgm 435; 436; GFX11-LABEL: store_2dmsaa: 437; GFX11: ; %bb.0: ; %main_body 438; GFX11-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 439; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 440; GFX11-NEXT: s_endpgm 441main_body: 442 %s = extractelement <2 x i16> %coords_lo, i32 0 443 %t = extractelement <2 x i16> %coords_lo, i32 1 444 %fragid = extractelement <2 x i16> %coords_hi, i32 0 445 call void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) 446 ret void 447} 448 449define amdgpu_ps void @store_2darraymsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 450; GFX9-LABEL: store_2darraymsaa: 451; GFX9: ; %bb.0: ; %main_body 452; GFX9-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 453; GFX9-NEXT: s_endpgm 454; 455; GFX10-LABEL: store_2darraymsaa: 456; GFX10: ; %bb.0: ; %main_body 457; GFX10-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 458; GFX10-NEXT: s_endpgm 459; 460; GFX11-LABEL: store_2darraymsaa: 461; GFX11: ; %bb.0: ; %main_body 462; GFX11-NEXT: image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 463; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 464; GFX11-NEXT: s_endpgm 465main_body: 466 %s = extractelement <2 x i16> %coords_lo, i32 0 467 %t = extractelement <2 x i16> %coords_lo, i32 1 468 %slice = extractelement <2 x i16> %coords_hi, i32 0 469 %fragid = extractelement <2 x i16> %coords_hi, i32 1 470 call void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) 471 ret void 472} 473 474define amdgpu_ps void @store_mip_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 475; GFX9-LABEL: store_mip_1d: 476; GFX9: ; %bb.0: ; %main_body 477; GFX9-NEXT: image_store_mip v[0:3], v4, s[0:7] dmask:0xf unorm a16 478; GFX9-NEXT: s_endpgm 479; 480; GFX10-LABEL: store_mip_1d: 481; GFX10: ; %bb.0: ; %main_body 482; GFX10-NEXT: image_store_mip v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 483; GFX10-NEXT: s_endpgm 484; 485; GFX11-LABEL: store_mip_1d: 486; GFX11: ; %bb.0: ; %main_body 487; GFX11-NEXT: image_store_mip v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 488; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 489; GFX11-NEXT: s_endpgm 490main_body: 491 %s = extractelement <2 x i16> %coords, i32 0 492 %mip = extractelement <2 x i16> %coords, i32 1 493 call void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 494 ret void 495} 496 497define amdgpu_ps void @store_mip_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 498; GFX9-LABEL: store_mip_2d: 499; GFX9: ; %bb.0: ; %main_body 500; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 501; GFX9-NEXT: s_endpgm 502; 503; GFX10-LABEL: store_mip_2d: 504; GFX10: ; %bb.0: ; %main_body 505; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 506; GFX10-NEXT: s_endpgm 507; 508; GFX11-LABEL: store_mip_2d: 509; GFX11: ; %bb.0: ; %main_body 510; GFX11-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 511; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 512; GFX11-NEXT: s_endpgm 513main_body: 514 %s = extractelement <2 x i16> %coords_lo, i32 0 515 %t = extractelement <2 x i16> %coords_lo, i32 1 516 %mip = extractelement <2 x i16> %coords_hi, i32 0 517 call void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 518 ret void 519} 520 521define amdgpu_ps void @store_mip_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 522; GFX9-LABEL: store_mip_3d: 523; GFX9: ; %bb.0: ; %main_body 524; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 525; GFX9-NEXT: s_endpgm 526; 527; GFX10-LABEL: store_mip_3d: 528; GFX10: ; %bb.0: ; %main_body 529; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 530; GFX10-NEXT: s_endpgm 531; 532; GFX11-LABEL: store_mip_3d: 533; GFX11: ; %bb.0: ; %main_body 534; GFX11-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 535; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 536; GFX11-NEXT: s_endpgm 537main_body: 538 %s = extractelement <2 x i16> %coords_lo, i32 0 539 %t = extractelement <2 x i16> %coords_lo, i32 1 540 %r = extractelement <2 x i16> %coords_hi, i32 0 541 %mip = extractelement <2 x i16> %coords_hi, i32 1 542 call void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 543 ret void 544} 545 546define amdgpu_ps void @store_mip_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 547; GFX9-LABEL: store_mip_cube: 548; GFX9: ; %bb.0: ; %main_body 549; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 550; GFX9-NEXT: s_endpgm 551; 552; GFX10-LABEL: store_mip_cube: 553; GFX10: ; %bb.0: ; %main_body 554; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 555; GFX10-NEXT: s_endpgm 556; 557; GFX11-LABEL: store_mip_cube: 558; GFX11: ; %bb.0: ; %main_body 559; GFX11-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 560; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 561; GFX11-NEXT: s_endpgm 562main_body: 563 %s = extractelement <2 x i16> %coords_lo, i32 0 564 %t = extractelement <2 x i16> %coords_lo, i32 1 565 %slice = extractelement <2 x i16> %coords_hi, i32 0 566 %mip = extractelement <2 x i16> %coords_hi, i32 1 567 call void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 568 ret void 569} 570 571define amdgpu_ps void @store_mip_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 572; GFX9-LABEL: store_mip_1darray: 573; GFX9: ; %bb.0: ; %main_body 574; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 575; GFX9-NEXT: s_endpgm 576; 577; GFX10-LABEL: store_mip_1darray: 578; GFX10: ; %bb.0: ; %main_body 579; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 580; GFX10-NEXT: s_endpgm 581; 582; GFX11-LABEL: store_mip_1darray: 583; GFX11: ; %bb.0: ; %main_body 584; GFX11-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 585; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 586; GFX11-NEXT: s_endpgm 587main_body: 588 %s = extractelement <2 x i16> %coords_lo, i32 0 589 %slice = extractelement <2 x i16> %coords_lo, i32 1 590 %mip = extractelement <2 x i16> %coords_hi, i32 0 591 call void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 592 ret void 593} 594 595define amdgpu_ps void @store_mip_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) { 596; GFX9-LABEL: store_mip_2darray: 597; GFX9: ; %bb.0: ; %main_body 598; GFX9-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da 599; GFX9-NEXT: s_endpgm 600; 601; GFX10-LABEL: store_mip_2darray: 602; GFX10: ; %bb.0: ; %main_body 603; GFX10-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 604; GFX10-NEXT: s_endpgm 605; 606; GFX11-LABEL: store_mip_2darray: 607; GFX11: ; %bb.0: ; %main_body 608; GFX11-NEXT: image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 609; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 610; GFX11-NEXT: s_endpgm 611main_body: 612 %s = extractelement <2 x i16> %coords_lo, i32 0 613 %t = extractelement <2 x i16> %coords_lo, i32 1 614 %slice = extractelement <2 x i16> %coords_hi, i32 0 615 %mip = extractelement <2 x i16> %coords_hi, i32 1 616 call void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 617 ret void 618} 619 620define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 621; GFX9-LABEL: getresinfo_1d: 622; GFX9: ; %bb.0: ; %main_body 623; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 624; GFX9-NEXT: s_waitcnt vmcnt(0) 625; GFX9-NEXT: ; return to shader part epilog 626; 627; GFX10PLUS-LABEL: getresinfo_1d: 628; GFX10PLUS: ; %bb.0: ; %main_body 629; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 630; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 631; GFX10PLUS-NEXT: ; return to shader part epilog 632main_body: 633 %mip = extractelement <2 x i16> %coords, i32 0 634 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 635 ret <4 x float> %v 636} 637 638define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 639; GFX9-LABEL: getresinfo_2d: 640; GFX9: ; %bb.0: ; %main_body 641; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 642; GFX9-NEXT: s_waitcnt vmcnt(0) 643; GFX9-NEXT: ; return to shader part epilog 644; 645; GFX10PLUS-LABEL: getresinfo_2d: 646; GFX10PLUS: ; %bb.0: ; %main_body 647; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 648; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 649; GFX10PLUS-NEXT: ; return to shader part epilog 650main_body: 651 %mip = extractelement <2 x i16> %coords, i32 0 652 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 653 ret <4 x float> %v 654} 655 656define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 657; GFX9-LABEL: getresinfo_3d: 658; GFX9: ; %bb.0: ; %main_body 659; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 660; GFX9-NEXT: s_waitcnt vmcnt(0) 661; GFX9-NEXT: ; return to shader part epilog 662; 663; GFX10PLUS-LABEL: getresinfo_3d: 664; GFX10PLUS: ; %bb.0: ; %main_body 665; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 666; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 667; GFX10PLUS-NEXT: ; return to shader part epilog 668main_body: 669 %mip = extractelement <2 x i16> %coords, i32 0 670 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 671 ret <4 x float> %v 672} 673 674define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 675; GFX9-LABEL: getresinfo_cube: 676; GFX9: ; %bb.0: ; %main_body 677; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 678; GFX9-NEXT: s_waitcnt vmcnt(0) 679; GFX9-NEXT: ; return to shader part epilog 680; 681; GFX10PLUS-LABEL: getresinfo_cube: 682; GFX10PLUS: ; %bb.0: ; %main_body 683; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 684; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 685; GFX10PLUS-NEXT: ; return to shader part epilog 686main_body: 687 %mip = extractelement <2 x i16> %coords, i32 0 688 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 689 ret <4 x float> %v 690} 691 692define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 693; GFX9-LABEL: getresinfo_1darray: 694; GFX9: ; %bb.0: ; %main_body 695; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 696; GFX9-NEXT: s_waitcnt vmcnt(0) 697; GFX9-NEXT: ; return to shader part epilog 698; 699; GFX10PLUS-LABEL: getresinfo_1darray: 700; GFX10PLUS: ; %bb.0: ; %main_body 701; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 702; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 703; GFX10PLUS-NEXT: ; return to shader part epilog 704main_body: 705 %mip = extractelement <2 x i16> %coords, i32 0 706 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 707 ret <4 x float> %v 708} 709 710define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 711; GFX9-LABEL: getresinfo_2darray: 712; GFX9: ; %bb.0: ; %main_body 713; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 714; GFX9-NEXT: s_waitcnt vmcnt(0) 715; GFX9-NEXT: ; return to shader part epilog 716; 717; GFX10PLUS-LABEL: getresinfo_2darray: 718; GFX10PLUS: ; %bb.0: ; %main_body 719; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 720; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 721; GFX10PLUS-NEXT: ; return to shader part epilog 722main_body: 723 %mip = extractelement <2 x i16> %coords, i32 0 724 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 725 ret <4 x float> %v 726} 727 728define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 729; GFX9-LABEL: getresinfo_2dmsaa: 730; GFX9: ; %bb.0: ; %main_body 731; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 732; GFX9-NEXT: s_waitcnt vmcnt(0) 733; GFX9-NEXT: ; return to shader part epilog 734; 735; GFX10PLUS-LABEL: getresinfo_2dmsaa: 736; GFX10PLUS: ; %bb.0: ; %main_body 737; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 738; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 739; GFX10PLUS-NEXT: ; return to shader part epilog 740main_body: 741 %mip = extractelement <2 x i16> %coords, i32 0 742 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 743 ret <4 x float> %v 744} 745 746define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 747; GFX9-LABEL: getresinfo_2darraymsaa: 748; GFX9: ; %bb.0: ; %main_body 749; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 750; GFX9-NEXT: s_waitcnt vmcnt(0) 751; GFX9-NEXT: ; return to shader part epilog 752; 753; GFX10PLUS-LABEL: getresinfo_2darraymsaa: 754; GFX10PLUS: ; %bb.0: ; %main_body 755; GFX10PLUS-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 756; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 757; GFX10PLUS-NEXT: ; return to shader part epilog 758main_body: 759 %mip = extractelement <2 x i16> %coords, i32 0 760 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 761 ret <4 x float> %v 762} 763 764define amdgpu_ps float @load_1d_V1(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 765; GFX9-LABEL: load_1d_V1: 766; GFX9: ; %bb.0: ; %main_body 767; GFX9-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm a16 768; GFX9-NEXT: s_waitcnt vmcnt(0) 769; GFX9-NEXT: ; return to shader part epilog 770; 771; GFX10PLUS-LABEL: load_1d_V1: 772; GFX10PLUS: ; %bb.0: ; %main_body 773; GFX10PLUS-NEXT: image_load v0, v0, s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D unorm a16 774; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 775; GFX10PLUS-NEXT: ; return to shader part epilog 776main_body: 777 %s = extractelement <2 x i16> %coords, i32 0 778 %v = call float @llvm.amdgcn.image.load.1d.f32.i16(i32 8, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 779 ret float %v 780} 781 782define amdgpu_ps <2 x float> @load_1d_V2(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 783; GFX9-LABEL: load_1d_V2: 784; GFX9: ; %bb.0: ; %main_body 785; GFX9-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm a16 786; GFX9-NEXT: s_waitcnt vmcnt(0) 787; GFX9-NEXT: ; return to shader part epilog 788; 789; GFX10PLUS-LABEL: load_1d_V2: 790; GFX10PLUS: ; %bb.0: ; %main_body 791; GFX10PLUS-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 dim:SQ_RSRC_IMG_1D unorm a16 792; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 793; GFX10PLUS-NEXT: ; return to shader part epilog 794main_body: 795 %s = extractelement <2 x i16> %coords, i32 0 796 %v = call <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32 9, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 797 ret <2 x float> %v 798} 799 800define amdgpu_ps void @store_1d_V1(<8 x i32> inreg %rsrc, float %vdata, <2 x i16> %coords) { 801; GFX9-LABEL: store_1d_V1: 802; GFX9: ; %bb.0: ; %main_body 803; GFX9-NEXT: image_store v0, v1, s[0:7] dmask:0x2 unorm a16 804; GFX9-NEXT: s_endpgm 805; 806; GFX10-LABEL: store_1d_V1: 807; GFX10: ; %bb.0: ; %main_body 808; GFX10-NEXT: image_store v0, v1, s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_1D unorm a16 809; GFX10-NEXT: s_endpgm 810; 811; GFX11-LABEL: store_1d_V1: 812; GFX11: ; %bb.0: ; %main_body 813; GFX11-NEXT: image_store v0, v1, s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_1D unorm a16 814; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 815; GFX11-NEXT: s_endpgm 816main_body: 817 %s = extractelement <2 x i16> %coords, i32 0 818 call void @llvm.amdgcn.image.store.1d.f32.i16(float %vdata, i32 2, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 819 ret void 820} 821 822define amdgpu_ps void @store_1d_V2(<8 x i32> inreg %rsrc, <2 x float> %vdata, <2 x i16> %coords) { 823; GFX9-LABEL: store_1d_V2: 824; GFX9: ; %bb.0: ; %main_body 825; GFX9-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc unorm a16 826; GFX9-NEXT: s_endpgm 827; 828; GFX10-LABEL: store_1d_V2: 829; GFX10: ; %bb.0: ; %main_body 830; GFX10-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc dim:SQ_RSRC_IMG_1D unorm a16 831; GFX10-NEXT: s_endpgm 832; 833; GFX11-LABEL: store_1d_V2: 834; GFX11: ; %bb.0: ; %main_body 835; GFX11-NEXT: image_store v[0:1], v2, s[0:7] dmask:0xc dim:SQ_RSRC_IMG_1D unorm a16 836; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 837; GFX11-NEXT: s_endpgm 838main_body: 839 %s = extractelement <2 x i16> %coords, i32 0 840 call void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float> %vdata, i32 12, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) 841 ret void 842} 843 844define amdgpu_ps <4 x float> @load_1d_glc(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 845; GFX9-LABEL: load_1d_glc: 846; GFX9: ; %bb.0: ; %main_body 847; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc a16 848; GFX9-NEXT: s_waitcnt vmcnt(0) 849; GFX9-NEXT: ; return to shader part epilog 850; 851; GFX10PLUS-LABEL: load_1d_glc: 852; GFX10PLUS: ; %bb.0: ; %main_body 853; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 854; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 855; GFX10PLUS-NEXT: ; return to shader part epilog 856main_body: 857 %s = extractelement <2 x i16> %coords, i32 0 858 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1) 859 ret <4 x float> %v 860} 861 862define amdgpu_ps <4 x float> @load_1d_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 863; GFX9-LABEL: load_1d_slc: 864; GFX9: ; %bb.0: ; %main_body 865; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm slc a16 866; GFX9-NEXT: s_waitcnt vmcnt(0) 867; GFX9-NEXT: ; return to shader part epilog 868; 869; GFX10PLUS-LABEL: load_1d_slc: 870; GFX10PLUS: ; %bb.0: ; %main_body 871; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 872; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 873; GFX10PLUS-NEXT: ; return to shader part epilog 874main_body: 875 %s = extractelement <2 x i16> %coords, i32 0 876 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2) 877 ret <4 x float> %v 878} 879 880define amdgpu_ps <4 x float> @load_1d_glc_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) { 881; GFX9-LABEL: load_1d_glc_slc: 882; GFX9: ; %bb.0: ; %main_body 883; GFX9-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc slc a16 884; GFX9-NEXT: s_waitcnt vmcnt(0) 885; GFX9-NEXT: ; return to shader part epilog 886; 887; GFX10PLUS-LABEL: load_1d_glc_slc: 888; GFX10PLUS: ; %bb.0: ; %main_body 889; GFX10PLUS-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 890; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 891; GFX10PLUS-NEXT: ; return to shader part epilog 892main_body: 893 %s = extractelement <2 x i16> %coords, i32 0 894 %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3) 895 ret <4 x float> %v 896} 897 898define amdgpu_ps void @store_1d_glc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 899; GFX9-LABEL: store_1d_glc: 900; GFX9: ; %bb.0: ; %main_body 901; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc a16 902; GFX9-NEXT: s_endpgm 903; 904; GFX10-LABEL: store_1d_glc: 905; GFX10: ; %bb.0: ; %main_body 906; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 907; GFX10-NEXT: s_endpgm 908; 909; GFX11-LABEL: store_1d_glc: 910; GFX11: ; %bb.0: ; %main_body 911; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 912; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 913; GFX11-NEXT: s_endpgm 914main_body: 915 %s = extractelement <2 x i16> %coords, i32 0 916 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1) 917 ret void 918} 919 920define amdgpu_ps void @store_1d_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 921; GFX9-LABEL: store_1d_slc: 922; GFX9: ; %bb.0: ; %main_body 923; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm slc a16 924; GFX9-NEXT: s_endpgm 925; 926; GFX10-LABEL: store_1d_slc: 927; GFX10: ; %bb.0: ; %main_body 928; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 929; GFX10-NEXT: s_endpgm 930; 931; GFX11-LABEL: store_1d_slc: 932; GFX11: ; %bb.0: ; %main_body 933; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 934; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 935; GFX11-NEXT: s_endpgm 936main_body: 937 %s = extractelement <2 x i16> %coords, i32 0 938 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2) 939 ret void 940} 941 942define amdgpu_ps void @store_1d_glc_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) { 943; GFX9-LABEL: store_1d_glc_slc: 944; GFX9: ; %bb.0: ; %main_body 945; GFX9-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc slc a16 946; GFX9-NEXT: s_endpgm 947; 948; GFX10-LABEL: store_1d_glc_slc: 949; GFX10: ; %bb.0: ; %main_body 950; GFX10-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 951; GFX10-NEXT: s_endpgm 952; 953; GFX11-LABEL: store_1d_glc_slc: 954; GFX11: ; %bb.0: ; %main_body 955; GFX11-NEXT: image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 956; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 957; GFX11-NEXT: s_endpgm 958main_body: 959 %s = extractelement <2 x i16> %coords, i32 0 960 call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3) 961 ret void 962} 963 964define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) #0 { 965; GFX9-LABEL: getresinfo_dmask0: 966; GFX9: ; %bb.0: ; %main_body 967; GFX9-NEXT: ; return to shader part epilog 968; 969; GFX10PLUS-LABEL: getresinfo_dmask0: 970; GFX10PLUS: ; %bb.0: ; %main_body 971; GFX10PLUS-NEXT: ; return to shader part epilog 972main_body: 973 %mip = extractelement <2 x i16> %coords, i32 0 974 %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 975 ret <4 x float> %r 976} 977 978declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #1 979declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1 980declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 981declare <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 982declare <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1 983declare <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 984declare <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 985declare <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1 986 987declare <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1 988declare <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 989declare <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1 990declare <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1 991declare <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 992declare <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1 993 994declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #0 995declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0 996declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 997declare void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 998declare void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0 999declare void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 1000declare void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 1001declare void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0 1002 1003declare void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0 1004declare void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 1005declare void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0 1006declare void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0 1007declare void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0 1008declare void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0 1009 1010declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1011declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1012declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1013declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1014declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1015declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1016declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1017declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2 1018 1019declare float @llvm.amdgcn.image.load.1d.f32.i16(i32, i16, <8 x i32>, i32, i32) #1 1020declare float @llvm.amdgcn.image.load.2d.f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1 1021declare <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32, i16, <8 x i32>, i32, i32) #1 1022declare void @llvm.amdgcn.image.store.1d.f32.i16(float, i32, i16, <8 x i32>, i32, i32) #0 1023declare void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float>, i32, i16, <8 x i32>, i32, i32) #0 1024 1025attributes #0 = { nounwind } 1026attributes #1 = { nounwind readonly } 1027attributes #2 = { nounwind readnone } 1028