1; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX9,GFX906
2; RUN: llc -march=amdgcn -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX9,GFX940
3; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
4; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
5
6declare float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %c, i1 %clamp)
7
8; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_clamp
9; GFX9:   v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
10; GFX10:  v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
11define amdgpu_kernel void @test_llvm_amdgcn_fdot2_clamp(
12    float addrspace(1)* %r,
13    <2 x half> addrspace(1)* %a,
14    <2 x half> addrspace(1)* %b,
15    float addrspace(1)* %c) {
16entry:
17  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
18  %b.val = load <2 x half>, <2 x half> addrspace(1)* %b
19  %c.val = load float, float addrspace(1)* %c
20  %r.val = call float @llvm.amdgcn.fdot2(<2 x half> %a.val, <2 x half> %b.val, float %c.val, i1 1)
21  store float %r.val, float addrspace(1)* %r
22  ret void
23}
24
25; GCN-LABEL: {{^}}test_llvm_amdgcn_fdot2_no_clamp
26; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
27; GFX940: v_dot2c_f32_f16_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
28; GFX10:  v_dot2c_f32_f16_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
29define amdgpu_kernel void @test_llvm_amdgcn_fdot2_no_clamp(
30    float addrspace(1)* %r,
31    <2 x half> addrspace(1)* %a,
32    <2 x half> addrspace(1)* %b,
33    float addrspace(1)* %c) {
34entry:
35  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
36  %b.val = load <2 x half>, <2 x half> addrspace(1)* %b
37  %c.val = load float, float addrspace(1)* %c
38  %r.val = call float @llvm.amdgcn.fdot2(<2 x half> %a.val, <2 x half> %b.val, float %c.val, i1 0)
39  store float %r.val, float addrspace(1)* %r
40  ret void
41}
42
43; GFX9-LABEL: {{^}}fdot2_inline_literal
44; GFX906: v_dot2_f32_f16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 1.0
45; GFX940: v_dot2c_f32_f16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
46define float @fdot2_inline_literal(<2 x half> %a, <2 x half> %b) {
47  %ret = tail call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float 1.0, i1 false)
48  ret float %ret
49}
50