1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s
2; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI %s
3
4declare i64 @llvm.amdgcn.fcmp.f32(float, float, i32) #0
5declare i64 @llvm.amdgcn.fcmp.f64(double, double, i32) #0
6declare float @llvm.fabs.f32(float) #0
7
8declare i64 @llvm.amdgcn.fcmp.f16(half, half, i32) #0
9declare half @llvm.fabs.f16(half) #0
10
11; GCN-LABEL: {{^}}v_fcmp_f32_dynamic_cc:
12; GCN: s_endpgm
13define amdgpu_kernel void @v_fcmp_f32_dynamic_cc(i64 addrspace(1)* %out, float %src0, float %src1, i32 %cc) {
14  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src0, float %src1, i32 %cc)
15  store i64 %result, i64 addrspace(1)* %out
16  ret void
17}
18
19; GCN-LABEL: {{^}}v_fcmp_f32_oeq_with_fabs:
20; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}, |{{v[0-9]+}}|
21define amdgpu_kernel void @v_fcmp_f32_oeq_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
22  %temp = call float @llvm.fabs.f32(float %a)
23  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float %temp, i32 1)
24  store i64 %result, i64 addrspace(1)* %out
25  ret void
26}
27
28; GCN-LABEL: {{^}}v_fcmp_f32_oeq_both_operands_with_fabs:
29; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, |{{s[0-9]+}}|, |{{v[0-9]+}}|
30define amdgpu_kernel void @v_fcmp_f32_oeq_both_operands_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
31  %temp = call float @llvm.fabs.f32(float %a)
32  %src_input = call float @llvm.fabs.f32(float %src)
33  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src_input, float %temp, i32 1)
34  store i64 %result, i64 addrspace(1)* %out
35  ret void
36}
37
38; GCN-LABEL: {{^}}v_fcmp_f32:
39; GCN-NOT: v_cmp_eq_f32_e64
40define amdgpu_kernel void @v_fcmp_f32(i64 addrspace(1)* %out, float %src) {
41  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 -1)
42  store i64 %result, i64 addrspace(1)* %out
43  ret void
44}
45
46; GCN-LABEL: {{^}}v_fcmp_f32_oeq:
47; GCN: v_cmp_eq_f32_e64
48define amdgpu_kernel void @v_fcmp_f32_oeq(i64 addrspace(1)* %out, float %src) {
49  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 1)
50  store i64 %result, i64 addrspace(1)* %out
51  ret void
52}
53
54; GCN-LABEL: {{^}}v_fcmp_f32_one:
55; GCN: v_cmp_neq_f32_e64
56define amdgpu_kernel void @v_fcmp_f32_one(i64 addrspace(1)* %out, float %src) {
57  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 6)
58  store i64 %result, i64 addrspace(1)* %out
59  ret void
60}
61
62; GCN-LABEL: {{^}}v_fcmp_f32_ogt:
63; GCN: v_cmp_gt_f32_e64
64define amdgpu_kernel void @v_fcmp_f32_ogt(i64 addrspace(1)* %out, float %src) {
65  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 2)
66  store i64 %result, i64 addrspace(1)* %out
67  ret void
68}
69
70; GCN-LABEL: {{^}}v_fcmp_f32_oge:
71; GCN: v_cmp_ge_f32_e64
72define amdgpu_kernel void @v_fcmp_f32_oge(i64 addrspace(1)* %out, float %src) {
73  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 3)
74  store i64 %result, i64 addrspace(1)* %out
75  ret void
76}
77
78; GCN-LABEL: {{^}}v_fcmp_f32_olt:
79; GCN: v_cmp_lt_f32_e64
80define amdgpu_kernel void @v_fcmp_f32_olt(i64 addrspace(1)* %out, float %src) {
81  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 4)
82  store i64 %result, i64 addrspace(1)* %out
83  ret void
84}
85
86; GCN-LABEL: {{^}}v_fcmp_f32_ole:
87; GCN: v_cmp_le_f32_e64
88define amdgpu_kernel void @v_fcmp_f32_ole(i64 addrspace(1)* %out, float %src) {
89  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 5)
90  store i64 %result, i64 addrspace(1)* %out
91  ret void
92}
93
94
95; GCN-LABEL: {{^}}v_fcmp_f32_ueq:
96; GCN: v_cmp_nlg_f32_e64
97define amdgpu_kernel void @v_fcmp_f32_ueq(i64 addrspace(1)* %out, float %src) {
98  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 9)
99  store i64 %result, i64 addrspace(1)* %out
100  ret void
101}
102
103; GCN-LABEL: {{^}}v_fcmp_f32_une:
104; GCN: v_cmp_neq_f32_e64
105define amdgpu_kernel void @v_fcmp_f32_une(i64 addrspace(1)* %out, float %src) {
106  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 14)
107  store i64 %result, i64 addrspace(1)* %out
108  ret void
109}
110
111; GCN-LABEL: {{^}}v_fcmp_f32_ugt:
112; GCN: v_cmp_nle_f32_e64
113define amdgpu_kernel void @v_fcmp_f32_ugt(i64 addrspace(1)* %out, float %src) {
114  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 10)
115  store i64 %result, i64 addrspace(1)* %out
116  ret void
117}
118
119; GCN-LABEL: {{^}}v_fcmp_f32_uge:
120; GCN: v_cmp_nlt_f32_e64
121define amdgpu_kernel void @v_fcmp_f32_uge(i64 addrspace(1)* %out, float %src) {
122  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 11)
123  store i64 %result, i64 addrspace(1)* %out
124  ret void
125}
126
127; GCN-LABEL: {{^}}v_fcmp_f32_ult:
128; GCN: v_cmp_nge_f32_e64
129define amdgpu_kernel void @v_fcmp_f32_ult(i64 addrspace(1)* %out, float %src) {
130  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 12)
131  store i64 %result, i64 addrspace(1)* %out
132  ret void
133}
134
135; GCN-LABEL: {{^}}v_fcmp_f32_ule:
136; GCN: v_cmp_ngt_f32_e64
137define amdgpu_kernel void @v_fcmp_f32_ule(i64 addrspace(1)* %out, float %src) {
138  %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 13)
139  store i64 %result, i64 addrspace(1)* %out
140  ret void
141}
142
143; GCN-LABEL: {{^}}v_fcmp_f64_oeq:
144; GCN: v_cmp_eq_f64_e64
145define amdgpu_kernel void @v_fcmp_f64_oeq(i64 addrspace(1)* %out, double %src) {
146  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 1)
147  store i64 %result, i64 addrspace(1)* %out
148  ret void
149}
150
151; GCN-LABEL: {{^}}v_fcmp_f64_one:
152; GCN: v_cmp_neq_f64_e64
153define amdgpu_kernel void @v_fcmp_f64_one(i64 addrspace(1)* %out, double %src) {
154  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 6)
155  store i64 %result, i64 addrspace(1)* %out
156  ret void
157}
158
159; GCN-LABEL: {{^}}v_fcmp_f64_ogt:
160; GCN: v_cmp_gt_f64_e64
161define amdgpu_kernel void @v_fcmp_f64_ogt(i64 addrspace(1)* %out, double %src) {
162  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 2)
163  store i64 %result, i64 addrspace(1)* %out
164  ret void
165}
166
167; GCN-LABEL: {{^}}v_fcmp_f64_oge:
168; GCN: v_cmp_ge_f64_e64
169define amdgpu_kernel void @v_fcmp_f64_oge(i64 addrspace(1)* %out, double %src) {
170  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 3)
171  store i64 %result, i64 addrspace(1)* %out
172  ret void
173}
174
175; GCN-LABEL: {{^}}v_fcmp_f64_olt:
176; GCN: v_cmp_lt_f64_e64
177define amdgpu_kernel void @v_fcmp_f64_olt(i64 addrspace(1)* %out, double %src) {
178  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 4)
179  store i64 %result, i64 addrspace(1)* %out
180  ret void
181}
182
183; GCN-LABEL: {{^}}v_fcmp_f64_ole:
184; GCN: v_cmp_le_f64_e64
185define amdgpu_kernel void @v_fcmp_f64_ole(i64 addrspace(1)* %out, double %src) {
186  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 5)
187  store i64 %result, i64 addrspace(1)* %out
188  ret void
189}
190
191; GCN-LABEL: {{^}}v_fcmp_f64_ueq:
192; GCN: v_cmp_nlg_f64_e64
193define amdgpu_kernel void @v_fcmp_f64_ueq(i64 addrspace(1)* %out, double %src) {
194  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 9)
195  store i64 %result, i64 addrspace(1)* %out
196  ret void
197}
198
199; GCN-LABEL: {{^}}v_fcmp_f64_une:
200; GCN: v_cmp_neq_f64_e64
201define amdgpu_kernel void @v_fcmp_f64_une(i64 addrspace(1)* %out, double %src) {
202  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 14)
203  store i64 %result, i64 addrspace(1)* %out
204  ret void
205}
206
207; GCN-LABEL: {{^}}v_fcmp_f64_ugt:
208; GCN: v_cmp_nle_f64_e64
209define amdgpu_kernel void @v_fcmp_f64_ugt(i64 addrspace(1)* %out, double %src) {
210  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 10)
211  store i64 %result, i64 addrspace(1)* %out
212  ret void
213}
214
215; GCN-LABEL: {{^}}v_fcmp_f64_uge:
216; GCN: v_cmp_nlt_f64_e64
217define amdgpu_kernel void @v_fcmp_f64_uge(i64 addrspace(1)* %out, double %src) {
218  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 11)
219  store i64 %result, i64 addrspace(1)* %out
220  ret void
221}
222
223; GCN-LABEL: {{^}}v_fcmp_f64_ult:
224; GCN: v_cmp_nge_f64_e64
225define amdgpu_kernel void @v_fcmp_f64_ult(i64 addrspace(1)* %out, double %src) {
226  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 12)
227  store i64 %result, i64 addrspace(1)* %out
228  ret void
229}
230
231; GCN-LABEL: {{^}}v_fcmp_f64_ule:
232; GCN: v_cmp_ngt_f64_e64
233define amdgpu_kernel void @v_fcmp_f64_ule(i64 addrspace(1)* %out, double %src) {
234  %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 13)
235  store i64 %result, i64 addrspace(1)* %out
236  ret void
237}
238
239; GCN-LABEL: {{^}}v_fcmp_f16_oeq_with_fabs:
240; VI: v_cmp_eq_f16_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}, |{{v[0-9]+}}|
241
242; SI: v_cvt_f32_f16_e32 [[CVT0:v[0-9]+]], s{{[0-9]+}}
243; SI: v_cvt_f32_f16_e64 [[CVT1:v[0-9]+]], |s{{[0-9]+}}|
244; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[CVT0]], [[CVT1]]
245define amdgpu_kernel void @v_fcmp_f16_oeq_with_fabs(i64 addrspace(1)* %out, half %src, half %a) {
246  %temp = call half @llvm.fabs.f16(half %a)
247  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half %temp, i32 1)
248  store i64 %result, i64 addrspace(1)* %out
249  ret void
250}
251
252; GCN-LABEL: {{^}}v_fcmp_f16_oeq_both_operands_with_fabs:
253; VI: v_cmp_eq_f16_e64 {{s\[[0-9]+:[0-9]+\]}}, |{{s[0-9]+}}|, |{{v[0-9]+}}|
254
255; SI: v_cvt_f32_f16_e64 [[CVT0:v[0-9]+]], |s{{[0-9]+}}|
256; SI: v_cvt_f32_f16_e64 [[CVT1:v[0-9]+]], |s{{[0-9]+}}|
257; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[CVT0]], [[CVT1]]
258define amdgpu_kernel void @v_fcmp_f16_oeq_both_operands_with_fabs(i64 addrspace(1)* %out, half %src, half %a) {
259  %temp = call half @llvm.fabs.f16(half %a)
260  %src_input = call half @llvm.fabs.f16(half %src)
261  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src_input, half %temp, i32 1)
262  store i64 %result, i64 addrspace(1)* %out
263  ret void
264}
265
266; GCN-LABEL: {{^}}v_fcmp_f16:
267; GCN-NOT: v_cmp_eq_
268define amdgpu_kernel void @v_fcmp_f16(i64 addrspace(1)* %out, half %src) {
269  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 -1)
270  store i64 %result, i64 addrspace(1)* %out
271  ret void
272}
273
274; GCN-LABEL: {{^}}v_fcmp_f16_oeq:
275; VI: v_cmp_eq_f16_e64
276
277; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
278; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
279; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
280define amdgpu_kernel void @v_fcmp_f16_oeq(i64 addrspace(1)* %out, half %src) {
281  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 1)
282  store i64 %result, i64 addrspace(1)* %out
283  ret void
284}
285
286; GCN-LABEL: {{^}}v_fcmp_f16_one:
287; VI: v_cmp_neq_f16_e64
288
289; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
290; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
291; SI: v_cmp_neq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
292define amdgpu_kernel void @v_fcmp_f16_one(i64 addrspace(1)* %out, half %src) {
293  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 6)
294  store i64 %result, i64 addrspace(1)* %out
295  ret void
296}
297
298; GCN-LABEL: {{^}}v_fcmp_f16_ogt:
299; VI: v_cmp_gt_f16_e64
300
301; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
302; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
303; SI: v_cmp_lt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
304define amdgpu_kernel void @v_fcmp_f16_ogt(i64 addrspace(1)* %out, half %src) {
305  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 2)
306  store i64 %result, i64 addrspace(1)* %out
307  ret void
308}
309
310; GCN-LABEL: {{^}}v_fcmp_f16_oge:
311; VI: v_cmp_ge_f16_e64
312
313; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
314; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
315; SI: v_cmp_le_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
316define amdgpu_kernel void @v_fcmp_f16_oge(i64 addrspace(1)* %out, half %src) {
317  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 3)
318  store i64 %result, i64 addrspace(1)* %out
319  ret void
320}
321
322; GCN-LABEL: {{^}}v_fcmp_f16_olt:
323; VI: v_cmp_lt_f16_e64
324
325; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
326; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
327; SI: v_cmp_gt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
328define amdgpu_kernel void @v_fcmp_f16_olt(i64 addrspace(1)* %out, half %src) {
329  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 4)
330  store i64 %result, i64 addrspace(1)* %out
331  ret void
332}
333
334; GCN-LABEL: {{^}}v_fcmp_f16_ole:
335; VI: v_cmp_le_f16_e64
336
337; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
338; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
339; SI: v_cmp_ge_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
340define amdgpu_kernel void @v_fcmp_f16_ole(i64 addrspace(1)* %out, half %src) {
341  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 5)
342  store i64 %result, i64 addrspace(1)* %out
343  ret void
344}
345
346; GCN-LABEL: {{^}}v_fcmp_f16_ueq:
347; VI: v_cmp_nlg_f16_e64
348
349; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
350; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
351; SI: v_cmp_nlg_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
352define amdgpu_kernel void @v_fcmp_f16_ueq(i64 addrspace(1)* %out, half %src) {
353  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 9)
354  store i64 %result, i64 addrspace(1)* %out
355  ret void
356}
357
358; GCN-LABEL: {{^}}v_fcmp_f16_une:
359; VI: v_cmp_neq_f16_e64
360
361; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
362; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
363; SI: v_cmp_neq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
364define amdgpu_kernel void @v_fcmp_f16_une(i64 addrspace(1)* %out, half %src) {
365  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 14)
366  store i64 %result, i64 addrspace(1)* %out
367  ret void
368}
369
370; GCN-LABEL: {{^}}v_fcmp_f16_ugt:
371; VI: v_cmp_nle_f16_e64
372
373; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
374; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
375; SI: v_cmp_nge_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
376define amdgpu_kernel void @v_fcmp_f16_ugt(i64 addrspace(1)* %out, half %src) {
377  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 10)
378  store i64 %result, i64 addrspace(1)* %out
379  ret void
380}
381
382; GCN-LABEL: {{^}}v_fcmp_f16_uge:
383; VI: v_cmp_nlt_f16_e64
384
385; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
386; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
387; SI: v_cmp_ngt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
388define amdgpu_kernel void @v_fcmp_f16_uge(i64 addrspace(1)* %out, half %src) {
389  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 11)
390  store i64 %result, i64 addrspace(1)* %out
391  ret void
392}
393
394; GCN-LABEL: {{^}}v_fcmp_f16_ult:
395; VI: v_cmp_nge_f16_e64
396
397; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
398; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
399; SI: v_cmp_nle_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
400define amdgpu_kernel void @v_fcmp_f16_ult(i64 addrspace(1)* %out, half %src) {
401  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 12)
402  store i64 %result, i64 addrspace(1)* %out
403  ret void
404}
405
406; GCN-LABEL: {{^}}v_fcmp_f16_ule:
407; VI: v_cmp_ngt_f16_e64
408
409; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
410; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
411; SI: v_cmp_nlt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
412define amdgpu_kernel void @v_fcmp_f16_ule(i64 addrspace(1)* %out, half %src) {
413  %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 13)
414  store i64 %result, i64 addrspace(1)* %out
415  ret void
416}
417
418attributes #0 = { nounwind readnone convergent }
419