1;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
2;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
3
4;CHECK-LABEL: {{^}}buffer_load:
5;CHECK: buffer_load_format_xyzw v[0:3], s[0:3], s4
6;CHECK: buffer_load_format_xyzw v[4:7], s[0:3], s4 glc
7;CHECK: buffer_load_format_xyzw v[8:11], s[0:3], s4 slc
8;CHECK: s_waitcnt
9define {<4 x float>, <4 x float>, <4 x float>} @buffer_load(<4 x i32> inreg, i32 inreg) #0 {
10main_body:
11  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 0, i32 0, i32 0, i1 0, i1 0)
12  %data_glc = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 0, i32 0, i32 0, i1 1, i1 0)
13  %data_slc = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 0, i32 0, i32 0, i1 0, i1 1)
14  %r0 = insertvalue {<4 x float>, <4 x float>, <4 x float>} undef, <4 x float> %data, 0
15  %r1 = insertvalue {<4 x float>, <4 x float>, <4 x float>} %r0, <4 x float> %data_glc, 1
16  %r2 = insertvalue {<4 x float>, <4 x float>, <4 x float>} %r1, <4 x float> %data_slc, 2
17  ret {<4 x float>, <4 x float>, <4 x float>} %r2
18}
19
20;CHECK-LABEL: {{^}}buffer_load_immoffs:
21;CHECK: buffer_load_format_xyzw v[0:3], s[0:3], s4 offset:42
22;CHECK: s_waitcnt
23define <4 x float> @buffer_load_immoffs(<4 x i32> inreg, i32 inreg) #0 {
24main_body:
25  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 42, i32 0, i32 0, i1 0, i1 0)
26  ret <4 x float> %data
27}
28
29;CHECK-LABEL: {{^}}buffer_load_idx:
30;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen
31;CHECK: s_waitcnt
32define <4 x float> @buffer_load_idx(<4 x i32> inreg, i32) #0 {
33main_body:
34  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i32 %1, i32 0, i1 0, i1 0)
35  ret <4 x float> %data
36}
37
38;CHECK-LABEL: {{^}}buffer_load_ofs:
39;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen
40;CHECK: s_waitcnt
41define <4 x float> @buffer_load_ofs(<4 x i32> inreg, i32) #0 {
42main_body:
43  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i32 0, i32 %1, i1 0, i1 0)
44  ret <4 x float> %data
45}
46
47;CHECK-LABEL: {{^}}buffer_load_both:
48;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen
49;CHECK: s_waitcnt
50define <4 x float> @buffer_load_both(<4 x i32> inreg, i32, i32) #0 {
51main_body:
52  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i32 %1, i32 %2, i1 0, i1 0)
53  ret <4 x float> %data
54}
55
56;CHECK-LABEL: {{^}}buffer_load_both_reversed:
57;CHECK: v_mov_b32_e32 v2, v0
58;CHECK: buffer_load_format_xyzw v[0:3], v[1:2], s[0:3], 0 idxen offen
59;CHECK: s_waitcnt
60define <4 x float> @buffer_load_both_reversed(<4 x i32> inreg, i32, i32) #0 {
61main_body:
62  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i32 %2, i32 %1, i1 0, i1 0)
63  ret <4 x float> %data
64}
65
66declare <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32>, i32, i32, i32, i32, i1, i1) #1
67
68attributes #0 = { "ShaderType"="0" }
69attributes #1 = { nounwind readonly }
70