1;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
2;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
3
4;CHECK-LABEL: {{^}}buffer_load:
5;CHECK: buffer_load_format_xyzw v[0:3], s[0:3], 0
6;CHECK: buffer_load_format_xyzw v[4:7], s[0:3], 0 glc
7;CHECK: buffer_load_format_xyzw v[8:11], s[0:3], 0 slc
8;CHECK: s_waitcnt
9define {<4 x float>, <4 x float>, <4 x float>} @buffer_load(<4 x i32> inreg) #0 {
10main_body:
11  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i1 0, i1 0)
12  %data_glc = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i1 1, i1 0)
13  %data_slc = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 0, i1 0, i1 1)
14  %r0 = insertvalue {<4 x float>, <4 x float>, <4 x float>} undef, <4 x float> %data, 0
15  %r1 = insertvalue {<4 x float>, <4 x float>, <4 x float>} %r0, <4 x float> %data_glc, 1
16  %r2 = insertvalue {<4 x float>, <4 x float>, <4 x float>} %r1, <4 x float> %data_slc, 2
17  ret {<4 x float>, <4 x float>, <4 x float>} %r2
18}
19
20;CHECK-LABEL: {{^}}buffer_load_immoffs:
21;CHECK: buffer_load_format_xyzw v[0:3], s[0:3], 0 offset:42
22;CHECK: s_waitcnt
23define <4 x float> @buffer_load_immoffs(<4 x i32> inreg) #0 {
24main_body:
25  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 42, i1 0, i1 0)
26  ret <4 x float> %data
27}
28
29;CHECK-LABEL: {{^}}buffer_load_immoffs_large:
30;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 61 offset:4095
31;CHECK-DAG: s_movk_i32 [[OFS1:s[0-9]+]], 0x7fff
32;CHECK: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, s[0:3], [[OFS1]] offset:4093
33;CHECK: s_mov_b32 [[OFS2:s[0-9]+]], 0x8fff
34;CHECK: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, s[0:3], [[OFS2]] offset:1
35;CHECK: s_waitcnt
36define <4 x float> @buffer_load_immoffs_large(<4 x i32> inreg) #0 {
37main_body:
38  %d.0 = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 4156, i1 0, i1 0)
39  %d.1 = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 36860, i1 0, i1 0)
40  %d.2 = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 36864, i1 0, i1 0)
41  %d.3 = fadd <4 x float> %d.0, %d.1
42  %data = fadd <4 x float> %d.2, %d.3
43  ret <4 x float> %data
44}
45
46;CHECK-LABEL: {{^}}buffer_load_immoffs_reuse:
47;CHECK: s_movk_i32 [[OFS:s[0-9]+]], 0xfff
48;CHECK: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, s[0:3], [[OFS]] offset:65
49;CHECK-NOT: s_mov
50;CHECK: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, s[0:3], [[OFS]] offset:81
51;CHECK: s_waitcnt
52define <4 x float> @buffer_load_immoffs_reuse(<4 x i32> inreg) #0 {
53main_body:
54  %d.0 = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 4160, i1 0, i1 0)
55  %d.1 = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 4176, i1 0, i1 0)
56  %data = fadd <4 x float> %d.0, %d.1
57  ret <4 x float> %data
58}
59
60;CHECK-LABEL: {{^}}buffer_load_idx:
61;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen
62;CHECK: s_waitcnt
63define <4 x float> @buffer_load_idx(<4 x i32> inreg, i32) #0 {
64main_body:
65  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 0, i1 0, i1 0)
66  ret <4 x float> %data
67}
68
69;CHECK-LABEL: {{^}}buffer_load_ofs:
70;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen
71;CHECK: s_waitcnt
72define <4 x float> @buffer_load_ofs(<4 x i32> inreg, i32) #0 {
73main_body:
74  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 %1, i1 0, i1 0)
75  ret <4 x float> %data
76}
77
78;CHECK-LABEL: {{^}}buffer_load_ofs_imm:
79;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:58
80;CHECK: s_waitcnt
81define <4 x float> @buffer_load_ofs_imm(<4 x i32> inreg, i32) #0 {
82main_body:
83  %ofs = add i32 %1, 58
84  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 0, i32 %ofs, i1 0, i1 0)
85  ret <4 x float> %data
86}
87
88;CHECK-LABEL: {{^}}buffer_load_both:
89;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen
90;CHECK: s_waitcnt
91define <4 x float> @buffer_load_both(<4 x i32> inreg, i32, i32) #0 {
92main_body:
93  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %1, i32 %2, i1 0, i1 0)
94  ret <4 x float> %data
95}
96
97;CHECK-LABEL: {{^}}buffer_load_both_reversed:
98;CHECK: v_mov_b32_e32 v2, v0
99;CHECK: buffer_load_format_xyzw v[0:3], v[1:2], s[0:3], 0 idxen offen
100;CHECK: s_waitcnt
101define <4 x float> @buffer_load_both_reversed(<4 x i32> inreg, i32, i32) #0 {
102main_body:
103  %data = call <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32> %0, i32 %2, i32 %1, i1 0, i1 0)
104  ret <4 x float> %data
105}
106
107declare <4 x float> @llvm.amdgcn.buffer.load.format(<4 x i32>, i32, i32, i1, i1) #1
108
109attributes #0 = { "ShaderType"="0" }
110attributes #1 = { nounwind readonly }
111