1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s 5; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s 7; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \ 8; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \ 9; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s 10; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 11; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s 12; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 13; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s 14 15; REQUIRES: asserts 16 17; GCN-O0:Target Library Information 18; GCN-O0-NEXT:Target Pass Configuration 19; GCN-O0-NEXT:Machine Module Information 20; GCN-O0-NEXT:Target Transform Information 21; GCN-O0-NEXT:Assumption Cache Tracker 22; GCN-O0-NEXT:Profile summary info 23; GCN-O0-NEXT:Argument Register Usage Information Storage 24; GCN-O0-NEXT:Create Garbage Collector Module Metadata 25; GCN-O0-NEXT:Register Usage Information Storage 26; GCN-O0-NEXT:Machine Branch Probability Analysis 27; GCN-O0-NEXT: ModulePass Manager 28; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering 29; GCN-O0-NEXT: AMDGPU Printf lowering 30; GCN-O0-NEXT: FunctionPass Manager 31; GCN-O0-NEXT: Dominator Tree Construction 32; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU 33; GCN-O0-NEXT: Fix function bitcasts for AMDGPU 34; GCN-O0-NEXT: FunctionPass Manager 35; GCN-O0-NEXT: Early propagate attributes from kernels to functions 36; GCN-O0-NEXT: AMDGPU Lower Intrinsics 37; GCN-O0-NEXT: AMDGPU Inline All Functions 38; GCN-O0-NEXT: CallGraph Construction 39; GCN-O0-NEXT: Call Graph SCC Pass Manager 40; GCN-O0-NEXT: Inliner for always_inline functions 41; GCN-O0-NEXT: A No-Op Barrier Pass 42; GCN-O0-NEXT: Lower OpenCL enqueued blocks 43; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions 44; GCN-O0-NEXT: FunctionPass Manager 45; GCN-O0-NEXT: Expand Atomic instructions 46; GCN-O0-NEXT: Lower constant intrinsics 47; GCN-O0-NEXT: Remove unreachable blocks from the CFG 48; GCN-O0-NEXT: Expand vector predication intrinsics 49; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics 50; GCN-O0-NEXT: Expand reduction intrinsics 51; GCN-O0-NEXT: AMDGPU Attributor 52; GCN-O0-NEXT: CallGraph Construction 53; GCN-O0-NEXT: Call Graph SCC Pass Manager 54; GCN-O0-NEXT: AMDGPU Annotate Kernel Features 55; GCN-O0-NEXT: FunctionPass Manager 56; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments 57; GCN-O0-NEXT: Lazy Value Information Analysis 58; GCN-O0-NEXT: Lower SwitchInst's to branches 59; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators 60; GCN-O0-NEXT: Remove unreachable blocks from the CFG 61; GCN-O0-NEXT: Post-Dominator Tree Construction 62; GCN-O0-NEXT: Dominator Tree Construction 63; GCN-O0-NEXT: Natural Loop Information 64; GCN-O0-NEXT: Legacy Divergence Analysis 65; GCN-O0-NEXT: Unify divergent function exit nodes 66; GCN-O0-NEXT: Lazy Value Information Analysis 67; GCN-O0-NEXT: Lower SwitchInst's to branches 68; GCN-O0-NEXT: Dominator Tree Construction 69; GCN-O0-NEXT: Natural Loop Information 70; GCN-O0-NEXT: Convert irreducible control-flow into natural loops 71; GCN-O0-NEXT: Fixup each natural loop to have a single exit block 72; GCN-O0-NEXT: Post-Dominator Tree Construction 73; GCN-O0-NEXT: Dominance Frontier Construction 74; GCN-O0-NEXT: Detect single entry single exit regions 75; GCN-O0-NEXT: Region Pass Manager 76; GCN-O0-NEXT: Structurize control flow 77; GCN-O0-NEXT: Post-Dominator Tree Construction 78; GCN-O0-NEXT: Natural Loop Information 79; GCN-O0-NEXT: Legacy Divergence Analysis 80; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 81; GCN-O0-NEXT: Function Alias Analysis Results 82; GCN-O0-NEXT: Memory SSA 83; GCN-O0-NEXT: AMDGPU Annotate Uniform Values 84; GCN-O0-NEXT: SI annotate control flow 85; GCN-O0-NEXT: LCSSA Verifier 86; GCN-O0-NEXT: Loop-Closed SSA Form Pass 87; GCN-O0-NEXT: DummyCGSCCPass 88; GCN-O0-NEXT: FunctionPass Manager 89; GCN-O0-NEXT: Safe Stack instrumentation pass 90; GCN-O0-NEXT: Insert stack protectors 91; GCN-O0-NEXT: Dominator Tree Construction 92; GCN-O0-NEXT: Post-Dominator Tree Construction 93; GCN-O0-NEXT: Natural Loop Information 94; GCN-O0-NEXT: Legacy Divergence Analysis 95; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 96; GCN-O0-NEXT: MachineDominator Tree Construction 97; GCN-O0-NEXT: SI Fix SGPR copies 98; GCN-O0-NEXT: MachinePostDominator Tree Construction 99; GCN-O0-NEXT: SI Lower i1 Copies 100; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions 101; GCN-O0-NEXT: Local Stack Slot Allocation 102; GCN-O0-NEXT: Register Usage Information Propagation 103; GCN-O0-NEXT: Eliminate PHI nodes for register allocation 104; GCN-O0-NEXT: SI Lower control flow pseudo instructions 105; GCN-O0-NEXT: Two-Address instruction pass 106; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 107; GCN-O0-NEXT: Function Alias Analysis Results 108; GCN-O0-NEXT: MachineDominator Tree Construction 109; GCN-O0-NEXT: Slot index numbering 110; GCN-O0-NEXT: Live Interval Analysis 111; GCN-O0-NEXT: MachinePostDominator Tree Construction 112; GCN-O0-NEXT: SI Whole Quad Mode 113; GCN-O0-NEXT: Virtual Register Map 114; GCN-O0-NEXT: Live Register Matrix 115; GCN-O0-NEXT: SI Pre-allocate WWM Registers 116; GCN-O0-NEXT: Fast Register Allocator 117; GCN-O0-NEXT: SI lower SGPR spill instructions 118; GCN-O0-NEXT: Fast Register Allocator 119; GCN-O0-NEXT: SI Fix VGPR copies 120; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis 121; GCN-O0-NEXT: Fixup Statepoint Caller Saved 122; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 123; GCN-O0-NEXT: Machine Optimization Remark Emitter 124; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization 125; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass 126; GCN-O0-NEXT: SI post-RA bundler 127; GCN-O0-NEXT: Insert fentry calls 128; GCN-O0-NEXT: Insert XRay ops 129; GCN-O0-NEXT: SI Memory Legalizer 130; GCN-O0-NEXT: MachinePostDominator Tree Construction 131; GCN-O0-NEXT: SI insert wait instructions 132; GCN-O0-NEXT: Insert required mode register values 133; GCN-O0-NEXT: MachineDominator Tree Construction 134; GCN-O0-NEXT: SI Final Branch Preparation 135; GCN-O0-NEXT: Post RA hazard recognizer 136; GCN-O0-NEXT: Branch relaxation pass 137; GCN-O0-NEXT: Register Usage Information Collector Pass 138; GCN-O0-NEXT: Live DEBUG_VALUE analysis 139; GCN-O0-NEXT: Function register usage analysis 140; GCN-O0-NEXT: FunctionPass Manager 141; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 142; GCN-O0-NEXT: Machine Optimization Remark Emitter 143; GCN-O0-NEXT: AMDGPU Assembly Printer 144; GCN-O0-NEXT: Free MachineFunction 145; GCN-O0-NEXT:Pass Arguments: -domtree 146; GCN-O0-NEXT: FunctionPass Manager 147; GCN-O0-NEXT: Dominator Tree Construction 148 149; GCN-O1:Target Library Information 150; GCN-O1-NEXT:Target Pass Configuration 151; GCN-O1-NEXT:Machine Module Information 152; GCN-O1-NEXT:Target Transform Information 153; GCN-O1-NEXT:Assumption Cache Tracker 154; GCN-O1-NEXT:Profile summary info 155; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis 156; GCN-O1-NEXT:External Alias Analysis 157; GCN-O1-NEXT:Type-Based Alias Analysis 158; GCN-O1-NEXT:Scoped NoAlias Alias Analysis 159; GCN-O1-NEXT:Argument Register Usage Information Storage 160; GCN-O1-NEXT:Create Garbage Collector Module Metadata 161; GCN-O1-NEXT:Machine Branch Probability Analysis 162; GCN-O1-NEXT:Register Usage Information Storage 163; GCN-O1-NEXT:Default Regalloc Eviction Advisor 164; GCN-O1-NEXT: ModulePass Manager 165; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering 166; GCN-O1-NEXT: AMDGPU Printf lowering 167; GCN-O1-NEXT: FunctionPass Manager 168; GCN-O1-NEXT: Dominator Tree Construction 169; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU 170; GCN-O1-NEXT: Fix function bitcasts for AMDGPU 171; GCN-O1-NEXT: FunctionPass Manager 172; GCN-O1-NEXT: Early propagate attributes from kernels to functions 173; GCN-O1-NEXT: AMDGPU Lower Intrinsics 174; GCN-O1-NEXT: AMDGPU Inline All Functions 175; GCN-O1-NEXT: CallGraph Construction 176; GCN-O1-NEXT: Call Graph SCC Pass Manager 177; GCN-O1-NEXT: Inliner for always_inline functions 178; GCN-O1-NEXT: A No-Op Barrier Pass 179; GCN-O1-NEXT: Lower OpenCL enqueued blocks 180; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions 181; GCN-O1-NEXT: FunctionPass Manager 182; GCN-O1-NEXT: Infer address spaces 183; GCN-O1-NEXT: Expand Atomic instructions 184; GCN-O1-NEXT: AMDGPU Promote Alloca 185; GCN-O1-NEXT: Dominator Tree Construction 186; GCN-O1-NEXT: SROA 187; GCN-O1-NEXT: Post-Dominator Tree Construction 188; GCN-O1-NEXT: Natural Loop Information 189; GCN-O1-NEXT: Legacy Divergence Analysis 190; GCN-O1-NEXT: AMDGPU IR optimizations 191; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 192; GCN-O1-NEXT: Canonicalize natural loops 193; GCN-O1-NEXT: Scalar Evolution Analysis 194; GCN-O1-NEXT: Loop Pass Manager 195; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops 196; GCN-O1-NEXT: Induction Variable Users 197; GCN-O1-NEXT: Loop Strength Reduction 198; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 199; GCN-O1-NEXT: Function Alias Analysis Results 200; GCN-O1-NEXT: Merge contiguous icmps into a memcmp 201; GCN-O1-NEXT: Natural Loop Information 202; GCN-O1-NEXT: Lazy Branch Probability Analysis 203; GCN-O1-NEXT: Lazy Block Frequency Analysis 204; GCN-O1-NEXT: Expand memcmp() to load/stores 205; GCN-O1-NEXT: Lower constant intrinsics 206; GCN-O1-NEXT: Remove unreachable blocks from the CFG 207; GCN-O1-NEXT: Natural Loop Information 208; GCN-O1-NEXT: Post-Dominator Tree Construction 209; GCN-O1-NEXT: Branch Probability Analysis 210; GCN-O1-NEXT: Block Frequency Analysis 211; GCN-O1-NEXT: Constant Hoisting 212; GCN-O1-NEXT: Replace intrinsics with calls to vector library 213; GCN-O1-NEXT: Partially inline calls to library functions 214; GCN-O1-NEXT: Expand vector predication intrinsics 215; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics 216; GCN-O1-NEXT: Expand reduction intrinsics 217; GCN-O1-NEXT: AMDGPU Attributor 218; GCN-O1-NEXT: CallGraph Construction 219; GCN-O1-NEXT: Call Graph SCC Pass Manager 220; GCN-O1-NEXT: AMDGPU Annotate Kernel Features 221; GCN-O1-NEXT: FunctionPass Manager 222; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments 223; GCN-O1-NEXT: Dominator Tree Construction 224; GCN-O1-NEXT: Natural Loop Information 225; GCN-O1-NEXT: CodeGen Prepare 226; GCN-O1-NEXT: Lazy Value Information Analysis 227; GCN-O1-NEXT: Lower SwitchInst's to branches 228; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators 229; GCN-O1-NEXT: Remove unreachable blocks from the CFG 230; GCN-O1-NEXT: Dominator Tree Construction 231; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 232; GCN-O1-NEXT: Function Alias Analysis Results 233; GCN-O1-NEXT: Flatten the CFG 234; GCN-O1-NEXT: Dominator Tree Construction 235; GCN-O1-NEXT: Post-Dominator Tree Construction 236; GCN-O1-NEXT: Natural Loop Information 237; GCN-O1-NEXT: Legacy Divergence Analysis 238; GCN-O1-NEXT: AMDGPU IR late optimizations 239; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 240; GCN-O1-NEXT: Function Alias Analysis Results 241; GCN-O1-NEXT: Code sinking 242; GCN-O1-NEXT: Legacy Divergence Analysis 243; GCN-O1-NEXT: Unify divergent function exit nodes 244; GCN-O1-NEXT: Lazy Value Information Analysis 245; GCN-O1-NEXT: Lower SwitchInst's to branches 246; GCN-O1-NEXT: Dominator Tree Construction 247; GCN-O1-NEXT: Natural Loop Information 248; GCN-O1-NEXT: Convert irreducible control-flow into natural loops 249; GCN-O1-NEXT: Fixup each natural loop to have a single exit block 250; GCN-O1-NEXT: Post-Dominator Tree Construction 251; GCN-O1-NEXT: Dominance Frontier Construction 252; GCN-O1-NEXT: Detect single entry single exit regions 253; GCN-O1-NEXT: Region Pass Manager 254; GCN-O1-NEXT: Structurize control flow 255; GCN-O1-NEXT: Post-Dominator Tree Construction 256; GCN-O1-NEXT: Natural Loop Information 257; GCN-O1-NEXT: Legacy Divergence Analysis 258; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 259; GCN-O1-NEXT: Function Alias Analysis Results 260; GCN-O1-NEXT: Memory SSA 261; GCN-O1-NEXT: AMDGPU Annotate Uniform Values 262; GCN-O1-NEXT: SI annotate control flow 263; GCN-O1-NEXT: LCSSA Verifier 264; GCN-O1-NEXT: Loop-Closed SSA Form Pass 265; GCN-O1-NEXT: DummyCGSCCPass 266; GCN-O1-NEXT: FunctionPass Manager 267; GCN-O1-NEXT: Safe Stack instrumentation pass 268; GCN-O1-NEXT: Insert stack protectors 269; GCN-O1-NEXT: Dominator Tree Construction 270; GCN-O1-NEXT: Post-Dominator Tree Construction 271; GCN-O1-NEXT: Natural Loop Information 272; GCN-O1-NEXT: Legacy Divergence Analysis 273; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 274; GCN-O1-NEXT: Function Alias Analysis Results 275; GCN-O1-NEXT: Branch Probability Analysis 276; GCN-O1-NEXT: Lazy Branch Probability Analysis 277; GCN-O1-NEXT: Lazy Block Frequency Analysis 278; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 279; GCN-O1-NEXT: MachineDominator Tree Construction 280; GCN-O1-NEXT: SI Fix SGPR copies 281; GCN-O1-NEXT: MachinePostDominator Tree Construction 282; GCN-O1-NEXT: SI Lower i1 Copies 283; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions 284; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 285; GCN-O1-NEXT: Early Tail Duplication 286; GCN-O1-NEXT: Optimize machine instruction PHIs 287; GCN-O1-NEXT: Slot index numbering 288; GCN-O1-NEXT: Merge disjoint stack slots 289; GCN-O1-NEXT: Local Stack Slot Allocation 290; GCN-O1-NEXT: Remove dead machine instructions 291; GCN-O1-NEXT: MachineDominator Tree Construction 292; GCN-O1-NEXT: Machine Natural Loop Construction 293; GCN-O1-NEXT: Machine Block Frequency Analysis 294; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion 295; GCN-O1-NEXT: MachineDominator Tree Construction 296; GCN-O1-NEXT: Machine Block Frequency Analysis 297; GCN-O1-NEXT: Machine Common Subexpression Elimination 298; GCN-O1-NEXT: MachinePostDominator Tree Construction 299; GCN-O1-NEXT: Machine code sinking 300; GCN-O1-NEXT: Peephole Optimizations 301; GCN-O1-NEXT: Remove dead machine instructions 302; GCN-O1-NEXT: SI Fold Operands 303; GCN-O1-NEXT: GCN DPP Combine 304; GCN-O1-NEXT: SI Load Store Optimizer 305; GCN-O1-NEXT: Remove dead machine instructions 306; GCN-O1-NEXT: SI Shrink Instructions 307; GCN-O1-NEXT: Register Usage Information Propagation 308; GCN-O1-NEXT: Detect Dead Lanes 309; GCN-O1-NEXT: Remove dead machine instructions 310; GCN-O1-NEXT: Process Implicit Definitions 311; GCN-O1-NEXT: Remove unreachable machine basic blocks 312; GCN-O1-NEXT: Live Variable Analysis 313; GCN-O1-NEXT: MachineDominator Tree Construction 314; GCN-O1-NEXT: SI Optimize VGPR LiveRange 315; GCN-O1-NEXT: Eliminate PHI nodes for register allocation 316; GCN-O1-NEXT: SI Lower control flow pseudo instructions 317; GCN-O1-NEXT: Two-Address instruction pass 318; GCN-O1-NEXT: Slot index numbering 319; GCN-O1-NEXT: Live Interval Analysis 320; GCN-O1-NEXT: Machine Natural Loop Construction 321; GCN-O1-NEXT: Simple Register Coalescing 322; GCN-O1-NEXT: Rename Disconnected Subregister Components 323; GCN-O1-NEXT: Machine Instruction Scheduler 324; GCN-O1-NEXT: MachinePostDominator Tree Construction 325; GCN-O1-NEXT: SI Whole Quad Mode 326; GCN-O1-NEXT: Virtual Register Map 327; GCN-O1-NEXT: Live Register Matrix 328; GCN-O1-NEXT: SI Pre-allocate WWM Registers 329; GCN-O1-NEXT: SI optimize exec mask operations pre-RA 330; GCN-O1-NEXT: Machine Natural Loop Construction 331; GCN-O1-NEXT: Machine Block Frequency Analysis 332; GCN-O1-NEXT: Debug Variable Analysis 333; GCN-O1-NEXT: Live Stack Slot Analysis 334; GCN-O1-NEXT: Virtual Register Map 335; GCN-O1-NEXT: Live Register Matrix 336; GCN-O1-NEXT: Bundle Machine CFG Edges 337; GCN-O1-NEXT: Spill Code Placement Analysis 338; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 339; GCN-O1-NEXT: Machine Optimization Remark Emitter 340; GCN-O1-NEXT: Greedy Register Allocator 341; GCN-O1-NEXT: Virtual Register Rewriter 342; GCN-O1-NEXT: SI lower SGPR spill instructions 343; GCN-O1-NEXT: Virtual Register Map 344; GCN-O1-NEXT: Live Register Matrix 345; GCN-O1-NEXT: Greedy Register Allocator 346; GCN-O1-NEXT: GCN NSA Reassign 347; GCN-O1-NEXT: Virtual Register Rewriter 348; GCN-O1-NEXT: Stack Slot Coloring 349; GCN-O1-NEXT: Machine Copy Propagation Pass 350; GCN-O1-NEXT: Machine Loop Invariant Code Motion 351; GCN-O1-NEXT: SI Fix VGPR copies 352; GCN-O1-NEXT: SI optimize exec mask operations 353; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis 354; GCN-O1-NEXT: Fixup Statepoint Caller Saved 355; GCN-O1-NEXT: PostRA Machine Sink 356; GCN-O1-NEXT: MachineDominator Tree Construction 357; GCN-O1-NEXT: Machine Natural Loop Construction 358; GCN-O1-NEXT: Machine Block Frequency Analysis 359; GCN-O1-NEXT: MachinePostDominator Tree Construction 360; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 361; GCN-O1-NEXT: Machine Optimization Remark Emitter 362; GCN-O1-NEXT: Shrink Wrapping analysis 363; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization 364; GCN-O1-NEXT: Control Flow Optimizer 365; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 366; GCN-O1-NEXT: Tail Duplication 367; GCN-O1-NEXT: Machine Copy Propagation Pass 368; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass 369; GCN-O1-NEXT: SI Shrink Instructions 370; GCN-O1-NEXT: SI post-RA bundler 371; GCN-O1-NEXT: MachineDominator Tree Construction 372; GCN-O1-NEXT: Machine Natural Loop Construction 373; GCN-O1-NEXT: PostRA Machine Instruction Scheduler 374; GCN-O1-NEXT: Machine Block Frequency Analysis 375; GCN-O1-NEXT: MachinePostDominator Tree Construction 376; GCN-O1-NEXT: Branch Probability Basic Block Placement 377; GCN-O1-NEXT: Insert fentry calls 378; GCN-O1-NEXT: Insert XRay ops 379; GCN-O1-NEXT: SI Memory Legalizer 380; GCN-O1-NEXT: MachinePostDominator Tree Construction 381; GCN-O1-NEXT: SI insert wait instructions 382; GCN-O1-NEXT: Insert required mode register values 383; GCN-O1-NEXT: SI Insert Hard Clauses 384; GCN-O1-NEXT: MachineDominator Tree Construction 385; GCN-O1-NEXT: SI Final Branch Preparation 386; GCN-O1-NEXT: SI peephole optimizations 387; GCN-O1-NEXT: Post RA hazard recognizer 388; GCN-O1-NEXT: Branch relaxation pass 389; GCN-O1-NEXT: Register Usage Information Collector Pass 390; GCN-O1-NEXT: Live DEBUG_VALUE analysis 391; GCN-O1-NEXT: Function register usage analysis 392; GCN-O1-NEXT: FunctionPass Manager 393; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 394; GCN-O1-NEXT: Machine Optimization Remark Emitter 395; GCN-O1-NEXT: AMDGPU Assembly Printer 396; GCN-O1-NEXT: Free MachineFunction 397; GCN-O1-NEXT:Pass Arguments: -domtree 398; GCN-O1-NEXT: FunctionPass Manager 399; GCN-O1-NEXT: Dominator Tree Construction 400 401; GCN-O1-OPTS:Target Library Information 402; GCN-O1-OPTS-NEXT:Target Pass Configuration 403; GCN-O1-OPTS-NEXT:Machine Module Information 404; GCN-O1-OPTS-NEXT:Target Transform Information 405; GCN-O1-OPTS-NEXT:Assumption Cache Tracker 406; GCN-O1-OPTS-NEXT:Profile summary info 407; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis 408; GCN-O1-OPTS-NEXT:External Alias Analysis 409; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis 410; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis 411; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage 412; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata 413; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis 414; GCN-O1-OPTS-NEXT:Register Usage Information Storage 415; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor 416; GCN-O1-OPTS-NEXT: ModulePass Manager 417; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering 418; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering 419; GCN-O1-OPTS-NEXT: FunctionPass Manager 420; GCN-O1-OPTS-NEXT: Dominator Tree Construction 421; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU 422; GCN-O1-OPTS-NEXT: Fix function bitcasts for AMDGPU 423; GCN-O1-OPTS-NEXT: FunctionPass Manager 424; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions 425; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics 426; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions 427; GCN-O1-OPTS-NEXT: CallGraph Construction 428; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 429; GCN-O1-OPTS-NEXT: Inliner for always_inline functions 430; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass 431; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks 432; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions 433; GCN-O1-OPTS-NEXT: FunctionPass Manager 434; GCN-O1-OPTS-NEXT: Infer address spaces 435; GCN-O1-OPTS-NEXT: Expand Atomic instructions 436; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca 437; GCN-O1-OPTS-NEXT: Dominator Tree Construction 438; GCN-O1-OPTS-NEXT: SROA 439; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 440; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 441; GCN-O1-OPTS-NEXT: Memory SSA 442; GCN-O1-OPTS-NEXT: Natural Loop Information 443; GCN-O1-OPTS-NEXT: Canonicalize natural loops 444; GCN-O1-OPTS-NEXT: LCSSA Verifier 445; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 446; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 447; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 448; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 449; GCN-O1-OPTS-NEXT: Loop Pass Manager 450; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion 451; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 452; GCN-O1-OPTS-NEXT: Speculatively execute instructions 453; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 454; GCN-O1-OPTS-NEXT: Straight line strength reduction 455; GCN-O1-OPTS-NEXT: Early CSE 456; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 457; GCN-O1-OPTS-NEXT: Nary reassociation 458; GCN-O1-OPTS-NEXT: Early CSE 459; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 460; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 461; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations 462; GCN-O1-OPTS-NEXT: Canonicalize natural loops 463; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 464; GCN-O1-OPTS-NEXT: Loop Pass Manager 465; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops 466; GCN-O1-OPTS-NEXT: Induction Variable Users 467; GCN-O1-OPTS-NEXT: Loop Strength Reduction 468; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 469; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 470; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp 471; GCN-O1-OPTS-NEXT: Natural Loop Information 472; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 473; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 474; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores 475; GCN-O1-OPTS-NEXT: Lower constant intrinsics 476; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 477; GCN-O1-OPTS-NEXT: Natural Loop Information 478; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 479; GCN-O1-OPTS-NEXT: Branch Probability Analysis 480; GCN-O1-OPTS-NEXT: Block Frequency Analysis 481; GCN-O1-OPTS-NEXT: Constant Hoisting 482; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library 483; GCN-O1-OPTS-NEXT: Partially inline calls to library functions 484; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics 485; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics 486; GCN-O1-OPTS-NEXT: Expand reduction intrinsics 487; GCN-O1-OPTS-NEXT: Early CSE 488; GCN-O1-OPTS-NEXT: AMDGPU Attributor 489; GCN-O1-OPTS-NEXT: CallGraph Construction 490; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 491; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features 492; GCN-O1-OPTS-NEXT: FunctionPass Manager 493; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments 494; GCN-O1-OPTS-NEXT: Dominator Tree Construction 495; GCN-O1-OPTS-NEXT: Natural Loop Information 496; GCN-O1-OPTS-NEXT: CodeGen Prepare 497; GCN-O1-OPTS-NEXT: Dominator Tree Construction 498; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 499; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 500; GCN-O1-OPTS-NEXT: Natural Loop Information 501; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 502; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer 503; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 504; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 505; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators 506; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 507; GCN-O1-OPTS-NEXT: Dominator Tree Construction 508; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 509; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 510; GCN-O1-OPTS-NEXT: Flatten the CFG 511; GCN-O1-OPTS-NEXT: Dominator Tree Construction 512; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 513; GCN-O1-OPTS-NEXT: Natural Loop Information 514; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 515; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations 516; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 517; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 518; GCN-O1-OPTS-NEXT: Code sinking 519; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 520; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes 521; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 522; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 523; GCN-O1-OPTS-NEXT: Dominator Tree Construction 524; GCN-O1-OPTS-NEXT: Natural Loop Information 525; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops 526; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block 527; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 528; GCN-O1-OPTS-NEXT: Dominance Frontier Construction 529; GCN-O1-OPTS-NEXT: Detect single entry single exit regions 530; GCN-O1-OPTS-NEXT: Region Pass Manager 531; GCN-O1-OPTS-NEXT: Structurize control flow 532; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 533; GCN-O1-OPTS-NEXT: Natural Loop Information 534; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 535; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 536; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 537; GCN-O1-OPTS-NEXT: Memory SSA 538; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values 539; GCN-O1-OPTS-NEXT: SI annotate control flow 540; GCN-O1-OPTS-NEXT: LCSSA Verifier 541; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 542; GCN-O1-OPTS-NEXT: DummyCGSCCPass 543; GCN-O1-OPTS-NEXT: FunctionPass Manager 544; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass 545; GCN-O1-OPTS-NEXT: Insert stack protectors 546; GCN-O1-OPTS-NEXT: Dominator Tree Construction 547; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 548; GCN-O1-OPTS-NEXT: Natural Loop Information 549; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 550; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 551; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 552; GCN-O1-OPTS-NEXT: Branch Probability Analysis 553; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 554; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 555; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 556; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 557; GCN-O1-OPTS-NEXT: SI Fix SGPR copies 558; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 559; GCN-O1-OPTS-NEXT: SI Lower i1 Copies 560; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions 561; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 562; GCN-O1-OPTS-NEXT: Early Tail Duplication 563; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs 564; GCN-O1-OPTS-NEXT: Slot index numbering 565; GCN-O1-OPTS-NEXT: Merge disjoint stack slots 566; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation 567; GCN-O1-OPTS-NEXT: Remove dead machine instructions 568; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 569; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 570; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 571; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 572; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 573; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 574; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 575; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 576; GCN-O1-OPTS-NEXT: Machine code sinking 577; GCN-O1-OPTS-NEXT: Peephole Optimizations 578; GCN-O1-OPTS-NEXT: Remove dead machine instructions 579; GCN-O1-OPTS-NEXT: SI Fold Operands 580; GCN-O1-OPTS-NEXT: GCN DPP Combine 581; GCN-O1-OPTS-NEXT: SI Load Store Optimizer 582; GCN-O1-OPTS-NEXT: SI Peephole SDWA 583; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 584; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 585; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 586; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 587; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 588; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 589; GCN-O1-OPTS-NEXT: SI Fold Operands 590; GCN-O1-OPTS-NEXT: Remove dead machine instructions 591; GCN-O1-OPTS-NEXT: SI Shrink Instructions 592; GCN-O1-OPTS-NEXT: Register Usage Information Propagation 593; GCN-O1-OPTS-NEXT: Detect Dead Lanes 594; GCN-O1-OPTS-NEXT: Remove dead machine instructions 595; GCN-O1-OPTS-NEXT: Process Implicit Definitions 596; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks 597; GCN-O1-OPTS-NEXT: Live Variable Analysis 598; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange 599; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation 600; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions 601; GCN-O1-OPTS-NEXT: Two-Address instruction pass 602; GCN-O1-OPTS-NEXT: Slot index numbering 603; GCN-O1-OPTS-NEXT: Live Interval Analysis 604; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 605; GCN-O1-OPTS-NEXT: Simple Register Coalescing 606; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components 607; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations 608; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler 609; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 610; GCN-O1-OPTS-NEXT: SI Whole Quad Mode 611; GCN-O1-OPTS-NEXT: Virtual Register Map 612; GCN-O1-OPTS-NEXT: Live Register Matrix 613; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers 614; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA 615; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 616; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 617; GCN-O1-OPTS-NEXT: Debug Variable Analysis 618; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis 619; GCN-O1-OPTS-NEXT: Virtual Register Map 620; GCN-O1-OPTS-NEXT: Live Register Matrix 621; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges 622; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis 623; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 624; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 625; GCN-O1-OPTS-NEXT: Greedy Register Allocator 626; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 627; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions 628; GCN-O1-OPTS-NEXT: Virtual Register Map 629; GCN-O1-OPTS-NEXT: Live Register Matrix 630; GCN-O1-OPTS-NEXT: Greedy Register Allocator 631; GCN-O1-OPTS-NEXT: GCN NSA Reassign 632; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 633; GCN-O1-OPTS-NEXT: Stack Slot Coloring 634; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 635; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion 636; GCN-O1-OPTS-NEXT: SI Fix VGPR copies 637; GCN-O1-OPTS-NEXT: SI optimize exec mask operations 638; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis 639; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved 640; GCN-O1-OPTS-NEXT: PostRA Machine Sink 641; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 642; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 643; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 644; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 645; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 646; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 647; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis 648; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization 649; GCN-O1-OPTS-NEXT: Control Flow Optimizer 650; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 651; GCN-O1-OPTS-NEXT: Tail Duplication 652; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 653; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass 654; GCN-O1-OPTS-NEXT: SI Shrink Instructions 655; GCN-O1-OPTS-NEXT: SI post-RA bundler 656; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 657; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 658; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler 659; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 660; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 661; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement 662; GCN-O1-OPTS-NEXT: Insert fentry calls 663; GCN-O1-OPTS-NEXT: Insert XRay ops 664; GCN-O1-OPTS-NEXT: SI Memory Legalizer 665; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 666; GCN-O1-OPTS-NEXT: SI insert wait instructions 667; GCN-O1-OPTS-NEXT: Insert required mode register values 668; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses 669; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 670; GCN-O1-OPTS-NEXT: SI Final Branch Preparation 671; GCN-O1-OPTS-NEXT: SI peephole optimizations 672; GCN-O1-OPTS-NEXT: Post RA hazard recognizer 673; GCN-O1-OPTS-NEXT: Branch relaxation pass 674; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass 675; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis 676; GCN-O1-OPTS-NEXT: Function register usage analysis 677; GCN-O1-OPTS-NEXT: FunctionPass Manager 678; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 679; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 680; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer 681; GCN-O1-OPTS-NEXT: Free MachineFunction 682; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree 683; GCN-O1-OPTS-NEXT: FunctionPass Manager 684; GCN-O1-OPTS-NEXT: Dominator Tree Construction 685 686; GCN-O2:Target Library Information 687; GCN-O2-NEXT:Target Pass Configuration 688; GCN-O2-NEXT:Machine Module Information 689; GCN-O2-NEXT:Target Transform Information 690; GCN-O2-NEXT:Assumption Cache Tracker 691; GCN-O2-NEXT:Profile summary info 692; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis 693; GCN-O2-NEXT:External Alias Analysis 694; GCN-O2-NEXT:Type-Based Alias Analysis 695; GCN-O2-NEXT:Scoped NoAlias Alias Analysis 696; GCN-O2-NEXT:Argument Register Usage Information Storage 697; GCN-O2-NEXT:Create Garbage Collector Module Metadata 698; GCN-O2-NEXT:Machine Branch Probability Analysis 699; GCN-O2-NEXT:Register Usage Information Storage 700; GCN-O2-NEXT:Default Regalloc Eviction Advisor 701; GCN-O2-NEXT: ModulePass Manager 702; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering 703; GCN-O2-NEXT: AMDGPU Printf lowering 704; GCN-O2-NEXT: FunctionPass Manager 705; GCN-O2-NEXT: Dominator Tree Construction 706; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU 707; GCN-O2-NEXT: Fix function bitcasts for AMDGPU 708; GCN-O2-NEXT: FunctionPass Manager 709; GCN-O2-NEXT: Early propagate attributes from kernels to functions 710; GCN-O2-NEXT: AMDGPU Lower Intrinsics 711; GCN-O2-NEXT: AMDGPU Inline All Functions 712; GCN-O2-NEXT: CallGraph Construction 713; GCN-O2-NEXT: Call Graph SCC Pass Manager 714; GCN-O2-NEXT: Inliner for always_inline functions 715; GCN-O2-NEXT: A No-Op Barrier Pass 716; GCN-O2-NEXT: Lower OpenCL enqueued blocks 717; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions 718; GCN-O2-NEXT: FunctionPass Manager 719; GCN-O2-NEXT: Infer address spaces 720; GCN-O2-NEXT: Expand Atomic instructions 721; GCN-O2-NEXT: AMDGPU Promote Alloca 722; GCN-O2-NEXT: Dominator Tree Construction 723; GCN-O2-NEXT: SROA 724; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 725; GCN-O2-NEXT: Function Alias Analysis Results 726; GCN-O2-NEXT: Memory SSA 727; GCN-O2-NEXT: Natural Loop Information 728; GCN-O2-NEXT: Canonicalize natural loops 729; GCN-O2-NEXT: LCSSA Verifier 730; GCN-O2-NEXT: Loop-Closed SSA Form Pass 731; GCN-O2-NEXT: Scalar Evolution Analysis 732; GCN-O2-NEXT: Lazy Branch Probability Analysis 733; GCN-O2-NEXT: Lazy Block Frequency Analysis 734; GCN-O2-NEXT: Loop Pass Manager 735; GCN-O2-NEXT: Loop Invariant Code Motion 736; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 737; GCN-O2-NEXT: Speculatively execute instructions 738; GCN-O2-NEXT: Scalar Evolution Analysis 739; GCN-O2-NEXT: Straight line strength reduction 740; GCN-O2-NEXT: Early CSE 741; GCN-O2-NEXT: Scalar Evolution Analysis 742; GCN-O2-NEXT: Nary reassociation 743; GCN-O2-NEXT: Early CSE 744; GCN-O2-NEXT: Post-Dominator Tree Construction 745; GCN-O2-NEXT: Legacy Divergence Analysis 746; GCN-O2-NEXT: AMDGPU IR optimizations 747; GCN-O2-NEXT: Canonicalize natural loops 748; GCN-O2-NEXT: Scalar Evolution Analysis 749; GCN-O2-NEXT: Loop Pass Manager 750; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops 751; GCN-O2-NEXT: Induction Variable Users 752; GCN-O2-NEXT: Loop Strength Reduction 753; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 754; GCN-O2-NEXT: Function Alias Analysis Results 755; GCN-O2-NEXT: Merge contiguous icmps into a memcmp 756; GCN-O2-NEXT: Natural Loop Information 757; GCN-O2-NEXT: Lazy Branch Probability Analysis 758; GCN-O2-NEXT: Lazy Block Frequency Analysis 759; GCN-O2-NEXT: Expand memcmp() to load/stores 760; GCN-O2-NEXT: Lower constant intrinsics 761; GCN-O2-NEXT: Remove unreachable blocks from the CFG 762; GCN-O2-NEXT: Natural Loop Information 763; GCN-O2-NEXT: Post-Dominator Tree Construction 764; GCN-O2-NEXT: Branch Probability Analysis 765; GCN-O2-NEXT: Block Frequency Analysis 766; GCN-O2-NEXT: Constant Hoisting 767; GCN-O2-NEXT: Replace intrinsics with calls to vector library 768; GCN-O2-NEXT: Partially inline calls to library functions 769; GCN-O2-NEXT: Expand vector predication intrinsics 770; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics 771; GCN-O2-NEXT: Expand reduction intrinsics 772; GCN-O2-NEXT: Early CSE 773; GCN-O2-NEXT: AMDGPU Attributor 774; GCN-O2-NEXT: CallGraph Construction 775; GCN-O2-NEXT: Call Graph SCC Pass Manager 776; GCN-O2-NEXT: AMDGPU Annotate Kernel Features 777; GCN-O2-NEXT: FunctionPass Manager 778; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments 779; GCN-O2-NEXT: Dominator Tree Construction 780; GCN-O2-NEXT: Natural Loop Information 781; GCN-O2-NEXT: CodeGen Prepare 782; GCN-O2-NEXT: Dominator Tree Construction 783; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 784; GCN-O2-NEXT: Function Alias Analysis Results 785; GCN-O2-NEXT: Natural Loop Information 786; GCN-O2-NEXT: Scalar Evolution Analysis 787; GCN-O2-NEXT: GPU Load and Store Vectorizer 788; GCN-O2-NEXT: Lazy Value Information Analysis 789; GCN-O2-NEXT: Lower SwitchInst's to branches 790; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators 791; GCN-O2-NEXT: Remove unreachable blocks from the CFG 792; GCN-O2-NEXT: Dominator Tree Construction 793; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 794; GCN-O2-NEXT: Function Alias Analysis Results 795; GCN-O2-NEXT: Flatten the CFG 796; GCN-O2-NEXT: Dominator Tree Construction 797; GCN-O2-NEXT: Post-Dominator Tree Construction 798; GCN-O2-NEXT: Natural Loop Information 799; GCN-O2-NEXT: Legacy Divergence Analysis 800; GCN-O2-NEXT: AMDGPU IR late optimizations 801; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 802; GCN-O2-NEXT: Function Alias Analysis Results 803; GCN-O2-NEXT: Code sinking 804; GCN-O2-NEXT: Legacy Divergence Analysis 805; GCN-O2-NEXT: Unify divergent function exit nodes 806; GCN-O2-NEXT: Lazy Value Information Analysis 807; GCN-O2-NEXT: Lower SwitchInst's to branches 808; GCN-O2-NEXT: Dominator Tree Construction 809; GCN-O2-NEXT: Natural Loop Information 810; GCN-O2-NEXT: Convert irreducible control-flow into natural loops 811; GCN-O2-NEXT: Fixup each natural loop to have a single exit block 812; GCN-O2-NEXT: Post-Dominator Tree Construction 813; GCN-O2-NEXT: Dominance Frontier Construction 814; GCN-O2-NEXT: Detect single entry single exit regions 815; GCN-O2-NEXT: Region Pass Manager 816; GCN-O2-NEXT: Structurize control flow 817; GCN-O2-NEXT: Post-Dominator Tree Construction 818; GCN-O2-NEXT: Natural Loop Information 819; GCN-O2-NEXT: Legacy Divergence Analysis 820; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 821; GCN-O2-NEXT: Function Alias Analysis Results 822; GCN-O2-NEXT: Memory SSA 823; GCN-O2-NEXT: AMDGPU Annotate Uniform Values 824; GCN-O2-NEXT: SI annotate control flow 825; GCN-O2-NEXT: LCSSA Verifier 826; GCN-O2-NEXT: Loop-Closed SSA Form Pass 827; GCN-O2-NEXT: Analysis if a function is memory bound 828; GCN-O2-NEXT: DummyCGSCCPass 829; GCN-O2-NEXT: FunctionPass Manager 830; GCN-O2-NEXT: Safe Stack instrumentation pass 831; GCN-O2-NEXT: Insert stack protectors 832; GCN-O2-NEXT: Dominator Tree Construction 833; GCN-O2-NEXT: Post-Dominator Tree Construction 834; GCN-O2-NEXT: Natural Loop Information 835; GCN-O2-NEXT: Legacy Divergence Analysis 836; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 837; GCN-O2-NEXT: Function Alias Analysis Results 838; GCN-O2-NEXT: Branch Probability Analysis 839; GCN-O2-NEXT: Lazy Branch Probability Analysis 840; GCN-O2-NEXT: Lazy Block Frequency Analysis 841; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 842; GCN-O2-NEXT: MachineDominator Tree Construction 843; GCN-O2-NEXT: SI Fix SGPR copies 844; GCN-O2-NEXT: MachinePostDominator Tree Construction 845; GCN-O2-NEXT: SI Lower i1 Copies 846; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions 847; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 848; GCN-O2-NEXT: Early Tail Duplication 849; GCN-O2-NEXT: Optimize machine instruction PHIs 850; GCN-O2-NEXT: Slot index numbering 851; GCN-O2-NEXT: Merge disjoint stack slots 852; GCN-O2-NEXT: Local Stack Slot Allocation 853; GCN-O2-NEXT: Remove dead machine instructions 854; GCN-O2-NEXT: MachineDominator Tree Construction 855; GCN-O2-NEXT: Machine Natural Loop Construction 856; GCN-O2-NEXT: Machine Block Frequency Analysis 857; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 858; GCN-O2-NEXT: MachineDominator Tree Construction 859; GCN-O2-NEXT: Machine Block Frequency Analysis 860; GCN-O2-NEXT: Machine Common Subexpression Elimination 861; GCN-O2-NEXT: MachinePostDominator Tree Construction 862; GCN-O2-NEXT: Machine code sinking 863; GCN-O2-NEXT: Peephole Optimizations 864; GCN-O2-NEXT: Remove dead machine instructions 865; GCN-O2-NEXT: SI Fold Operands 866; GCN-O2-NEXT: GCN DPP Combine 867; GCN-O2-NEXT: SI Load Store Optimizer 868; GCN-O2-NEXT: SI Peephole SDWA 869; GCN-O2-NEXT: Machine Block Frequency Analysis 870; GCN-O2-NEXT: MachineDominator Tree Construction 871; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 872; GCN-O2-NEXT: MachineDominator Tree Construction 873; GCN-O2-NEXT: Machine Block Frequency Analysis 874; GCN-O2-NEXT: Machine Common Subexpression Elimination 875; GCN-O2-NEXT: SI Fold Operands 876; GCN-O2-NEXT: Remove dead machine instructions 877; GCN-O2-NEXT: SI Shrink Instructions 878; GCN-O2-NEXT: Register Usage Information Propagation 879; GCN-O2-NEXT: Detect Dead Lanes 880; GCN-O2-NEXT: Remove dead machine instructions 881; GCN-O2-NEXT: Process Implicit Definitions 882; GCN-O2-NEXT: Remove unreachable machine basic blocks 883; GCN-O2-NEXT: Live Variable Analysis 884; GCN-O2-NEXT: SI Optimize VGPR LiveRange 885; GCN-O2-NEXT: Eliminate PHI nodes for register allocation 886; GCN-O2-NEXT: SI Lower control flow pseudo instructions 887; GCN-O2-NEXT: Two-Address instruction pass 888; GCN-O2-NEXT: Slot index numbering 889; GCN-O2-NEXT: Live Interval Analysis 890; GCN-O2-NEXT: Machine Natural Loop Construction 891; GCN-O2-NEXT: Simple Register Coalescing 892; GCN-O2-NEXT: Rename Disconnected Subregister Components 893; GCN-O2-NEXT: AMDGPU Pre-RA optimizations 894; GCN-O2-NEXT: Machine Instruction Scheduler 895; GCN-O2-NEXT: MachinePostDominator Tree Construction 896; GCN-O2-NEXT: SI Whole Quad Mode 897; GCN-O2-NEXT: Virtual Register Map 898; GCN-O2-NEXT: Live Register Matrix 899; GCN-O2-NEXT: SI Pre-allocate WWM Registers 900; GCN-O2-NEXT: SI optimize exec mask operations pre-RA 901; GCN-O2-NEXT: SI Form memory clauses 902; GCN-O2-NEXT: Machine Natural Loop Construction 903; GCN-O2-NEXT: Machine Block Frequency Analysis 904; GCN-O2-NEXT: Debug Variable Analysis 905; GCN-O2-NEXT: Live Stack Slot Analysis 906; GCN-O2-NEXT: Virtual Register Map 907; GCN-O2-NEXT: Live Register Matrix 908; GCN-O2-NEXT: Bundle Machine CFG Edges 909; GCN-O2-NEXT: Spill Code Placement Analysis 910; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 911; GCN-O2-NEXT: Machine Optimization Remark Emitter 912; GCN-O2-NEXT: Greedy Register Allocator 913; GCN-O2-NEXT: Virtual Register Rewriter 914; GCN-O2-NEXT: SI lower SGPR spill instructions 915; GCN-O2-NEXT: Virtual Register Map 916; GCN-O2-NEXT: Live Register Matrix 917; GCN-O2-NEXT: Greedy Register Allocator 918; GCN-O2-NEXT: GCN NSA Reassign 919; GCN-O2-NEXT: Virtual Register Rewriter 920; GCN-O2-NEXT: Stack Slot Coloring 921; GCN-O2-NEXT: Machine Copy Propagation Pass 922; GCN-O2-NEXT: Machine Loop Invariant Code Motion 923; GCN-O2-NEXT: SI Fix VGPR copies 924; GCN-O2-NEXT: SI optimize exec mask operations 925; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis 926; GCN-O2-NEXT: Fixup Statepoint Caller Saved 927; GCN-O2-NEXT: PostRA Machine Sink 928; GCN-O2-NEXT: MachineDominator Tree Construction 929; GCN-O2-NEXT: Machine Natural Loop Construction 930; GCN-O2-NEXT: Machine Block Frequency Analysis 931; GCN-O2-NEXT: MachinePostDominator Tree Construction 932; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 933; GCN-O2-NEXT: Machine Optimization Remark Emitter 934; GCN-O2-NEXT: Shrink Wrapping analysis 935; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization 936; GCN-O2-NEXT: Control Flow Optimizer 937; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 938; GCN-O2-NEXT: Tail Duplication 939; GCN-O2-NEXT: Machine Copy Propagation Pass 940; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass 941; GCN-O2-NEXT: SI Shrink Instructions 942; GCN-O2-NEXT: SI post-RA bundler 943; GCN-O2-NEXT: MachineDominator Tree Construction 944; GCN-O2-NEXT: Machine Natural Loop Construction 945; GCN-O2-NEXT: PostRA Machine Instruction Scheduler 946; GCN-O2-NEXT: Machine Block Frequency Analysis 947; GCN-O2-NEXT: MachinePostDominator Tree Construction 948; GCN-O2-NEXT: Branch Probability Basic Block Placement 949; GCN-O2-NEXT: Insert fentry calls 950; GCN-O2-NEXT: Insert XRay ops 951; GCN-O2-NEXT: SI Memory Legalizer 952; GCN-O2-NEXT: MachinePostDominator Tree Construction 953; GCN-O2-NEXT: SI insert wait instructions 954; GCN-O2-NEXT: Insert required mode register values 955; GCN-O2-NEXT: SI Insert Hard Clauses 956; GCN-O2-NEXT: MachineDominator Tree Construction 957; GCN-O2-NEXT: SI Final Branch Preparation 958; GCN-O2-NEXT: SI peephole optimizations 959; GCN-O2-NEXT: Post RA hazard recognizer 960; GCN-O2-NEXT: Branch relaxation pass 961; GCN-O2-NEXT: Register Usage Information Collector Pass 962; GCN-O2-NEXT: Live DEBUG_VALUE analysis 963; GCN-O2-NEXT: Function register usage analysis 964; GCN-O2-NEXT: FunctionPass Manager 965; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 966; GCN-O2-NEXT: Machine Optimization Remark Emitter 967; GCN-O2-NEXT: AMDGPU Assembly Printer 968; GCN-O2-NEXT: Free MachineFunction 969; GCN-O2-NEXT:Pass Arguments: -domtree 970; GCN-O2-NEXT: FunctionPass Manager 971; GCN-O2-NEXT: Dominator Tree Construction 972 973; GCN-O3:Target Library Information 974; GCN-O3-NEXT:Target Pass Configuration 975; GCN-O3-NEXT:Machine Module Information 976; GCN-O3-NEXT:Target Transform Information 977; GCN-O3-NEXT:Assumption Cache Tracker 978; GCN-O3-NEXT:Profile summary info 979; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis 980; GCN-O3-NEXT:External Alias Analysis 981; GCN-O3-NEXT:Type-Based Alias Analysis 982; GCN-O3-NEXT:Scoped NoAlias Alias Analysis 983; GCN-O3-NEXT:Argument Register Usage Information Storage 984; GCN-O3-NEXT:Create Garbage Collector Module Metadata 985; GCN-O3-NEXT:Machine Branch Probability Analysis 986; GCN-O3-NEXT:Register Usage Information Storage 987; GCN-O3-NEXT:Default Regalloc Eviction Advisor 988; GCN-O3-NEXT: ModulePass Manager 989; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering 990; GCN-O3-NEXT: AMDGPU Printf lowering 991; GCN-O3-NEXT: FunctionPass Manager 992; GCN-O3-NEXT: Dominator Tree Construction 993; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU 994; GCN-O3-NEXT: Fix function bitcasts for AMDGPU 995; GCN-O3-NEXT: FunctionPass Manager 996; GCN-O3-NEXT: Early propagate attributes from kernels to functions 997; GCN-O3-NEXT: AMDGPU Lower Intrinsics 998; GCN-O3-NEXT: AMDGPU Inline All Functions 999; GCN-O3-NEXT: CallGraph Construction 1000; GCN-O3-NEXT: Call Graph SCC Pass Manager 1001; GCN-O3-NEXT: Inliner for always_inline functions 1002; GCN-O3-NEXT: A No-Op Barrier Pass 1003; GCN-O3-NEXT: Lower OpenCL enqueued blocks 1004; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions 1005; GCN-O3-NEXT: FunctionPass Manager 1006; GCN-O3-NEXT: Infer address spaces 1007; GCN-O3-NEXT: Expand Atomic instructions 1008; GCN-O3-NEXT: AMDGPU Promote Alloca 1009; GCN-O3-NEXT: Dominator Tree Construction 1010; GCN-O3-NEXT: SROA 1011; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1012; GCN-O3-NEXT: Function Alias Analysis Results 1013; GCN-O3-NEXT: Memory SSA 1014; GCN-O3-NEXT: Natural Loop Information 1015; GCN-O3-NEXT: Canonicalize natural loops 1016; GCN-O3-NEXT: LCSSA Verifier 1017; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1018; GCN-O3-NEXT: Scalar Evolution Analysis 1019; GCN-O3-NEXT: Lazy Branch Probability Analysis 1020; GCN-O3-NEXT: Lazy Block Frequency Analysis 1021; GCN-O3-NEXT: Loop Pass Manager 1022; GCN-O3-NEXT: Loop Invariant Code Motion 1023; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 1024; GCN-O3-NEXT: Speculatively execute instructions 1025; GCN-O3-NEXT: Scalar Evolution Analysis 1026; GCN-O3-NEXT: Straight line strength reduction 1027; GCN-O3-NEXT: Phi Values Analysis 1028; GCN-O3-NEXT: Function Alias Analysis Results 1029; GCN-O3-NEXT: Memory Dependence Analysis 1030; GCN-O3-NEXT: Optimization Remark Emitter 1031; GCN-O3-NEXT: Global Value Numbering 1032; GCN-O3-NEXT: Scalar Evolution Analysis 1033; GCN-O3-NEXT: Nary reassociation 1034; GCN-O3-NEXT: Early CSE 1035; GCN-O3-NEXT: Post-Dominator Tree Construction 1036; GCN-O3-NEXT: Legacy Divergence Analysis 1037; GCN-O3-NEXT: AMDGPU IR optimizations 1038; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1039; GCN-O3-NEXT: Canonicalize natural loops 1040; GCN-O3-NEXT: Scalar Evolution Analysis 1041; GCN-O3-NEXT: Loop Pass Manager 1042; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops 1043; GCN-O3-NEXT: Induction Variable Users 1044; GCN-O3-NEXT: Loop Strength Reduction 1045; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1046; GCN-O3-NEXT: Function Alias Analysis Results 1047; GCN-O3-NEXT: Merge contiguous icmps into a memcmp 1048; GCN-O3-NEXT: Natural Loop Information 1049; GCN-O3-NEXT: Lazy Branch Probability Analysis 1050; GCN-O3-NEXT: Lazy Block Frequency Analysis 1051; GCN-O3-NEXT: Expand memcmp() to load/stores 1052; GCN-O3-NEXT: Lower constant intrinsics 1053; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1054; GCN-O3-NEXT: Natural Loop Information 1055; GCN-O3-NEXT: Post-Dominator Tree Construction 1056; GCN-O3-NEXT: Branch Probability Analysis 1057; GCN-O3-NEXT: Block Frequency Analysis 1058; GCN-O3-NEXT: Constant Hoisting 1059; GCN-O3-NEXT: Replace intrinsics with calls to vector library 1060; GCN-O3-NEXT: Partially inline calls to library functions 1061; GCN-O3-NEXT: Expand vector predication intrinsics 1062; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics 1063; GCN-O3-NEXT: Expand reduction intrinsics 1064; GCN-O3-NEXT: Natural Loop Information 1065; GCN-O3-NEXT: Phi Values Analysis 1066; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1067; GCN-O3-NEXT: Function Alias Analysis Results 1068; GCN-O3-NEXT: Memory Dependence Analysis 1069; GCN-O3-NEXT: Lazy Branch Probability Analysis 1070; GCN-O3-NEXT: Lazy Block Frequency Analysis 1071; GCN-O3-NEXT: Optimization Remark Emitter 1072; GCN-O3-NEXT: Global Value Numbering 1073; GCN-O3-NEXT: AMDGPU Attributor 1074; GCN-O3-NEXT: CallGraph Construction 1075; GCN-O3-NEXT: Call Graph SCC Pass Manager 1076; GCN-O3-NEXT: AMDGPU Annotate Kernel Features 1077; GCN-O3-NEXT: FunctionPass Manager 1078; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments 1079; GCN-O3-NEXT: Dominator Tree Construction 1080; GCN-O3-NEXT: Natural Loop Information 1081; GCN-O3-NEXT: CodeGen Prepare 1082; GCN-O3-NEXT: Dominator Tree Construction 1083; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1084; GCN-O3-NEXT: Function Alias Analysis Results 1085; GCN-O3-NEXT: Natural Loop Information 1086; GCN-O3-NEXT: Scalar Evolution Analysis 1087; GCN-O3-NEXT: GPU Load and Store Vectorizer 1088; GCN-O3-NEXT: Lazy Value Information Analysis 1089; GCN-O3-NEXT: Lower SwitchInst's to branches 1090; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators 1091; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1092; GCN-O3-NEXT: Dominator Tree Construction 1093; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1094; GCN-O3-NEXT: Function Alias Analysis Results 1095; GCN-O3-NEXT: Flatten the CFG 1096; GCN-O3-NEXT: Dominator Tree Construction 1097; GCN-O3-NEXT: Post-Dominator Tree Construction 1098; GCN-O3-NEXT: Natural Loop Information 1099; GCN-O3-NEXT: Legacy Divergence Analysis 1100; GCN-O3-NEXT: AMDGPU IR late optimizations 1101; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1102; GCN-O3-NEXT: Function Alias Analysis Results 1103; GCN-O3-NEXT: Code sinking 1104; GCN-O3-NEXT: Legacy Divergence Analysis 1105; GCN-O3-NEXT: Unify divergent function exit nodes 1106; GCN-O3-NEXT: Lazy Value Information Analysis 1107; GCN-O3-NEXT: Lower SwitchInst's to branches 1108; GCN-O3-NEXT: Dominator Tree Construction 1109; GCN-O3-NEXT: Natural Loop Information 1110; GCN-O3-NEXT: Convert irreducible control-flow into natural loops 1111; GCN-O3-NEXT: Fixup each natural loop to have a single exit block 1112; GCN-O3-NEXT: Post-Dominator Tree Construction 1113; GCN-O3-NEXT: Dominance Frontier Construction 1114; GCN-O3-NEXT: Detect single entry single exit regions 1115; GCN-O3-NEXT: Region Pass Manager 1116; GCN-O3-NEXT: Structurize control flow 1117; GCN-O3-NEXT: Post-Dominator Tree Construction 1118; GCN-O3-NEXT: Natural Loop Information 1119; GCN-O3-NEXT: Legacy Divergence Analysis 1120; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1121; GCN-O3-NEXT: Function Alias Analysis Results 1122; GCN-O3-NEXT: Memory SSA 1123; GCN-O3-NEXT: AMDGPU Annotate Uniform Values 1124; GCN-O3-NEXT: SI annotate control flow 1125; GCN-O3-NEXT: LCSSA Verifier 1126; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1127; GCN-O3-NEXT: Analysis if a function is memory bound 1128; GCN-O3-NEXT: DummyCGSCCPass 1129; GCN-O3-NEXT: FunctionPass Manager 1130; GCN-O3-NEXT: Safe Stack instrumentation pass 1131; GCN-O3-NEXT: Insert stack protectors 1132; GCN-O3-NEXT: Dominator Tree Construction 1133; GCN-O3-NEXT: Post-Dominator Tree Construction 1134; GCN-O3-NEXT: Natural Loop Information 1135; GCN-O3-NEXT: Legacy Divergence Analysis 1136; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1137; GCN-O3-NEXT: Function Alias Analysis Results 1138; GCN-O3-NEXT: Branch Probability Analysis 1139; GCN-O3-NEXT: Lazy Branch Probability Analysis 1140; GCN-O3-NEXT: Lazy Block Frequency Analysis 1141; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 1142; GCN-O3-NEXT: MachineDominator Tree Construction 1143; GCN-O3-NEXT: SI Fix SGPR copies 1144; GCN-O3-NEXT: MachinePostDominator Tree Construction 1145; GCN-O3-NEXT: SI Lower i1 Copies 1146; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions 1147; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1148; GCN-O3-NEXT: Early Tail Duplication 1149; GCN-O3-NEXT: Optimize machine instruction PHIs 1150; GCN-O3-NEXT: Slot index numbering 1151; GCN-O3-NEXT: Merge disjoint stack slots 1152; GCN-O3-NEXT: Local Stack Slot Allocation 1153; GCN-O3-NEXT: Remove dead machine instructions 1154; GCN-O3-NEXT: MachineDominator Tree Construction 1155; GCN-O3-NEXT: Machine Natural Loop Construction 1156; GCN-O3-NEXT: Machine Block Frequency Analysis 1157; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1158; GCN-O3-NEXT: MachineDominator Tree Construction 1159; GCN-O3-NEXT: Machine Block Frequency Analysis 1160; GCN-O3-NEXT: Machine Common Subexpression Elimination 1161; GCN-O3-NEXT: MachinePostDominator Tree Construction 1162; GCN-O3-NEXT: Machine code sinking 1163; GCN-O3-NEXT: Peephole Optimizations 1164; GCN-O3-NEXT: Remove dead machine instructions 1165; GCN-O3-NEXT: SI Fold Operands 1166; GCN-O3-NEXT: GCN DPP Combine 1167; GCN-O3-NEXT: SI Load Store Optimizer 1168; GCN-O3-NEXT: SI Peephole SDWA 1169; GCN-O3-NEXT: Machine Block Frequency Analysis 1170; GCN-O3-NEXT: MachineDominator Tree Construction 1171; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1172; GCN-O3-NEXT: MachineDominator Tree Construction 1173; GCN-O3-NEXT: Machine Block Frequency Analysis 1174; GCN-O3-NEXT: Machine Common Subexpression Elimination 1175; GCN-O3-NEXT: SI Fold Operands 1176; GCN-O3-NEXT: Remove dead machine instructions 1177; GCN-O3-NEXT: SI Shrink Instructions 1178; GCN-O3-NEXT: Register Usage Information Propagation 1179; GCN-O3-NEXT: Detect Dead Lanes 1180; GCN-O3-NEXT: Remove dead machine instructions 1181; GCN-O3-NEXT: Process Implicit Definitions 1182; GCN-O3-NEXT: Remove unreachable machine basic blocks 1183; GCN-O3-NEXT: Live Variable Analysis 1184; GCN-O3-NEXT: SI Optimize VGPR LiveRange 1185; GCN-O3-NEXT: Eliminate PHI nodes for register allocation 1186; GCN-O3-NEXT: SI Lower control flow pseudo instructions 1187; GCN-O3-NEXT: Two-Address instruction pass 1188; GCN-O3-NEXT: Slot index numbering 1189; GCN-O3-NEXT: Live Interval Analysis 1190; GCN-O3-NEXT: Machine Natural Loop Construction 1191; GCN-O3-NEXT: Simple Register Coalescing 1192; GCN-O3-NEXT: Rename Disconnected Subregister Components 1193; GCN-O3-NEXT: AMDGPU Pre-RA optimizations 1194; GCN-O3-NEXT: Machine Instruction Scheduler 1195; GCN-O3-NEXT: MachinePostDominator Tree Construction 1196; GCN-O3-NEXT: SI Whole Quad Mode 1197; GCN-O3-NEXT: Virtual Register Map 1198; GCN-O3-NEXT: Live Register Matrix 1199; GCN-O3-NEXT: SI Pre-allocate WWM Registers 1200; GCN-O3-NEXT: SI optimize exec mask operations pre-RA 1201; GCN-O3-NEXT: SI Form memory clauses 1202; GCN-O3-NEXT: Machine Natural Loop Construction 1203; GCN-O3-NEXT: Machine Block Frequency Analysis 1204; GCN-O3-NEXT: Debug Variable Analysis 1205; GCN-O3-NEXT: Live Stack Slot Analysis 1206; GCN-O3-NEXT: Virtual Register Map 1207; GCN-O3-NEXT: Live Register Matrix 1208; GCN-O3-NEXT: Bundle Machine CFG Edges 1209; GCN-O3-NEXT: Spill Code Placement Analysis 1210; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1211; GCN-O3-NEXT: Machine Optimization Remark Emitter 1212; GCN-O3-NEXT: Greedy Register Allocator 1213; GCN-O3-NEXT: Virtual Register Rewriter 1214; GCN-O3-NEXT: SI lower SGPR spill instructions 1215; GCN-O3-NEXT: Virtual Register Map 1216; GCN-O3-NEXT: Live Register Matrix 1217; GCN-O3-NEXT: Greedy Register Allocator 1218; GCN-O3-NEXT: GCN NSA Reassign 1219; GCN-O3-NEXT: Virtual Register Rewriter 1220; GCN-O3-NEXT: Stack Slot Coloring 1221; GCN-O3-NEXT: Machine Copy Propagation Pass 1222; GCN-O3-NEXT: Machine Loop Invariant Code Motion 1223; GCN-O3-NEXT: SI Fix VGPR copies 1224; GCN-O3-NEXT: SI optimize exec mask operations 1225; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis 1226; GCN-O3-NEXT: Fixup Statepoint Caller Saved 1227; GCN-O3-NEXT: PostRA Machine Sink 1228; GCN-O3-NEXT: MachineDominator Tree Construction 1229; GCN-O3-NEXT: Machine Natural Loop Construction 1230; GCN-O3-NEXT: Machine Block Frequency Analysis 1231; GCN-O3-NEXT: MachinePostDominator Tree Construction 1232; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1233; GCN-O3-NEXT: Machine Optimization Remark Emitter 1234; GCN-O3-NEXT: Shrink Wrapping analysis 1235; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization 1236; GCN-O3-NEXT: Control Flow Optimizer 1237; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1238; GCN-O3-NEXT: Tail Duplication 1239; GCN-O3-NEXT: Machine Copy Propagation Pass 1240; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass 1241; GCN-O3-NEXT: SI Shrink Instructions 1242; GCN-O3-NEXT: SI post-RA bundler 1243; GCN-O3-NEXT: MachineDominator Tree Construction 1244; GCN-O3-NEXT: Machine Natural Loop Construction 1245; GCN-O3-NEXT: PostRA Machine Instruction Scheduler 1246; GCN-O3-NEXT: Machine Block Frequency Analysis 1247; GCN-O3-NEXT: MachinePostDominator Tree Construction 1248; GCN-O3-NEXT: Branch Probability Basic Block Placement 1249; GCN-O3-NEXT: Insert fentry calls 1250; GCN-O3-NEXT: Insert XRay ops 1251; GCN-O3-NEXT: SI Memory Legalizer 1252; GCN-O3-NEXT: MachinePostDominator Tree Construction 1253; GCN-O3-NEXT: SI insert wait instructions 1254; GCN-O3-NEXT: Insert required mode register values 1255; GCN-O3-NEXT: SI Insert Hard Clauses 1256; GCN-O3-NEXT: MachineDominator Tree Construction 1257; GCN-O3-NEXT: SI Final Branch Preparation 1258; GCN-O3-NEXT: SI peephole optimizations 1259; GCN-O3-NEXT: Post RA hazard recognizer 1260; GCN-O3-NEXT: Branch relaxation pass 1261; GCN-O3-NEXT: Register Usage Information Collector Pass 1262; GCN-O3-NEXT: Live DEBUG_VALUE analysis 1263; GCN-O3-NEXT: Function register usage analysis 1264; GCN-O3-NEXT: FunctionPass Manager 1265; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1266; GCN-O3-NEXT: Machine Optimization Remark Emitter 1267; GCN-O3-NEXT: AMDGPU Assembly Printer 1268; GCN-O3-NEXT: Free MachineFunction 1269; GCN-O3-NEXT:Pass Arguments: -domtree 1270; GCN-O3-NEXT: FunctionPass Manager 1271; GCN-O3-NEXT: Dominator Tree Construction 1272 1273define void @empty() { 1274 ret void 1275} 1276