1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s 5; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s 7; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \ 8; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \ 9; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s 10; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 11; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s 12; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 13; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s 14 15; REQUIRES: asserts 16 17; GCN-O0:Target Library Information 18; GCN-O0-NEXT:Target Pass Configuration 19; GCN-O0-NEXT:Machine Module Information 20; GCN-O0-NEXT:Target Transform Information 21; GCN-O0-NEXT:Assumption Cache Tracker 22; GCN-O0-NEXT:Profile summary info 23; GCN-O0-NEXT:Argument Register Usage Information Storage 24; GCN-O0-NEXT:Create Garbage Collector Module Metadata 25; GCN-O0-NEXT:Register Usage Information Storage 26; GCN-O0-NEXT:Machine Branch Probability Analysis 27; GCN-O0-NEXT: ModulePass Manager 28; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering 29; GCN-O0-NEXT: AMDGPU Printf lowering 30; GCN-O0-NEXT: FunctionPass Manager 31; GCN-O0-NEXT: Dominator Tree Construction 32; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU 33; GCN-O0-NEXT: FunctionPass Manager 34; GCN-O0-NEXT: Early propagate attributes from kernels to functions 35; GCN-O0-NEXT: AMDGPU Lower Intrinsics 36; GCN-O0-NEXT: AMDGPU Inline All Functions 37; GCN-O0-NEXT: CallGraph Construction 38; GCN-O0-NEXT: Call Graph SCC Pass Manager 39; GCN-O0-NEXT: Inliner for always_inline functions 40; GCN-O0-NEXT: A No-Op Barrier Pass 41; GCN-O0-NEXT: Lower OpenCL enqueued blocks 42; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions 43; GCN-O0-NEXT: FunctionPass Manager 44; GCN-O0-NEXT: Expand Atomic instructions 45; GCN-O0-NEXT: Lower constant intrinsics 46; GCN-O0-NEXT: Remove unreachable blocks from the CFG 47; GCN-O0-NEXT: Expand vector predication intrinsics 48; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics 49; GCN-O0-NEXT: Expand reduction intrinsics 50; GCN-O0-NEXT: AMDGPU Attributor 51; GCN-O0-NEXT: CallGraph Construction 52; GCN-O0-NEXT: Call Graph SCC Pass Manager 53; GCN-O0-NEXT: AMDGPU Annotate Kernel Features 54; GCN-O0-NEXT: FunctionPass Manager 55; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments 56; GCN-O0-NEXT: Lazy Value Information Analysis 57; GCN-O0-NEXT: Lower SwitchInst's to branches 58; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators 59; GCN-O0-NEXT: Remove unreachable blocks from the CFG 60; GCN-O0-NEXT: Post-Dominator Tree Construction 61; GCN-O0-NEXT: Dominator Tree Construction 62; GCN-O0-NEXT: Natural Loop Information 63; GCN-O0-NEXT: Legacy Divergence Analysis 64; GCN-O0-NEXT: Unify divergent function exit nodes 65; GCN-O0-NEXT: Lazy Value Information Analysis 66; GCN-O0-NEXT: Lower SwitchInst's to branches 67; GCN-O0-NEXT: Dominator Tree Construction 68; GCN-O0-NEXT: Natural Loop Information 69; GCN-O0-NEXT: Convert irreducible control-flow into natural loops 70; GCN-O0-NEXT: Fixup each natural loop to have a single exit block 71; GCN-O0-NEXT: Post-Dominator Tree Construction 72; GCN-O0-NEXT: Dominance Frontier Construction 73; GCN-O0-NEXT: Detect single entry single exit regions 74; GCN-O0-NEXT: Region Pass Manager 75; GCN-O0-NEXT: Structurize control flow 76; GCN-O0-NEXT: Post-Dominator Tree Construction 77; GCN-O0-NEXT: Natural Loop Information 78; GCN-O0-NEXT: Legacy Divergence Analysis 79; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 80; GCN-O0-NEXT: Function Alias Analysis Results 81; GCN-O0-NEXT: Memory SSA 82; GCN-O0-NEXT: AMDGPU Annotate Uniform Values 83; GCN-O0-NEXT: SI annotate control flow 84; GCN-O0-NEXT: LCSSA Verifier 85; GCN-O0-NEXT: Loop-Closed SSA Form Pass 86; GCN-O0-NEXT: DummyCGSCCPass 87; GCN-O0-NEXT: FunctionPass Manager 88; GCN-O0-NEXT: Safe Stack instrumentation pass 89; GCN-O0-NEXT: Insert stack protectors 90; GCN-O0-NEXT: Dominator Tree Construction 91; GCN-O0-NEXT: Post-Dominator Tree Construction 92; GCN-O0-NEXT: Natural Loop Information 93; GCN-O0-NEXT: Legacy Divergence Analysis 94; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 95; GCN-O0-NEXT: MachineDominator Tree Construction 96; GCN-O0-NEXT: SI Fix SGPR copies 97; GCN-O0-NEXT: MachinePostDominator Tree Construction 98; GCN-O0-NEXT: SI Lower i1 Copies 99; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions 100; GCN-O0-NEXT: Local Stack Slot Allocation 101; GCN-O0-NEXT: Register Usage Information Propagation 102; GCN-O0-NEXT: Eliminate PHI nodes for register allocation 103; GCN-O0-NEXT: SI Lower control flow pseudo instructions 104; GCN-O0-NEXT: Two-Address instruction pass 105; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 106; GCN-O0-NEXT: Function Alias Analysis Results 107; GCN-O0-NEXT: MachineDominator Tree Construction 108; GCN-O0-NEXT: Slot index numbering 109; GCN-O0-NEXT: Live Interval Analysis 110; GCN-O0-NEXT: MachinePostDominator Tree Construction 111; GCN-O0-NEXT: SI Whole Quad Mode 112; GCN-O0-NEXT: Virtual Register Map 113; GCN-O0-NEXT: Live Register Matrix 114; GCN-O0-NEXT: SI Pre-allocate WWM Registers 115; GCN-O0-NEXT: Fast Register Allocator 116; GCN-O0-NEXT: SI lower SGPR spill instructions 117; GCN-O0-NEXT: Fast Register Allocator 118; GCN-O0-NEXT: SI Fix VGPR copies 119; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis 120; GCN-O0-NEXT: Fixup Statepoint Caller Saved 121; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 122; GCN-O0-NEXT: Machine Optimization Remark Emitter 123; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization 124; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass 125; GCN-O0-NEXT: SI post-RA bundler 126; GCN-O0-NEXT: Insert fentry calls 127; GCN-O0-NEXT: Insert XRay ops 128; GCN-O0-NEXT: SI Memory Legalizer 129; GCN-O0-NEXT: MachineDominator Tree Construction 130; GCN-O0-NEXT: Machine Natural Loop Construction 131; GCN-O0-NEXT: MachinePostDominator Tree Construction 132; GCN-O0-NEXT: SI insert wait instructions 133; GCN-O0-NEXT: Insert required mode register values 134; GCN-O0-NEXT: SI Final Branch Preparation 135; GCN-O0-NEXT: Post RA hazard recognizer 136; GCN-O0-NEXT: Branch relaxation pass 137; GCN-O0-NEXT: Register Usage Information Collector Pass 138; GCN-O0-NEXT: Live DEBUG_VALUE analysis 139; GCN-O0-NEXT: Function register usage analysis 140; GCN-O0-NEXT: FunctionPass Manager 141; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 142; GCN-O0-NEXT: Machine Optimization Remark Emitter 143; GCN-O0-NEXT: AMDGPU Assembly Printer 144; GCN-O0-NEXT: Free MachineFunction 145; GCN-O0-NEXT:Pass Arguments: -domtree 146; GCN-O0-NEXT: FunctionPass Manager 147; GCN-O0-NEXT: Dominator Tree Construction 148 149; GCN-O1:Target Library Information 150; GCN-O1-NEXT:Target Pass Configuration 151; GCN-O1-NEXT:Machine Module Information 152; GCN-O1-NEXT:Target Transform Information 153; GCN-O1-NEXT:Assumption Cache Tracker 154; GCN-O1-NEXT:Profile summary info 155; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis 156; GCN-O1-NEXT:External Alias Analysis 157; GCN-O1-NEXT:Type-Based Alias Analysis 158; GCN-O1-NEXT:Scoped NoAlias Alias Analysis 159; GCN-O1-NEXT:Argument Register Usage Information Storage 160; GCN-O1-NEXT:Create Garbage Collector Module Metadata 161; GCN-O1-NEXT:Machine Branch Probability Analysis 162; GCN-O1-NEXT:Register Usage Information Storage 163; GCN-O1-NEXT:Default Regalloc Eviction Advisor 164; GCN-O1-NEXT: ModulePass Manager 165; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering 166; GCN-O1-NEXT: AMDGPU Printf lowering 167; GCN-O1-NEXT: FunctionPass Manager 168; GCN-O1-NEXT: Dominator Tree Construction 169; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU 170; GCN-O1-NEXT: FunctionPass Manager 171; GCN-O1-NEXT: Early propagate attributes from kernels to functions 172; GCN-O1-NEXT: AMDGPU Lower Intrinsics 173; GCN-O1-NEXT: AMDGPU Inline All Functions 174; GCN-O1-NEXT: CallGraph Construction 175; GCN-O1-NEXT: Call Graph SCC Pass Manager 176; GCN-O1-NEXT: Inliner for always_inline functions 177; GCN-O1-NEXT: A No-Op Barrier Pass 178; GCN-O1-NEXT: Lower OpenCL enqueued blocks 179; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions 180; GCN-O1-NEXT: FunctionPass Manager 181; GCN-O1-NEXT: Infer address spaces 182; GCN-O1-NEXT: Expand Atomic instructions 183; GCN-O1-NEXT: AMDGPU Promote Alloca 184; GCN-O1-NEXT: Dominator Tree Construction 185; GCN-O1-NEXT: SROA 186; GCN-O1-NEXT: Post-Dominator Tree Construction 187; GCN-O1-NEXT: Natural Loop Information 188; GCN-O1-NEXT: Legacy Divergence Analysis 189; GCN-O1-NEXT: AMDGPU IR optimizations 190; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 191; GCN-O1-NEXT: Canonicalize natural loops 192; GCN-O1-NEXT: Scalar Evolution Analysis 193; GCN-O1-NEXT: Loop Pass Manager 194; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops 195; GCN-O1-NEXT: Induction Variable Users 196; GCN-O1-NEXT: Loop Strength Reduction 197; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 198; GCN-O1-NEXT: Function Alias Analysis Results 199; GCN-O1-NEXT: Merge contiguous icmps into a memcmp 200; GCN-O1-NEXT: Natural Loop Information 201; GCN-O1-NEXT: Lazy Branch Probability Analysis 202; GCN-O1-NEXT: Lazy Block Frequency Analysis 203; GCN-O1-NEXT: Expand memcmp() to load/stores 204; GCN-O1-NEXT: Lower constant intrinsics 205; GCN-O1-NEXT: Remove unreachable blocks from the CFG 206; GCN-O1-NEXT: Natural Loop Information 207; GCN-O1-NEXT: Post-Dominator Tree Construction 208; GCN-O1-NEXT: Branch Probability Analysis 209; GCN-O1-NEXT: Block Frequency Analysis 210; GCN-O1-NEXT: Constant Hoisting 211; GCN-O1-NEXT: Replace intrinsics with calls to vector library 212; GCN-O1-NEXT: Partially inline calls to library functions 213; GCN-O1-NEXT: Expand vector predication intrinsics 214; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics 215; GCN-O1-NEXT: Expand reduction intrinsics 216; GCN-O1-NEXT: Natural Loop Information 217; GCN-O1-NEXT: TLS Variable Hoist 218; GCN-O1-NEXT: AMDGPU Attributor 219; GCN-O1-NEXT: CallGraph Construction 220; GCN-O1-NEXT: Call Graph SCC Pass Manager 221; GCN-O1-NEXT: AMDGPU Annotate Kernel Features 222; GCN-O1-NEXT: FunctionPass Manager 223; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments 224; GCN-O1-NEXT: Dominator Tree Construction 225; GCN-O1-NEXT: Natural Loop Information 226; GCN-O1-NEXT: CodeGen Prepare 227; GCN-O1-NEXT: Lazy Value Information Analysis 228; GCN-O1-NEXT: Lower SwitchInst's to branches 229; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators 230; GCN-O1-NEXT: Remove unreachable blocks from the CFG 231; GCN-O1-NEXT: Dominator Tree Construction 232; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 233; GCN-O1-NEXT: Function Alias Analysis Results 234; GCN-O1-NEXT: Flatten the CFG 235; GCN-O1-NEXT: Dominator Tree Construction 236; GCN-O1-NEXT: Post-Dominator Tree Construction 237; GCN-O1-NEXT: Natural Loop Information 238; GCN-O1-NEXT: Legacy Divergence Analysis 239; GCN-O1-NEXT: AMDGPU IR late optimizations 240; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 241; GCN-O1-NEXT: Function Alias Analysis Results 242; GCN-O1-NEXT: Code sinking 243; GCN-O1-NEXT: Legacy Divergence Analysis 244; GCN-O1-NEXT: Unify divergent function exit nodes 245; GCN-O1-NEXT: Lazy Value Information Analysis 246; GCN-O1-NEXT: Lower SwitchInst's to branches 247; GCN-O1-NEXT: Dominator Tree Construction 248; GCN-O1-NEXT: Natural Loop Information 249; GCN-O1-NEXT: Convert irreducible control-flow into natural loops 250; GCN-O1-NEXT: Fixup each natural loop to have a single exit block 251; GCN-O1-NEXT: Post-Dominator Tree Construction 252; GCN-O1-NEXT: Dominance Frontier Construction 253; GCN-O1-NEXT: Detect single entry single exit regions 254; GCN-O1-NEXT: Region Pass Manager 255; GCN-O1-NEXT: Structurize control flow 256; GCN-O1-NEXT: Post-Dominator Tree Construction 257; GCN-O1-NEXT: Natural Loop Information 258; GCN-O1-NEXT: Legacy Divergence Analysis 259; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 260; GCN-O1-NEXT: Function Alias Analysis Results 261; GCN-O1-NEXT: Memory SSA 262; GCN-O1-NEXT: AMDGPU Annotate Uniform Values 263; GCN-O1-NEXT: SI annotate control flow 264; GCN-O1-NEXT: LCSSA Verifier 265; GCN-O1-NEXT: Loop-Closed SSA Form Pass 266; GCN-O1-NEXT: DummyCGSCCPass 267; GCN-O1-NEXT: FunctionPass Manager 268; GCN-O1-NEXT: Safe Stack instrumentation pass 269; GCN-O1-NEXT: Insert stack protectors 270; GCN-O1-NEXT: Dominator Tree Construction 271; GCN-O1-NEXT: Post-Dominator Tree Construction 272; GCN-O1-NEXT: Natural Loop Information 273; GCN-O1-NEXT: Legacy Divergence Analysis 274; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 275; GCN-O1-NEXT: Function Alias Analysis Results 276; GCN-O1-NEXT: Branch Probability Analysis 277; GCN-O1-NEXT: Lazy Branch Probability Analysis 278; GCN-O1-NEXT: Lazy Block Frequency Analysis 279; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 280; GCN-O1-NEXT: MachineDominator Tree Construction 281; GCN-O1-NEXT: SI Fix SGPR copies 282; GCN-O1-NEXT: MachinePostDominator Tree Construction 283; GCN-O1-NEXT: SI Lower i1 Copies 284; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions 285; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 286; GCN-O1-NEXT: Early Tail Duplication 287; GCN-O1-NEXT: Optimize machine instruction PHIs 288; GCN-O1-NEXT: Slot index numbering 289; GCN-O1-NEXT: Merge disjoint stack slots 290; GCN-O1-NEXT: Local Stack Slot Allocation 291; GCN-O1-NEXT: Remove dead machine instructions 292; GCN-O1-NEXT: MachineDominator Tree Construction 293; GCN-O1-NEXT: Machine Natural Loop Construction 294; GCN-O1-NEXT: Machine Block Frequency Analysis 295; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion 296; GCN-O1-NEXT: MachineDominator Tree Construction 297; GCN-O1-NEXT: Machine Block Frequency Analysis 298; GCN-O1-NEXT: Machine Common Subexpression Elimination 299; GCN-O1-NEXT: MachinePostDominator Tree Construction 300; GCN-O1-NEXT: Machine Cycle Info Analysis 301; GCN-O1-NEXT: Machine code sinking 302; GCN-O1-NEXT: Peephole Optimizations 303; GCN-O1-NEXT: Remove dead machine instructions 304; GCN-O1-NEXT: SI Fold Operands 305; GCN-O1-NEXT: GCN DPP Combine 306; GCN-O1-NEXT: SI Load Store Optimizer 307; GCN-O1-NEXT: Remove dead machine instructions 308; GCN-O1-NEXT: SI Shrink Instructions 309; GCN-O1-NEXT: Register Usage Information Propagation 310; GCN-O1-NEXT: Detect Dead Lanes 311; GCN-O1-NEXT: Remove dead machine instructions 312; GCN-O1-NEXT: Process Implicit Definitions 313; GCN-O1-NEXT: Remove unreachable machine basic blocks 314; GCN-O1-NEXT: Live Variable Analysis 315; GCN-O1-NEXT: MachineDominator Tree Construction 316; GCN-O1-NEXT: SI Optimize VGPR LiveRange 317; GCN-O1-NEXT: Eliminate PHI nodes for register allocation 318; GCN-O1-NEXT: SI Lower control flow pseudo instructions 319; GCN-O1-NEXT: Two-Address instruction pass 320; GCN-O1-NEXT: Slot index numbering 321; GCN-O1-NEXT: Live Interval Analysis 322; GCN-O1-NEXT: Machine Natural Loop Construction 323; GCN-O1-NEXT: Simple Register Coalescing 324; GCN-O1-NEXT: Rename Disconnected Subregister Components 325; GCN-O1-NEXT: Machine Instruction Scheduler 326; GCN-O1-NEXT: MachinePostDominator Tree Construction 327; GCN-O1-NEXT: SI Whole Quad Mode 328; GCN-O1-NEXT: Virtual Register Map 329; GCN-O1-NEXT: Live Register Matrix 330; GCN-O1-NEXT: SI Pre-allocate WWM Registers 331; GCN-O1-NEXT: SI optimize exec mask operations pre-RA 332; GCN-O1-NEXT: Machine Natural Loop Construction 333; GCN-O1-NEXT: Machine Block Frequency Analysis 334; GCN-O1-NEXT: Debug Variable Analysis 335; GCN-O1-NEXT: Live Stack Slot Analysis 336; GCN-O1-NEXT: Virtual Register Map 337; GCN-O1-NEXT: Live Register Matrix 338; GCN-O1-NEXT: Bundle Machine CFG Edges 339; GCN-O1-NEXT: Spill Code Placement Analysis 340; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 341; GCN-O1-NEXT: Machine Optimization Remark Emitter 342; GCN-O1-NEXT: Greedy Register Allocator 343; GCN-O1-NEXT: Virtual Register Rewriter 344; GCN-O1-NEXT: SI lower SGPR spill instructions 345; GCN-O1-NEXT: Virtual Register Map 346; GCN-O1-NEXT: Live Register Matrix 347; GCN-O1-NEXT: Greedy Register Allocator 348; GCN-O1-NEXT: GCN NSA Reassign 349; GCN-O1-NEXT: Virtual Register Rewriter 350; GCN-O1-NEXT: Stack Slot Coloring 351; GCN-O1-NEXT: Machine Copy Propagation Pass 352; GCN-O1-NEXT: Machine Loop Invariant Code Motion 353; GCN-O1-NEXT: SI Fix VGPR copies 354; GCN-O1-NEXT: SI optimize exec mask operations 355; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis 356; GCN-O1-NEXT: Fixup Statepoint Caller Saved 357; GCN-O1-NEXT: PostRA Machine Sink 358; GCN-O1-NEXT: MachineDominator Tree Construction 359; GCN-O1-NEXT: Machine Natural Loop Construction 360; GCN-O1-NEXT: Machine Block Frequency Analysis 361; GCN-O1-NEXT: MachinePostDominator Tree Construction 362; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 363; GCN-O1-NEXT: Machine Optimization Remark Emitter 364; GCN-O1-NEXT: Shrink Wrapping analysis 365; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization 366; GCN-O1-NEXT: Control Flow Optimizer 367; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 368; GCN-O1-NEXT: Tail Duplication 369; GCN-O1-NEXT: Machine Copy Propagation Pass 370; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass 371; GCN-O1-NEXT: SI Shrink Instructions 372; GCN-O1-NEXT: SI post-RA bundler 373; GCN-O1-NEXT: MachineDominator Tree Construction 374; GCN-O1-NEXT: Machine Natural Loop Construction 375; GCN-O1-NEXT: PostRA Machine Instruction Scheduler 376; GCN-O1-NEXT: Machine Block Frequency Analysis 377; GCN-O1-NEXT: MachinePostDominator Tree Construction 378; GCN-O1-NEXT: Branch Probability Basic Block Placement 379; GCN-O1-NEXT: Insert fentry calls 380; GCN-O1-NEXT: Insert XRay ops 381; GCN-O1-NEXT: GCN Create VOPD Instructions 382; GCN-O1-NEXT: SI Memory Legalizer 383; GCN-O1-NEXT: MachineDominator Tree Construction 384; GCN-O1-NEXT: Machine Natural Loop Construction 385; GCN-O1-NEXT: MachinePostDominator Tree Construction 386; GCN-O1-NEXT: SI insert wait instructions 387; GCN-O1-NEXT: Insert required mode register values 388; GCN-O1-NEXT: SI Insert Hard Clauses 389; GCN-O1-NEXT: SI Final Branch Preparation 390; GCN-O1-NEXT: SI peephole optimizations 391; GCN-O1-NEXT: Post RA hazard recognizer 392; GCN-O1-NEXT: AMDGPU Insert Delay ALU 393; GCN-O1-NEXT: Branch relaxation pass 394; GCN-O1-NEXT: Register Usage Information Collector Pass 395; GCN-O1-NEXT: Live DEBUG_VALUE analysis 396; GCN-O1-NEXT: Function register usage analysis 397; GCN-O1-NEXT: FunctionPass Manager 398; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 399; GCN-O1-NEXT: Machine Optimization Remark Emitter 400; GCN-O1-NEXT: AMDGPU Assembly Printer 401; GCN-O1-NEXT: Free MachineFunction 402; GCN-O1-NEXT:Pass Arguments: -domtree 403; GCN-O1-NEXT: FunctionPass Manager 404; GCN-O1-NEXT: Dominator Tree Construction 405 406; GCN-O1-OPTS:Target Library Information 407; GCN-O1-OPTS-NEXT:Target Pass Configuration 408; GCN-O1-OPTS-NEXT:Machine Module Information 409; GCN-O1-OPTS-NEXT:Target Transform Information 410; GCN-O1-OPTS-NEXT:Assumption Cache Tracker 411; GCN-O1-OPTS-NEXT:Profile summary info 412; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis 413; GCN-O1-OPTS-NEXT:External Alias Analysis 414; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis 415; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis 416; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage 417; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata 418; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis 419; GCN-O1-OPTS-NEXT:Register Usage Information Storage 420; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor 421; GCN-O1-OPTS-NEXT: ModulePass Manager 422; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering 423; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering 424; GCN-O1-OPTS-NEXT: FunctionPass Manager 425; GCN-O1-OPTS-NEXT: Dominator Tree Construction 426; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU 427; GCN-O1-OPTS-NEXT: FunctionPass Manager 428; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions 429; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics 430; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions 431; GCN-O1-OPTS-NEXT: CallGraph Construction 432; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 433; GCN-O1-OPTS-NEXT: Inliner for always_inline functions 434; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass 435; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks 436; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions 437; GCN-O1-OPTS-NEXT: FunctionPass Manager 438; GCN-O1-OPTS-NEXT: Infer address spaces 439; GCN-O1-OPTS-NEXT: Expand Atomic instructions 440; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca 441; GCN-O1-OPTS-NEXT: Dominator Tree Construction 442; GCN-O1-OPTS-NEXT: SROA 443; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 444; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 445; GCN-O1-OPTS-NEXT: Memory SSA 446; GCN-O1-OPTS-NEXT: Natural Loop Information 447; GCN-O1-OPTS-NEXT: Canonicalize natural loops 448; GCN-O1-OPTS-NEXT: LCSSA Verifier 449; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 450; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 451; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 452; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 453; GCN-O1-OPTS-NEXT: Loop Pass Manager 454; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion 455; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 456; GCN-O1-OPTS-NEXT: Speculatively execute instructions 457; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 458; GCN-O1-OPTS-NEXT: Straight line strength reduction 459; GCN-O1-OPTS-NEXT: Early CSE 460; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 461; GCN-O1-OPTS-NEXT: Nary reassociation 462; GCN-O1-OPTS-NEXT: Early CSE 463; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 464; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 465; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations 466; GCN-O1-OPTS-NEXT: Canonicalize natural loops 467; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 468; GCN-O1-OPTS-NEXT: Loop Pass Manager 469; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops 470; GCN-O1-OPTS-NEXT: Induction Variable Users 471; GCN-O1-OPTS-NEXT: Loop Strength Reduction 472; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 473; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 474; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp 475; GCN-O1-OPTS-NEXT: Natural Loop Information 476; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 477; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 478; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores 479; GCN-O1-OPTS-NEXT: Lower constant intrinsics 480; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 481; GCN-O1-OPTS-NEXT: Natural Loop Information 482; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 483; GCN-O1-OPTS-NEXT: Branch Probability Analysis 484; GCN-O1-OPTS-NEXT: Block Frequency Analysis 485; GCN-O1-OPTS-NEXT: Constant Hoisting 486; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library 487; GCN-O1-OPTS-NEXT: Partially inline calls to library functions 488; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics 489; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics 490; GCN-O1-OPTS-NEXT: Expand reduction intrinsics 491; GCN-O1-OPTS-NEXT: Natural Loop Information 492; GCN-O1-OPTS-NEXT: TLS Variable Hoist 493; GCN-O1-OPTS-NEXT: Early CSE 494; GCN-O1-OPTS-NEXT: AMDGPU Attributor 495; GCN-O1-OPTS-NEXT: CallGraph Construction 496; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 497; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features 498; GCN-O1-OPTS-NEXT: FunctionPass Manager 499; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments 500; GCN-O1-OPTS-NEXT: Dominator Tree Construction 501; GCN-O1-OPTS-NEXT: Natural Loop Information 502; GCN-O1-OPTS-NEXT: CodeGen Prepare 503; GCN-O1-OPTS-NEXT: Dominator Tree Construction 504; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 505; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 506; GCN-O1-OPTS-NEXT: Natural Loop Information 507; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 508; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer 509; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 510; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 511; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators 512; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 513; GCN-O1-OPTS-NEXT: Dominator Tree Construction 514; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 515; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 516; GCN-O1-OPTS-NEXT: Flatten the CFG 517; GCN-O1-OPTS-NEXT: Dominator Tree Construction 518; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 519; GCN-O1-OPTS-NEXT: Natural Loop Information 520; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 521; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations 522; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 523; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 524; GCN-O1-OPTS-NEXT: Code sinking 525; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 526; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes 527; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 528; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 529; GCN-O1-OPTS-NEXT: Dominator Tree Construction 530; GCN-O1-OPTS-NEXT: Natural Loop Information 531; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops 532; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block 533; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 534; GCN-O1-OPTS-NEXT: Dominance Frontier Construction 535; GCN-O1-OPTS-NEXT: Detect single entry single exit regions 536; GCN-O1-OPTS-NEXT: Region Pass Manager 537; GCN-O1-OPTS-NEXT: Structurize control flow 538; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 539; GCN-O1-OPTS-NEXT: Natural Loop Information 540; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 541; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 542; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 543; GCN-O1-OPTS-NEXT: Memory SSA 544; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values 545; GCN-O1-OPTS-NEXT: SI annotate control flow 546; GCN-O1-OPTS-NEXT: LCSSA Verifier 547; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 548; GCN-O1-OPTS-NEXT: DummyCGSCCPass 549; GCN-O1-OPTS-NEXT: FunctionPass Manager 550; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass 551; GCN-O1-OPTS-NEXT: Insert stack protectors 552; GCN-O1-OPTS-NEXT: Dominator Tree Construction 553; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 554; GCN-O1-OPTS-NEXT: Natural Loop Information 555; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 556; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 557; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 558; GCN-O1-OPTS-NEXT: Branch Probability Analysis 559; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 560; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 561; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 562; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 563; GCN-O1-OPTS-NEXT: SI Fix SGPR copies 564; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 565; GCN-O1-OPTS-NEXT: SI Lower i1 Copies 566; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions 567; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 568; GCN-O1-OPTS-NEXT: Early Tail Duplication 569; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs 570; GCN-O1-OPTS-NEXT: Slot index numbering 571; GCN-O1-OPTS-NEXT: Merge disjoint stack slots 572; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation 573; GCN-O1-OPTS-NEXT: Remove dead machine instructions 574; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 575; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 576; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 577; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 578; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 579; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 580; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 581; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 582; GCN-O1-OPTS-NEXT: Machine Cycle Info Analysis 583; GCN-O1-OPTS-NEXT: Machine code sinking 584; GCN-O1-OPTS-NEXT: Peephole Optimizations 585; GCN-O1-OPTS-NEXT: Remove dead machine instructions 586; GCN-O1-OPTS-NEXT: SI Fold Operands 587; GCN-O1-OPTS-NEXT: GCN DPP Combine 588; GCN-O1-OPTS-NEXT: SI Load Store Optimizer 589; GCN-O1-OPTS-NEXT: SI Peephole SDWA 590; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 591; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 592; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 593; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 594; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 595; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 596; GCN-O1-OPTS-NEXT: SI Fold Operands 597; GCN-O1-OPTS-NEXT: Remove dead machine instructions 598; GCN-O1-OPTS-NEXT: SI Shrink Instructions 599; GCN-O1-OPTS-NEXT: Register Usage Information Propagation 600; GCN-O1-OPTS-NEXT: Detect Dead Lanes 601; GCN-O1-OPTS-NEXT: Remove dead machine instructions 602; GCN-O1-OPTS-NEXT: Process Implicit Definitions 603; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks 604; GCN-O1-OPTS-NEXT: Live Variable Analysis 605; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange 606; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation 607; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions 608; GCN-O1-OPTS-NEXT: Two-Address instruction pass 609; GCN-O1-OPTS-NEXT: Slot index numbering 610; GCN-O1-OPTS-NEXT: Live Interval Analysis 611; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 612; GCN-O1-OPTS-NEXT: Simple Register Coalescing 613; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components 614; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations 615; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler 616; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 617; GCN-O1-OPTS-NEXT: SI Whole Quad Mode 618; GCN-O1-OPTS-NEXT: Virtual Register Map 619; GCN-O1-OPTS-NEXT: Live Register Matrix 620; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers 621; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA 622; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 623; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 624; GCN-O1-OPTS-NEXT: Debug Variable Analysis 625; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis 626; GCN-O1-OPTS-NEXT: Virtual Register Map 627; GCN-O1-OPTS-NEXT: Live Register Matrix 628; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges 629; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis 630; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 631; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 632; GCN-O1-OPTS-NEXT: Greedy Register Allocator 633; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 634; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions 635; GCN-O1-OPTS-NEXT: Virtual Register Map 636; GCN-O1-OPTS-NEXT: Live Register Matrix 637; GCN-O1-OPTS-NEXT: Greedy Register Allocator 638; GCN-O1-OPTS-NEXT: GCN NSA Reassign 639; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 640; GCN-O1-OPTS-NEXT: Stack Slot Coloring 641; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 642; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion 643; GCN-O1-OPTS-NEXT: SI Fix VGPR copies 644; GCN-O1-OPTS-NEXT: SI optimize exec mask operations 645; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis 646; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved 647; GCN-O1-OPTS-NEXT: PostRA Machine Sink 648; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 649; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 650; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 651; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 652; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 653; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 654; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis 655; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization 656; GCN-O1-OPTS-NEXT: Control Flow Optimizer 657; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 658; GCN-O1-OPTS-NEXT: Tail Duplication 659; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 660; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass 661; GCN-O1-OPTS-NEXT: SI Shrink Instructions 662; GCN-O1-OPTS-NEXT: SI post-RA bundler 663; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 664; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 665; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler 666; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 667; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 668; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement 669; GCN-O1-OPTS-NEXT: Insert fentry calls 670; GCN-O1-OPTS-NEXT: Insert XRay ops 671; GCN-O1-OPTS-NEXT: GCN Create VOPD Instructions 672; GCN-O1-OPTS-NEXT: SI Memory Legalizer 673; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 674; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 675; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 676; GCN-O1-OPTS-NEXT: SI insert wait instructions 677; GCN-O1-OPTS-NEXT: Insert required mode register values 678; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses 679; GCN-O1-OPTS-NEXT: SI Final Branch Preparation 680; GCN-O1-OPTS-NEXT: SI peephole optimizations 681; GCN-O1-OPTS-NEXT: Post RA hazard recognizer 682; GCN-O1-OPTS-NEXT: AMDGPU Insert Delay ALU 683; GCN-O1-OPTS-NEXT: Branch relaxation pass 684; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass 685; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis 686; GCN-O1-OPTS-NEXT: Function register usage analysis 687; GCN-O1-OPTS-NEXT: FunctionPass Manager 688; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 689; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 690; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer 691; GCN-O1-OPTS-NEXT: Free MachineFunction 692; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree 693; GCN-O1-OPTS-NEXT: FunctionPass Manager 694; GCN-O1-OPTS-NEXT: Dominator Tree Construction 695 696; GCN-O2:Target Library Information 697; GCN-O2-NEXT:Target Pass Configuration 698; GCN-O2-NEXT:Machine Module Information 699; GCN-O2-NEXT:Target Transform Information 700; GCN-O2-NEXT:Assumption Cache Tracker 701; GCN-O2-NEXT:Profile summary info 702; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis 703; GCN-O2-NEXT:External Alias Analysis 704; GCN-O2-NEXT:Type-Based Alias Analysis 705; GCN-O2-NEXT:Scoped NoAlias Alias Analysis 706; GCN-O2-NEXT:Argument Register Usage Information Storage 707; GCN-O2-NEXT:Create Garbage Collector Module Metadata 708; GCN-O2-NEXT:Machine Branch Probability Analysis 709; GCN-O2-NEXT:Register Usage Information Storage 710; GCN-O2-NEXT:Default Regalloc Eviction Advisor 711; GCN-O2-NEXT: ModulePass Manager 712; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering 713; GCN-O2-NEXT: AMDGPU Printf lowering 714; GCN-O2-NEXT: FunctionPass Manager 715; GCN-O2-NEXT: Dominator Tree Construction 716; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU 717; GCN-O2-NEXT: FunctionPass Manager 718; GCN-O2-NEXT: Early propagate attributes from kernels to functions 719; GCN-O2-NEXT: AMDGPU Lower Intrinsics 720; GCN-O2-NEXT: AMDGPU Inline All Functions 721; GCN-O2-NEXT: CallGraph Construction 722; GCN-O2-NEXT: Call Graph SCC Pass Manager 723; GCN-O2-NEXT: Inliner for always_inline functions 724; GCN-O2-NEXT: A No-Op Barrier Pass 725; GCN-O2-NEXT: Lower OpenCL enqueued blocks 726; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions 727; GCN-O2-NEXT: FunctionPass Manager 728; GCN-O2-NEXT: Infer address spaces 729; GCN-O2-NEXT: Expand Atomic instructions 730; GCN-O2-NEXT: AMDGPU Promote Alloca 731; GCN-O2-NEXT: Dominator Tree Construction 732; GCN-O2-NEXT: SROA 733; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 734; GCN-O2-NEXT: Function Alias Analysis Results 735; GCN-O2-NEXT: Memory SSA 736; GCN-O2-NEXT: Natural Loop Information 737; GCN-O2-NEXT: Canonicalize natural loops 738; GCN-O2-NEXT: LCSSA Verifier 739; GCN-O2-NEXT: Loop-Closed SSA Form Pass 740; GCN-O2-NEXT: Scalar Evolution Analysis 741; GCN-O2-NEXT: Lazy Branch Probability Analysis 742; GCN-O2-NEXT: Lazy Block Frequency Analysis 743; GCN-O2-NEXT: Loop Pass Manager 744; GCN-O2-NEXT: Loop Invariant Code Motion 745; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 746; GCN-O2-NEXT: Speculatively execute instructions 747; GCN-O2-NEXT: Scalar Evolution Analysis 748; GCN-O2-NEXT: Straight line strength reduction 749; GCN-O2-NEXT: Early CSE 750; GCN-O2-NEXT: Scalar Evolution Analysis 751; GCN-O2-NEXT: Nary reassociation 752; GCN-O2-NEXT: Early CSE 753; GCN-O2-NEXT: Post-Dominator Tree Construction 754; GCN-O2-NEXT: Legacy Divergence Analysis 755; GCN-O2-NEXT: AMDGPU IR optimizations 756; GCN-O2-NEXT: Canonicalize natural loops 757; GCN-O2-NEXT: Scalar Evolution Analysis 758; GCN-O2-NEXT: Loop Pass Manager 759; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops 760; GCN-O2-NEXT: Induction Variable Users 761; GCN-O2-NEXT: Loop Strength Reduction 762; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 763; GCN-O2-NEXT: Function Alias Analysis Results 764; GCN-O2-NEXT: Merge contiguous icmps into a memcmp 765; GCN-O2-NEXT: Natural Loop Information 766; GCN-O2-NEXT: Lazy Branch Probability Analysis 767; GCN-O2-NEXT: Lazy Block Frequency Analysis 768; GCN-O2-NEXT: Expand memcmp() to load/stores 769; GCN-O2-NEXT: Lower constant intrinsics 770; GCN-O2-NEXT: Remove unreachable blocks from the CFG 771; GCN-O2-NEXT: Natural Loop Information 772; GCN-O2-NEXT: Post-Dominator Tree Construction 773; GCN-O2-NEXT: Branch Probability Analysis 774; GCN-O2-NEXT: Block Frequency Analysis 775; GCN-O2-NEXT: Constant Hoisting 776; GCN-O2-NEXT: Replace intrinsics with calls to vector library 777; GCN-O2-NEXT: Partially inline calls to library functions 778; GCN-O2-NEXT: Expand vector predication intrinsics 779; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics 780; GCN-O2-NEXT: Expand reduction intrinsics 781; GCN-O2-NEXT: Natural Loop Information 782; GCN-O2-NEXT: TLS Variable Hoist 783; GCN-O2-NEXT: Early CSE 784; GCN-O2-NEXT: AMDGPU Attributor 785; GCN-O2-NEXT: CallGraph Construction 786; GCN-O2-NEXT: Call Graph SCC Pass Manager 787; GCN-O2-NEXT: AMDGPU Annotate Kernel Features 788; GCN-O2-NEXT: FunctionPass Manager 789; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments 790; GCN-O2-NEXT: Dominator Tree Construction 791; GCN-O2-NEXT: Natural Loop Information 792; GCN-O2-NEXT: CodeGen Prepare 793; GCN-O2-NEXT: Dominator Tree Construction 794; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 795; GCN-O2-NEXT: Function Alias Analysis Results 796; GCN-O2-NEXT: Natural Loop Information 797; GCN-O2-NEXT: Scalar Evolution Analysis 798; GCN-O2-NEXT: GPU Load and Store Vectorizer 799; GCN-O2-NEXT: Lazy Value Information Analysis 800; GCN-O2-NEXT: Lower SwitchInst's to branches 801; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators 802; GCN-O2-NEXT: Remove unreachable blocks from the CFG 803; GCN-O2-NEXT: Dominator Tree Construction 804; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 805; GCN-O2-NEXT: Function Alias Analysis Results 806; GCN-O2-NEXT: Flatten the CFG 807; GCN-O2-NEXT: Dominator Tree Construction 808; GCN-O2-NEXT: Post-Dominator Tree Construction 809; GCN-O2-NEXT: Natural Loop Information 810; GCN-O2-NEXT: Legacy Divergence Analysis 811; GCN-O2-NEXT: AMDGPU IR late optimizations 812; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 813; GCN-O2-NEXT: Function Alias Analysis Results 814; GCN-O2-NEXT: Code sinking 815; GCN-O2-NEXT: Legacy Divergence Analysis 816; GCN-O2-NEXT: Unify divergent function exit nodes 817; GCN-O2-NEXT: Lazy Value Information Analysis 818; GCN-O2-NEXT: Lower SwitchInst's to branches 819; GCN-O2-NEXT: Dominator Tree Construction 820; GCN-O2-NEXT: Natural Loop Information 821; GCN-O2-NEXT: Convert irreducible control-flow into natural loops 822; GCN-O2-NEXT: Fixup each natural loop to have a single exit block 823; GCN-O2-NEXT: Post-Dominator Tree Construction 824; GCN-O2-NEXT: Dominance Frontier Construction 825; GCN-O2-NEXT: Detect single entry single exit regions 826; GCN-O2-NEXT: Region Pass Manager 827; GCN-O2-NEXT: Structurize control flow 828; GCN-O2-NEXT: Post-Dominator Tree Construction 829; GCN-O2-NEXT: Natural Loop Information 830; GCN-O2-NEXT: Legacy Divergence Analysis 831; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 832; GCN-O2-NEXT: Function Alias Analysis Results 833; GCN-O2-NEXT: Memory SSA 834; GCN-O2-NEXT: AMDGPU Annotate Uniform Values 835; GCN-O2-NEXT: SI annotate control flow 836; GCN-O2-NEXT: LCSSA Verifier 837; GCN-O2-NEXT: Loop-Closed SSA Form Pass 838; GCN-O2-NEXT: Analysis if a function is memory bound 839; GCN-O2-NEXT: DummyCGSCCPass 840; GCN-O2-NEXT: FunctionPass Manager 841; GCN-O2-NEXT: Safe Stack instrumentation pass 842; GCN-O2-NEXT: Insert stack protectors 843; GCN-O2-NEXT: Dominator Tree Construction 844; GCN-O2-NEXT: Post-Dominator Tree Construction 845; GCN-O2-NEXT: Natural Loop Information 846; GCN-O2-NEXT: Legacy Divergence Analysis 847; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 848; GCN-O2-NEXT: Function Alias Analysis Results 849; GCN-O2-NEXT: Branch Probability Analysis 850; GCN-O2-NEXT: Lazy Branch Probability Analysis 851; GCN-O2-NEXT: Lazy Block Frequency Analysis 852; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 853; GCN-O2-NEXT: MachineDominator Tree Construction 854; GCN-O2-NEXT: SI Fix SGPR copies 855; GCN-O2-NEXT: MachinePostDominator Tree Construction 856; GCN-O2-NEXT: SI Lower i1 Copies 857; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions 858; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 859; GCN-O2-NEXT: Early Tail Duplication 860; GCN-O2-NEXT: Optimize machine instruction PHIs 861; GCN-O2-NEXT: Slot index numbering 862; GCN-O2-NEXT: Merge disjoint stack slots 863; GCN-O2-NEXT: Local Stack Slot Allocation 864; GCN-O2-NEXT: Remove dead machine instructions 865; GCN-O2-NEXT: MachineDominator Tree Construction 866; GCN-O2-NEXT: Machine Natural Loop Construction 867; GCN-O2-NEXT: Machine Block Frequency Analysis 868; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 869; GCN-O2-NEXT: MachineDominator Tree Construction 870; GCN-O2-NEXT: Machine Block Frequency Analysis 871; GCN-O2-NEXT: Machine Common Subexpression Elimination 872; GCN-O2-NEXT: MachinePostDominator Tree Construction 873; GCN-O2-NEXT: Machine Cycle Info Analysis 874; GCN-O2-NEXT: Machine code sinking 875; GCN-O2-NEXT: Peephole Optimizations 876; GCN-O2-NEXT: Remove dead machine instructions 877; GCN-O2-NEXT: SI Fold Operands 878; GCN-O2-NEXT: GCN DPP Combine 879; GCN-O2-NEXT: SI Load Store Optimizer 880; GCN-O2-NEXT: SI Peephole SDWA 881; GCN-O2-NEXT: Machine Block Frequency Analysis 882; GCN-O2-NEXT: MachineDominator Tree Construction 883; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 884; GCN-O2-NEXT: MachineDominator Tree Construction 885; GCN-O2-NEXT: Machine Block Frequency Analysis 886; GCN-O2-NEXT: Machine Common Subexpression Elimination 887; GCN-O2-NEXT: SI Fold Operands 888; GCN-O2-NEXT: Remove dead machine instructions 889; GCN-O2-NEXT: SI Shrink Instructions 890; GCN-O2-NEXT: Register Usage Information Propagation 891; GCN-O2-NEXT: Detect Dead Lanes 892; GCN-O2-NEXT: Remove dead machine instructions 893; GCN-O2-NEXT: Process Implicit Definitions 894; GCN-O2-NEXT: Remove unreachable machine basic blocks 895; GCN-O2-NEXT: Live Variable Analysis 896; GCN-O2-NEXT: SI Optimize VGPR LiveRange 897; GCN-O2-NEXT: Eliminate PHI nodes for register allocation 898; GCN-O2-NEXT: SI Lower control flow pseudo instructions 899; GCN-O2-NEXT: Two-Address instruction pass 900; GCN-O2-NEXT: Slot index numbering 901; GCN-O2-NEXT: Live Interval Analysis 902; GCN-O2-NEXT: Machine Natural Loop Construction 903; GCN-O2-NEXT: Simple Register Coalescing 904; GCN-O2-NEXT: Rename Disconnected Subregister Components 905; GCN-O2-NEXT: AMDGPU Pre-RA optimizations 906; GCN-O2-NEXT: Machine Instruction Scheduler 907; GCN-O2-NEXT: MachinePostDominator Tree Construction 908; GCN-O2-NEXT: SI Whole Quad Mode 909; GCN-O2-NEXT: Virtual Register Map 910; GCN-O2-NEXT: Live Register Matrix 911; GCN-O2-NEXT: SI Pre-allocate WWM Registers 912; GCN-O2-NEXT: SI optimize exec mask operations pre-RA 913; GCN-O2-NEXT: SI Form memory clauses 914; GCN-O2-NEXT: Machine Natural Loop Construction 915; GCN-O2-NEXT: Machine Block Frequency Analysis 916; GCN-O2-NEXT: Debug Variable Analysis 917; GCN-O2-NEXT: Live Stack Slot Analysis 918; GCN-O2-NEXT: Virtual Register Map 919; GCN-O2-NEXT: Live Register Matrix 920; GCN-O2-NEXT: Bundle Machine CFG Edges 921; GCN-O2-NEXT: Spill Code Placement Analysis 922; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 923; GCN-O2-NEXT: Machine Optimization Remark Emitter 924; GCN-O2-NEXT: Greedy Register Allocator 925; GCN-O2-NEXT: Virtual Register Rewriter 926; GCN-O2-NEXT: SI lower SGPR spill instructions 927; GCN-O2-NEXT: Virtual Register Map 928; GCN-O2-NEXT: Live Register Matrix 929; GCN-O2-NEXT: Greedy Register Allocator 930; GCN-O2-NEXT: GCN NSA Reassign 931; GCN-O2-NEXT: Virtual Register Rewriter 932; GCN-O2-NEXT: Stack Slot Coloring 933; GCN-O2-NEXT: Machine Copy Propagation Pass 934; GCN-O2-NEXT: Machine Loop Invariant Code Motion 935; GCN-O2-NEXT: SI Fix VGPR copies 936; GCN-O2-NEXT: SI optimize exec mask operations 937; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis 938; GCN-O2-NEXT: Fixup Statepoint Caller Saved 939; GCN-O2-NEXT: PostRA Machine Sink 940; GCN-O2-NEXT: MachineDominator Tree Construction 941; GCN-O2-NEXT: Machine Natural Loop Construction 942; GCN-O2-NEXT: Machine Block Frequency Analysis 943; GCN-O2-NEXT: MachinePostDominator Tree Construction 944; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 945; GCN-O2-NEXT: Machine Optimization Remark Emitter 946; GCN-O2-NEXT: Shrink Wrapping analysis 947; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization 948; GCN-O2-NEXT: Control Flow Optimizer 949; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 950; GCN-O2-NEXT: Tail Duplication 951; GCN-O2-NEXT: Machine Copy Propagation Pass 952; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass 953; GCN-O2-NEXT: SI Shrink Instructions 954; GCN-O2-NEXT: SI post-RA bundler 955; GCN-O2-NEXT: MachineDominator Tree Construction 956; GCN-O2-NEXT: Machine Natural Loop Construction 957; GCN-O2-NEXT: PostRA Machine Instruction Scheduler 958; GCN-O2-NEXT: Machine Block Frequency Analysis 959; GCN-O2-NEXT: MachinePostDominator Tree Construction 960; GCN-O2-NEXT: Branch Probability Basic Block Placement 961; GCN-O2-NEXT: Insert fentry calls 962; GCN-O2-NEXT: Insert XRay ops 963; GCN-O2-NEXT: GCN Create VOPD Instructions 964; GCN-O2-NEXT: SI Memory Legalizer 965; GCN-O2-NEXT: MachineDominator Tree Construction 966; GCN-O2-NEXT: Machine Natural Loop Construction 967; GCN-O2-NEXT: MachinePostDominator Tree Construction 968; GCN-O2-NEXT: SI insert wait instructions 969; GCN-O2-NEXT: Insert required mode register values 970; GCN-O2-NEXT: SI Insert Hard Clauses 971; GCN-O2-NEXT: SI Final Branch Preparation 972; GCN-O2-NEXT: SI peephole optimizations 973; GCN-O2-NEXT: Post RA hazard recognizer 974; GCN-O2-NEXT: Release VGPRs 975; GCN-O2-NEXT: AMDGPU Insert Delay ALU 976; GCN-O2-NEXT: Branch relaxation pass 977; GCN-O2-NEXT: Register Usage Information Collector Pass 978; GCN-O2-NEXT: Live DEBUG_VALUE analysis 979; GCN-O2-NEXT: Function register usage analysis 980; GCN-O2-NEXT: FunctionPass Manager 981; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 982; GCN-O2-NEXT: Machine Optimization Remark Emitter 983; GCN-O2-NEXT: AMDGPU Assembly Printer 984; GCN-O2-NEXT: Free MachineFunction 985; GCN-O2-NEXT:Pass Arguments: -domtree 986; GCN-O2-NEXT: FunctionPass Manager 987; GCN-O2-NEXT: Dominator Tree Construction 988 989; GCN-O3:Target Library Information 990; GCN-O3-NEXT:Target Pass Configuration 991; GCN-O3-NEXT:Machine Module Information 992; GCN-O3-NEXT:Target Transform Information 993; GCN-O3-NEXT:Assumption Cache Tracker 994; GCN-O3-NEXT:Profile summary info 995; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis 996; GCN-O3-NEXT:External Alias Analysis 997; GCN-O3-NEXT:Type-Based Alias Analysis 998; GCN-O3-NEXT:Scoped NoAlias Alias Analysis 999; GCN-O3-NEXT:Argument Register Usage Information Storage 1000; GCN-O3-NEXT:Create Garbage Collector Module Metadata 1001; GCN-O3-NEXT:Machine Branch Probability Analysis 1002; GCN-O3-NEXT:Register Usage Information Storage 1003; GCN-O3-NEXT:Default Regalloc Eviction Advisor 1004; GCN-O3-NEXT: ModulePass Manager 1005; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering 1006; GCN-O3-NEXT: AMDGPU Printf lowering 1007; GCN-O3-NEXT: FunctionPass Manager 1008; GCN-O3-NEXT: Dominator Tree Construction 1009; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU 1010; GCN-O3-NEXT: FunctionPass Manager 1011; GCN-O3-NEXT: Early propagate attributes from kernels to functions 1012; GCN-O3-NEXT: AMDGPU Lower Intrinsics 1013; GCN-O3-NEXT: AMDGPU Inline All Functions 1014; GCN-O3-NEXT: CallGraph Construction 1015; GCN-O3-NEXT: Call Graph SCC Pass Manager 1016; GCN-O3-NEXT: Inliner for always_inline functions 1017; GCN-O3-NEXT: A No-Op Barrier Pass 1018; GCN-O3-NEXT: Lower OpenCL enqueued blocks 1019; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions 1020; GCN-O3-NEXT: FunctionPass Manager 1021; GCN-O3-NEXT: Infer address spaces 1022; GCN-O3-NEXT: Expand Atomic instructions 1023; GCN-O3-NEXT: AMDGPU Promote Alloca 1024; GCN-O3-NEXT: Dominator Tree Construction 1025; GCN-O3-NEXT: SROA 1026; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1027; GCN-O3-NEXT: Function Alias Analysis Results 1028; GCN-O3-NEXT: Memory SSA 1029; GCN-O3-NEXT: Natural Loop Information 1030; GCN-O3-NEXT: Canonicalize natural loops 1031; GCN-O3-NEXT: LCSSA Verifier 1032; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1033; GCN-O3-NEXT: Scalar Evolution Analysis 1034; GCN-O3-NEXT: Lazy Branch Probability Analysis 1035; GCN-O3-NEXT: Lazy Block Frequency Analysis 1036; GCN-O3-NEXT: Loop Pass Manager 1037; GCN-O3-NEXT: Loop Invariant Code Motion 1038; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 1039; GCN-O3-NEXT: Speculatively execute instructions 1040; GCN-O3-NEXT: Scalar Evolution Analysis 1041; GCN-O3-NEXT: Straight line strength reduction 1042; GCN-O3-NEXT: Phi Values Analysis 1043; GCN-O3-NEXT: Function Alias Analysis Results 1044; GCN-O3-NEXT: Memory Dependence Analysis 1045; GCN-O3-NEXT: Optimization Remark Emitter 1046; GCN-O3-NEXT: Global Value Numbering 1047; GCN-O3-NEXT: Scalar Evolution Analysis 1048; GCN-O3-NEXT: Nary reassociation 1049; GCN-O3-NEXT: Early CSE 1050; GCN-O3-NEXT: Post-Dominator Tree Construction 1051; GCN-O3-NEXT: Legacy Divergence Analysis 1052; GCN-O3-NEXT: AMDGPU IR optimizations 1053; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1054; GCN-O3-NEXT: Canonicalize natural loops 1055; GCN-O3-NEXT: Scalar Evolution Analysis 1056; GCN-O3-NEXT: Loop Pass Manager 1057; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops 1058; GCN-O3-NEXT: Induction Variable Users 1059; GCN-O3-NEXT: Loop Strength Reduction 1060; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1061; GCN-O3-NEXT: Function Alias Analysis Results 1062; GCN-O3-NEXT: Merge contiguous icmps into a memcmp 1063; GCN-O3-NEXT: Natural Loop Information 1064; GCN-O3-NEXT: Lazy Branch Probability Analysis 1065; GCN-O3-NEXT: Lazy Block Frequency Analysis 1066; GCN-O3-NEXT: Expand memcmp() to load/stores 1067; GCN-O3-NEXT: Lower constant intrinsics 1068; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1069; GCN-O3-NEXT: Natural Loop Information 1070; GCN-O3-NEXT: Post-Dominator Tree Construction 1071; GCN-O3-NEXT: Branch Probability Analysis 1072; GCN-O3-NEXT: Block Frequency Analysis 1073; GCN-O3-NEXT: Constant Hoisting 1074; GCN-O3-NEXT: Replace intrinsics with calls to vector library 1075; GCN-O3-NEXT: Partially inline calls to library functions 1076; GCN-O3-NEXT: Expand vector predication intrinsics 1077; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics 1078; GCN-O3-NEXT: Expand reduction intrinsics 1079; GCN-O3-NEXT: Natural Loop Information 1080; GCN-O3-NEXT: TLS Variable Hoist 1081; GCN-O3-NEXT: Phi Values Analysis 1082; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1083; GCN-O3-NEXT: Function Alias Analysis Results 1084; GCN-O3-NEXT: Memory Dependence Analysis 1085; GCN-O3-NEXT: Lazy Branch Probability Analysis 1086; GCN-O3-NEXT: Lazy Block Frequency Analysis 1087; GCN-O3-NEXT: Optimization Remark Emitter 1088; GCN-O3-NEXT: Global Value Numbering 1089; GCN-O3-NEXT: AMDGPU Attributor 1090; GCN-O3-NEXT: CallGraph Construction 1091; GCN-O3-NEXT: Call Graph SCC Pass Manager 1092; GCN-O3-NEXT: AMDGPU Annotate Kernel Features 1093; GCN-O3-NEXT: FunctionPass Manager 1094; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments 1095; GCN-O3-NEXT: Dominator Tree Construction 1096; GCN-O3-NEXT: Natural Loop Information 1097; GCN-O3-NEXT: CodeGen Prepare 1098; GCN-O3-NEXT: Dominator Tree Construction 1099; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1100; GCN-O3-NEXT: Function Alias Analysis Results 1101; GCN-O3-NEXT: Natural Loop Information 1102; GCN-O3-NEXT: Scalar Evolution Analysis 1103; GCN-O3-NEXT: GPU Load and Store Vectorizer 1104; GCN-O3-NEXT: Lazy Value Information Analysis 1105; GCN-O3-NEXT: Lower SwitchInst's to branches 1106; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators 1107; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1108; GCN-O3-NEXT: Dominator Tree Construction 1109; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1110; GCN-O3-NEXT: Function Alias Analysis Results 1111; GCN-O3-NEXT: Flatten the CFG 1112; GCN-O3-NEXT: Dominator Tree Construction 1113; GCN-O3-NEXT: Post-Dominator Tree Construction 1114; GCN-O3-NEXT: Natural Loop Information 1115; GCN-O3-NEXT: Legacy Divergence Analysis 1116; GCN-O3-NEXT: AMDGPU IR late optimizations 1117; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1118; GCN-O3-NEXT: Function Alias Analysis Results 1119; GCN-O3-NEXT: Code sinking 1120; GCN-O3-NEXT: Legacy Divergence Analysis 1121; GCN-O3-NEXT: Unify divergent function exit nodes 1122; GCN-O3-NEXT: Lazy Value Information Analysis 1123; GCN-O3-NEXT: Lower SwitchInst's to branches 1124; GCN-O3-NEXT: Dominator Tree Construction 1125; GCN-O3-NEXT: Natural Loop Information 1126; GCN-O3-NEXT: Convert irreducible control-flow into natural loops 1127; GCN-O3-NEXT: Fixup each natural loop to have a single exit block 1128; GCN-O3-NEXT: Post-Dominator Tree Construction 1129; GCN-O3-NEXT: Dominance Frontier Construction 1130; GCN-O3-NEXT: Detect single entry single exit regions 1131; GCN-O3-NEXT: Region Pass Manager 1132; GCN-O3-NEXT: Structurize control flow 1133; GCN-O3-NEXT: Post-Dominator Tree Construction 1134; GCN-O3-NEXT: Natural Loop Information 1135; GCN-O3-NEXT: Legacy Divergence Analysis 1136; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1137; GCN-O3-NEXT: Function Alias Analysis Results 1138; GCN-O3-NEXT: Memory SSA 1139; GCN-O3-NEXT: AMDGPU Annotate Uniform Values 1140; GCN-O3-NEXT: SI annotate control flow 1141; GCN-O3-NEXT: LCSSA Verifier 1142; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1143; GCN-O3-NEXT: Analysis if a function is memory bound 1144; GCN-O3-NEXT: DummyCGSCCPass 1145; GCN-O3-NEXT: FunctionPass Manager 1146; GCN-O3-NEXT: Safe Stack instrumentation pass 1147; GCN-O3-NEXT: Insert stack protectors 1148; GCN-O3-NEXT: Dominator Tree Construction 1149; GCN-O3-NEXT: Post-Dominator Tree Construction 1150; GCN-O3-NEXT: Natural Loop Information 1151; GCN-O3-NEXT: Legacy Divergence Analysis 1152; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1153; GCN-O3-NEXT: Function Alias Analysis Results 1154; GCN-O3-NEXT: Branch Probability Analysis 1155; GCN-O3-NEXT: Lazy Branch Probability Analysis 1156; GCN-O3-NEXT: Lazy Block Frequency Analysis 1157; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 1158; GCN-O3-NEXT: MachineDominator Tree Construction 1159; GCN-O3-NEXT: SI Fix SGPR copies 1160; GCN-O3-NEXT: MachinePostDominator Tree Construction 1161; GCN-O3-NEXT: SI Lower i1 Copies 1162; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions 1163; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1164; GCN-O3-NEXT: Early Tail Duplication 1165; GCN-O3-NEXT: Optimize machine instruction PHIs 1166; GCN-O3-NEXT: Slot index numbering 1167; GCN-O3-NEXT: Merge disjoint stack slots 1168; GCN-O3-NEXT: Local Stack Slot Allocation 1169; GCN-O3-NEXT: Remove dead machine instructions 1170; GCN-O3-NEXT: MachineDominator Tree Construction 1171; GCN-O3-NEXT: Machine Natural Loop Construction 1172; GCN-O3-NEXT: Machine Block Frequency Analysis 1173; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1174; GCN-O3-NEXT: MachineDominator Tree Construction 1175; GCN-O3-NEXT: Machine Block Frequency Analysis 1176; GCN-O3-NEXT: Machine Common Subexpression Elimination 1177; GCN-O3-NEXT: MachinePostDominator Tree Construction 1178; GCN-O3-NEXT: Machine Cycle Info Analysis 1179; GCN-O3-NEXT: Machine code sinking 1180; GCN-O3-NEXT: Peephole Optimizations 1181; GCN-O3-NEXT: Remove dead machine instructions 1182; GCN-O3-NEXT: SI Fold Operands 1183; GCN-O3-NEXT: GCN DPP Combine 1184; GCN-O3-NEXT: SI Load Store Optimizer 1185; GCN-O3-NEXT: SI Peephole SDWA 1186; GCN-O3-NEXT: Machine Block Frequency Analysis 1187; GCN-O3-NEXT: MachineDominator Tree Construction 1188; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1189; GCN-O3-NEXT: MachineDominator Tree Construction 1190; GCN-O3-NEXT: Machine Block Frequency Analysis 1191; GCN-O3-NEXT: Machine Common Subexpression Elimination 1192; GCN-O3-NEXT: SI Fold Operands 1193; GCN-O3-NEXT: Remove dead machine instructions 1194; GCN-O3-NEXT: SI Shrink Instructions 1195; GCN-O3-NEXT: Register Usage Information Propagation 1196; GCN-O3-NEXT: Detect Dead Lanes 1197; GCN-O3-NEXT: Remove dead machine instructions 1198; GCN-O3-NEXT: Process Implicit Definitions 1199; GCN-O3-NEXT: Remove unreachable machine basic blocks 1200; GCN-O3-NEXT: Live Variable Analysis 1201; GCN-O3-NEXT: SI Optimize VGPR LiveRange 1202; GCN-O3-NEXT: Eliminate PHI nodes for register allocation 1203; GCN-O3-NEXT: SI Lower control flow pseudo instructions 1204; GCN-O3-NEXT: Two-Address instruction pass 1205; GCN-O3-NEXT: Slot index numbering 1206; GCN-O3-NEXT: Live Interval Analysis 1207; GCN-O3-NEXT: Machine Natural Loop Construction 1208; GCN-O3-NEXT: Simple Register Coalescing 1209; GCN-O3-NEXT: Rename Disconnected Subregister Components 1210; GCN-O3-NEXT: AMDGPU Pre-RA optimizations 1211; GCN-O3-NEXT: Machine Instruction Scheduler 1212; GCN-O3-NEXT: MachinePostDominator Tree Construction 1213; GCN-O3-NEXT: SI Whole Quad Mode 1214; GCN-O3-NEXT: Virtual Register Map 1215; GCN-O3-NEXT: Live Register Matrix 1216; GCN-O3-NEXT: SI Pre-allocate WWM Registers 1217; GCN-O3-NEXT: SI optimize exec mask operations pre-RA 1218; GCN-O3-NEXT: SI Form memory clauses 1219; GCN-O3-NEXT: Machine Natural Loop Construction 1220; GCN-O3-NEXT: Machine Block Frequency Analysis 1221; GCN-O3-NEXT: Debug Variable Analysis 1222; GCN-O3-NEXT: Live Stack Slot Analysis 1223; GCN-O3-NEXT: Virtual Register Map 1224; GCN-O3-NEXT: Live Register Matrix 1225; GCN-O3-NEXT: Bundle Machine CFG Edges 1226; GCN-O3-NEXT: Spill Code Placement Analysis 1227; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1228; GCN-O3-NEXT: Machine Optimization Remark Emitter 1229; GCN-O3-NEXT: Greedy Register Allocator 1230; GCN-O3-NEXT: Virtual Register Rewriter 1231; GCN-O3-NEXT: SI lower SGPR spill instructions 1232; GCN-O3-NEXT: Virtual Register Map 1233; GCN-O3-NEXT: Live Register Matrix 1234; GCN-O3-NEXT: Greedy Register Allocator 1235; GCN-O3-NEXT: GCN NSA Reassign 1236; GCN-O3-NEXT: Virtual Register Rewriter 1237; GCN-O3-NEXT: Stack Slot Coloring 1238; GCN-O3-NEXT: Machine Copy Propagation Pass 1239; GCN-O3-NEXT: Machine Loop Invariant Code Motion 1240; GCN-O3-NEXT: SI Fix VGPR copies 1241; GCN-O3-NEXT: SI optimize exec mask operations 1242; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis 1243; GCN-O3-NEXT: Fixup Statepoint Caller Saved 1244; GCN-O3-NEXT: PostRA Machine Sink 1245; GCN-O3-NEXT: MachineDominator Tree Construction 1246; GCN-O3-NEXT: Machine Natural Loop Construction 1247; GCN-O3-NEXT: Machine Block Frequency Analysis 1248; GCN-O3-NEXT: MachinePostDominator Tree Construction 1249; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1250; GCN-O3-NEXT: Machine Optimization Remark Emitter 1251; GCN-O3-NEXT: Shrink Wrapping analysis 1252; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization 1253; GCN-O3-NEXT: Control Flow Optimizer 1254; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1255; GCN-O3-NEXT: Tail Duplication 1256; GCN-O3-NEXT: Machine Copy Propagation Pass 1257; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass 1258; GCN-O3-NEXT: SI Shrink Instructions 1259; GCN-O3-NEXT: SI post-RA bundler 1260; GCN-O3-NEXT: MachineDominator Tree Construction 1261; GCN-O3-NEXT: Machine Natural Loop Construction 1262; GCN-O3-NEXT: PostRA Machine Instruction Scheduler 1263; GCN-O3-NEXT: Machine Block Frequency Analysis 1264; GCN-O3-NEXT: MachinePostDominator Tree Construction 1265; GCN-O3-NEXT: Branch Probability Basic Block Placement 1266; GCN-O3-NEXT: Insert fentry calls 1267; GCN-O3-NEXT: Insert XRay ops 1268; GCN-O3-NEXT: GCN Create VOPD Instructions 1269; GCN-O3-NEXT: SI Memory Legalizer 1270; GCN-O3-NEXT: MachineDominator Tree Construction 1271; GCN-O3-NEXT: Machine Natural Loop Construction 1272; GCN-O3-NEXT: MachinePostDominator Tree Construction 1273; GCN-O3-NEXT: SI insert wait instructions 1274; GCN-O3-NEXT: Insert required mode register values 1275; GCN-O3-NEXT: SI Insert Hard Clauses 1276; GCN-O3-NEXT: SI Final Branch Preparation 1277; GCN-O3-NEXT: SI peephole optimizations 1278; GCN-O3-NEXT: Post RA hazard recognizer 1279; GCN-O3-NEXT: Release VGPRs 1280; GCN-O3-NEXT: AMDGPU Insert Delay ALU 1281; GCN-O3-NEXT: Branch relaxation pass 1282; GCN-O3-NEXT: Register Usage Information Collector Pass 1283; GCN-O3-NEXT: Live DEBUG_VALUE analysis 1284; GCN-O3-NEXT: Function register usage analysis 1285; GCN-O3-NEXT: FunctionPass Manager 1286; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1287; GCN-O3-NEXT: Machine Optimization Remark Emitter 1288; GCN-O3-NEXT: AMDGPU Assembly Printer 1289; GCN-O3-NEXT: Free MachineFunction 1290; GCN-O3-NEXT:Pass Arguments: -domtree 1291; GCN-O3-NEXT: FunctionPass Manager 1292; GCN-O3-NEXT: Dominator Tree Construction 1293 1294define void @empty() { 1295 ret void 1296} 1297