1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s 5; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s 7; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \ 8; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \ 9; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s 10; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 11; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s 12; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 13; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s 14 15; REQUIRES: asserts 16 17; GCN-O0:Target Library Information 18; GCN-O0-NEXT:Target Pass Configuration 19; GCN-O0-NEXT:Machine Module Information 20; GCN-O0-NEXT:Target Transform Information 21; GCN-O0-NEXT:Assumption Cache Tracker 22; GCN-O0-NEXT:Profile summary info 23; GCN-O0-NEXT:Argument Register Usage Information Storage 24; GCN-O0-NEXT:Create Garbage Collector Module Metadata 25; GCN-O0-NEXT:Register Usage Information Storage 26; GCN-O0-NEXT:Machine Branch Probability Analysis 27; GCN-O0-NEXT: ModulePass Manager 28; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering 29; GCN-O0-NEXT: AMDGPU Printf lowering 30; GCN-O0-NEXT: FunctionPass Manager 31; GCN-O0-NEXT: Dominator Tree Construction 32; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU 33; GCN-O0-NEXT: FunctionPass Manager 34; GCN-O0-NEXT: Early propagate attributes from kernels to functions 35; GCN-O0-NEXT: AMDGPU Lower Intrinsics 36; GCN-O0-NEXT: AMDGPU Inline All Functions 37; GCN-O0-NEXT: CallGraph Construction 38; GCN-O0-NEXT: Call Graph SCC Pass Manager 39; GCN-O0-NEXT: Inliner for always_inline functions 40; GCN-O0-NEXT: A No-Op Barrier Pass 41; GCN-O0-NEXT: Lower OpenCL enqueued blocks 42; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions 43; GCN-O0-NEXT: FunctionPass Manager 44; GCN-O0-NEXT: Expand Atomic instructions 45; GCN-O0-NEXT: Lower constant intrinsics 46; GCN-O0-NEXT: Remove unreachable blocks from the CFG 47; GCN-O0-NEXT: Expand vector predication intrinsics 48; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics 49; GCN-O0-NEXT: Expand reduction intrinsics 50; GCN-O0-NEXT: AMDGPU Attributor 51; GCN-O0-NEXT: CallGraph Construction 52; GCN-O0-NEXT: Call Graph SCC Pass Manager 53; GCN-O0-NEXT: AMDGPU Annotate Kernel Features 54; GCN-O0-NEXT: FunctionPass Manager 55; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments 56; GCN-O0-NEXT: Lazy Value Information Analysis 57; GCN-O0-NEXT: Lower SwitchInst's to branches 58; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators 59; GCN-O0-NEXT: Remove unreachable blocks from the CFG 60; GCN-O0-NEXT: Post-Dominator Tree Construction 61; GCN-O0-NEXT: Dominator Tree Construction 62; GCN-O0-NEXT: Natural Loop Information 63; GCN-O0-NEXT: Legacy Divergence Analysis 64; GCN-O0-NEXT: Unify divergent function exit nodes 65; GCN-O0-NEXT: Lazy Value Information Analysis 66; GCN-O0-NEXT: Lower SwitchInst's to branches 67; GCN-O0-NEXT: Dominator Tree Construction 68; GCN-O0-NEXT: Natural Loop Information 69; GCN-O0-NEXT: Convert irreducible control-flow into natural loops 70; GCN-O0-NEXT: Fixup each natural loop to have a single exit block 71; GCN-O0-NEXT: Post-Dominator Tree Construction 72; GCN-O0-NEXT: Dominance Frontier Construction 73; GCN-O0-NEXT: Detect single entry single exit regions 74; GCN-O0-NEXT: Region Pass Manager 75; GCN-O0-NEXT: Structurize control flow 76; GCN-O0-NEXT: Post-Dominator Tree Construction 77; GCN-O0-NEXT: Natural Loop Information 78; GCN-O0-NEXT: Legacy Divergence Analysis 79; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 80; GCN-O0-NEXT: Function Alias Analysis Results 81; GCN-O0-NEXT: Memory SSA 82; GCN-O0-NEXT: AMDGPU Annotate Uniform Values 83; GCN-O0-NEXT: SI annotate control flow 84; GCN-O0-NEXT: LCSSA Verifier 85; GCN-O0-NEXT: Loop-Closed SSA Form Pass 86; GCN-O0-NEXT: DummyCGSCCPass 87; GCN-O0-NEXT: FunctionPass Manager 88; GCN-O0-NEXT: Safe Stack instrumentation pass 89; GCN-O0-NEXT: Insert stack protectors 90; GCN-O0-NEXT: Dominator Tree Construction 91; GCN-O0-NEXT: Post-Dominator Tree Construction 92; GCN-O0-NEXT: Natural Loop Information 93; GCN-O0-NEXT: Legacy Divergence Analysis 94; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 95; GCN-O0-NEXT: MachineDominator Tree Construction 96; GCN-O0-NEXT: SI Fix SGPR copies 97; GCN-O0-NEXT: MachinePostDominator Tree Construction 98; GCN-O0-NEXT: SI Lower i1 Copies 99; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions 100; GCN-O0-NEXT: Local Stack Slot Allocation 101; GCN-O0-NEXT: Register Usage Information Propagation 102; GCN-O0-NEXT: Eliminate PHI nodes for register allocation 103; GCN-O0-NEXT: SI Lower control flow pseudo instructions 104; GCN-O0-NEXT: Two-Address instruction pass 105; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 106; GCN-O0-NEXT: Function Alias Analysis Results 107; GCN-O0-NEXT: MachineDominator Tree Construction 108; GCN-O0-NEXT: Slot index numbering 109; GCN-O0-NEXT: Live Interval Analysis 110; GCN-O0-NEXT: MachinePostDominator Tree Construction 111; GCN-O0-NEXT: SI Whole Quad Mode 112; GCN-O0-NEXT: Virtual Register Map 113; GCN-O0-NEXT: Live Register Matrix 114; GCN-O0-NEXT: SI Pre-allocate WWM Registers 115; GCN-O0-NEXT: Fast Register Allocator 116; GCN-O0-NEXT: SI lower SGPR spill instructions 117; GCN-O0-NEXT: Fast Register Allocator 118; GCN-O0-NEXT: SI Fix VGPR copies 119; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis 120; GCN-O0-NEXT: Fixup Statepoint Caller Saved 121; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 122; GCN-O0-NEXT: Machine Optimization Remark Emitter 123; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization 124; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass 125; GCN-O0-NEXT: SI post-RA bundler 126; GCN-O0-NEXT: Insert fentry calls 127; GCN-O0-NEXT: Insert XRay ops 128; GCN-O0-NEXT: SI Memory Legalizer 129; GCN-O0-NEXT: MachinePostDominator Tree Construction 130; GCN-O0-NEXT: SI insert wait instructions 131; GCN-O0-NEXT: Insert required mode register values 132; GCN-O0-NEXT: MachineDominator Tree Construction 133; GCN-O0-NEXT: SI Final Branch Preparation 134; GCN-O0-NEXT: Post RA hazard recognizer 135; GCN-O0-NEXT: Branch relaxation pass 136; GCN-O0-NEXT: Register Usage Information Collector Pass 137; GCN-O0-NEXT: Live DEBUG_VALUE analysis 138; GCN-O0-NEXT: Function register usage analysis 139; GCN-O0-NEXT: FunctionPass Manager 140; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 141; GCN-O0-NEXT: Machine Optimization Remark Emitter 142; GCN-O0-NEXT: AMDGPU Assembly Printer 143; GCN-O0-NEXT: Free MachineFunction 144; GCN-O0-NEXT:Pass Arguments: -domtree 145; GCN-O0-NEXT: FunctionPass Manager 146; GCN-O0-NEXT: Dominator Tree Construction 147 148; GCN-O1:Target Library Information 149; GCN-O1-NEXT:Target Pass Configuration 150; GCN-O1-NEXT:Machine Module Information 151; GCN-O1-NEXT:Target Transform Information 152; GCN-O1-NEXT:Assumption Cache Tracker 153; GCN-O1-NEXT:Profile summary info 154; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis 155; GCN-O1-NEXT:External Alias Analysis 156; GCN-O1-NEXT:Type-Based Alias Analysis 157; GCN-O1-NEXT:Scoped NoAlias Alias Analysis 158; GCN-O1-NEXT:Argument Register Usage Information Storage 159; GCN-O1-NEXT:Create Garbage Collector Module Metadata 160; GCN-O1-NEXT:Machine Branch Probability Analysis 161; GCN-O1-NEXT:Register Usage Information Storage 162; GCN-O1-NEXT:Default Regalloc Eviction Advisor 163; GCN-O1-NEXT: ModulePass Manager 164; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering 165; GCN-O1-NEXT: AMDGPU Printf lowering 166; GCN-O1-NEXT: FunctionPass Manager 167; GCN-O1-NEXT: Dominator Tree Construction 168; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU 169; GCN-O1-NEXT: FunctionPass Manager 170; GCN-O1-NEXT: Early propagate attributes from kernels to functions 171; GCN-O1-NEXT: AMDGPU Lower Intrinsics 172; GCN-O1-NEXT: AMDGPU Inline All Functions 173; GCN-O1-NEXT: CallGraph Construction 174; GCN-O1-NEXT: Call Graph SCC Pass Manager 175; GCN-O1-NEXT: Inliner for always_inline functions 176; GCN-O1-NEXT: A No-Op Barrier Pass 177; GCN-O1-NEXT: Lower OpenCL enqueued blocks 178; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions 179; GCN-O1-NEXT: FunctionPass Manager 180; GCN-O1-NEXT: Infer address spaces 181; GCN-O1-NEXT: Expand Atomic instructions 182; GCN-O1-NEXT: AMDGPU Promote Alloca 183; GCN-O1-NEXT: Dominator Tree Construction 184; GCN-O1-NEXT: SROA 185; GCN-O1-NEXT: Post-Dominator Tree Construction 186; GCN-O1-NEXT: Natural Loop Information 187; GCN-O1-NEXT: Legacy Divergence Analysis 188; GCN-O1-NEXT: AMDGPU IR optimizations 189; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 190; GCN-O1-NEXT: Canonicalize natural loops 191; GCN-O1-NEXT: Scalar Evolution Analysis 192; GCN-O1-NEXT: Loop Pass Manager 193; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops 194; GCN-O1-NEXT: Induction Variable Users 195; GCN-O1-NEXT: Loop Strength Reduction 196; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 197; GCN-O1-NEXT: Function Alias Analysis Results 198; GCN-O1-NEXT: Merge contiguous icmps into a memcmp 199; GCN-O1-NEXT: Natural Loop Information 200; GCN-O1-NEXT: Lazy Branch Probability Analysis 201; GCN-O1-NEXT: Lazy Block Frequency Analysis 202; GCN-O1-NEXT: Expand memcmp() to load/stores 203; GCN-O1-NEXT: Lower constant intrinsics 204; GCN-O1-NEXT: Remove unreachable blocks from the CFG 205; GCN-O1-NEXT: Natural Loop Information 206; GCN-O1-NEXT: Post-Dominator Tree Construction 207; GCN-O1-NEXT: Branch Probability Analysis 208; GCN-O1-NEXT: Block Frequency Analysis 209; GCN-O1-NEXT: Constant Hoisting 210; GCN-O1-NEXT: Replace intrinsics with calls to vector library 211; GCN-O1-NEXT: Partially inline calls to library functions 212; GCN-O1-NEXT: Expand vector predication intrinsics 213; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics 214; GCN-O1-NEXT: Expand reduction intrinsics 215; GCN-O1-NEXT: Natural Loop Information 216; GCN-O1-NEXT: TLS Variable Hoist 217; GCN-O1-NEXT: AMDGPU Attributor 218; GCN-O1-NEXT: CallGraph Construction 219; GCN-O1-NEXT: Call Graph SCC Pass Manager 220; GCN-O1-NEXT: AMDGPU Annotate Kernel Features 221; GCN-O1-NEXT: FunctionPass Manager 222; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments 223; GCN-O1-NEXT: Dominator Tree Construction 224; GCN-O1-NEXT: Natural Loop Information 225; GCN-O1-NEXT: CodeGen Prepare 226; GCN-O1-NEXT: Lazy Value Information Analysis 227; GCN-O1-NEXT: Lower SwitchInst's to branches 228; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators 229; GCN-O1-NEXT: Remove unreachable blocks from the CFG 230; GCN-O1-NEXT: Dominator Tree Construction 231; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 232; GCN-O1-NEXT: Function Alias Analysis Results 233; GCN-O1-NEXT: Flatten the CFG 234; GCN-O1-NEXT: Dominator Tree Construction 235; GCN-O1-NEXT: Post-Dominator Tree Construction 236; GCN-O1-NEXT: Natural Loop Information 237; GCN-O1-NEXT: Legacy Divergence Analysis 238; GCN-O1-NEXT: AMDGPU IR late optimizations 239; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 240; GCN-O1-NEXT: Function Alias Analysis Results 241; GCN-O1-NEXT: Code sinking 242; GCN-O1-NEXT: Legacy Divergence Analysis 243; GCN-O1-NEXT: Unify divergent function exit nodes 244; GCN-O1-NEXT: Lazy Value Information Analysis 245; GCN-O1-NEXT: Lower SwitchInst's to branches 246; GCN-O1-NEXT: Dominator Tree Construction 247; GCN-O1-NEXT: Natural Loop Information 248; GCN-O1-NEXT: Convert irreducible control-flow into natural loops 249; GCN-O1-NEXT: Fixup each natural loop to have a single exit block 250; GCN-O1-NEXT: Post-Dominator Tree Construction 251; GCN-O1-NEXT: Dominance Frontier Construction 252; GCN-O1-NEXT: Detect single entry single exit regions 253; GCN-O1-NEXT: Region Pass Manager 254; GCN-O1-NEXT: Structurize control flow 255; GCN-O1-NEXT: Post-Dominator Tree Construction 256; GCN-O1-NEXT: Natural Loop Information 257; GCN-O1-NEXT: Legacy Divergence Analysis 258; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 259; GCN-O1-NEXT: Function Alias Analysis Results 260; GCN-O1-NEXT: Memory SSA 261; GCN-O1-NEXT: AMDGPU Annotate Uniform Values 262; GCN-O1-NEXT: SI annotate control flow 263; GCN-O1-NEXT: LCSSA Verifier 264; GCN-O1-NEXT: Loop-Closed SSA Form Pass 265; GCN-O1-NEXT: DummyCGSCCPass 266; GCN-O1-NEXT: FunctionPass Manager 267; GCN-O1-NEXT: Safe Stack instrumentation pass 268; GCN-O1-NEXT: Insert stack protectors 269; GCN-O1-NEXT: Dominator Tree Construction 270; GCN-O1-NEXT: Post-Dominator Tree Construction 271; GCN-O1-NEXT: Natural Loop Information 272; GCN-O1-NEXT: Legacy Divergence Analysis 273; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 274; GCN-O1-NEXT: Function Alias Analysis Results 275; GCN-O1-NEXT: Branch Probability Analysis 276; GCN-O1-NEXT: Lazy Branch Probability Analysis 277; GCN-O1-NEXT: Lazy Block Frequency Analysis 278; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 279; GCN-O1-NEXT: MachineDominator Tree Construction 280; GCN-O1-NEXT: SI Fix SGPR copies 281; GCN-O1-NEXT: MachinePostDominator Tree Construction 282; GCN-O1-NEXT: SI Lower i1 Copies 283; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions 284; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 285; GCN-O1-NEXT: Early Tail Duplication 286; GCN-O1-NEXT: Optimize machine instruction PHIs 287; GCN-O1-NEXT: Slot index numbering 288; GCN-O1-NEXT: Merge disjoint stack slots 289; GCN-O1-NEXT: Local Stack Slot Allocation 290; GCN-O1-NEXT: Remove dead machine instructions 291; GCN-O1-NEXT: MachineDominator Tree Construction 292; GCN-O1-NEXT: Machine Natural Loop Construction 293; GCN-O1-NEXT: Machine Block Frequency Analysis 294; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion 295; GCN-O1-NEXT: MachineDominator Tree Construction 296; GCN-O1-NEXT: Machine Block Frequency Analysis 297; GCN-O1-NEXT: Machine Common Subexpression Elimination 298; GCN-O1-NEXT: MachinePostDominator Tree Construction 299; GCN-O1-NEXT: Machine Cycle Info Analysis 300; GCN-O1-NEXT: Machine code sinking 301; GCN-O1-NEXT: Peephole Optimizations 302; GCN-O1-NEXT: Remove dead machine instructions 303; GCN-O1-NEXT: SI Fold Operands 304; GCN-O1-NEXT: GCN DPP Combine 305; GCN-O1-NEXT: SI Load Store Optimizer 306; GCN-O1-NEXT: Remove dead machine instructions 307; GCN-O1-NEXT: SI Shrink Instructions 308; GCN-O1-NEXT: Register Usage Information Propagation 309; GCN-O1-NEXT: Detect Dead Lanes 310; GCN-O1-NEXT: Remove dead machine instructions 311; GCN-O1-NEXT: Process Implicit Definitions 312; GCN-O1-NEXT: Remove unreachable machine basic blocks 313; GCN-O1-NEXT: Live Variable Analysis 314; GCN-O1-NEXT: MachineDominator Tree Construction 315; GCN-O1-NEXT: SI Optimize VGPR LiveRange 316; GCN-O1-NEXT: Eliminate PHI nodes for register allocation 317; GCN-O1-NEXT: SI Lower control flow pseudo instructions 318; GCN-O1-NEXT: Two-Address instruction pass 319; GCN-O1-NEXT: Slot index numbering 320; GCN-O1-NEXT: Live Interval Analysis 321; GCN-O1-NEXT: Machine Natural Loop Construction 322; GCN-O1-NEXT: Simple Register Coalescing 323; GCN-O1-NEXT: Rename Disconnected Subregister Components 324; GCN-O1-NEXT: Machine Instruction Scheduler 325; GCN-O1-NEXT: MachinePostDominator Tree Construction 326; GCN-O1-NEXT: SI Whole Quad Mode 327; GCN-O1-NEXT: Virtual Register Map 328; GCN-O1-NEXT: Live Register Matrix 329; GCN-O1-NEXT: SI Pre-allocate WWM Registers 330; GCN-O1-NEXT: SI optimize exec mask operations pre-RA 331; GCN-O1-NEXT: Machine Natural Loop Construction 332; GCN-O1-NEXT: Machine Block Frequency Analysis 333; GCN-O1-NEXT: Debug Variable Analysis 334; GCN-O1-NEXT: Live Stack Slot Analysis 335; GCN-O1-NEXT: Virtual Register Map 336; GCN-O1-NEXT: Live Register Matrix 337; GCN-O1-NEXT: Bundle Machine CFG Edges 338; GCN-O1-NEXT: Spill Code Placement Analysis 339; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 340; GCN-O1-NEXT: Machine Optimization Remark Emitter 341; GCN-O1-NEXT: Greedy Register Allocator 342; GCN-O1-NEXT: Virtual Register Rewriter 343; GCN-O1-NEXT: SI lower SGPR spill instructions 344; GCN-O1-NEXT: Virtual Register Map 345; GCN-O1-NEXT: Live Register Matrix 346; GCN-O1-NEXT: Greedy Register Allocator 347; GCN-O1-NEXT: GCN NSA Reassign 348; GCN-O1-NEXT: Virtual Register Rewriter 349; GCN-O1-NEXT: Stack Slot Coloring 350; GCN-O1-NEXT: Machine Copy Propagation Pass 351; GCN-O1-NEXT: Machine Loop Invariant Code Motion 352; GCN-O1-NEXT: SI Fix VGPR copies 353; GCN-O1-NEXT: SI optimize exec mask operations 354; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis 355; GCN-O1-NEXT: Fixup Statepoint Caller Saved 356; GCN-O1-NEXT: PostRA Machine Sink 357; GCN-O1-NEXT: MachineDominator Tree Construction 358; GCN-O1-NEXT: Machine Natural Loop Construction 359; GCN-O1-NEXT: Machine Block Frequency Analysis 360; GCN-O1-NEXT: MachinePostDominator Tree Construction 361; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 362; GCN-O1-NEXT: Machine Optimization Remark Emitter 363; GCN-O1-NEXT: Shrink Wrapping analysis 364; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization 365; GCN-O1-NEXT: Control Flow Optimizer 366; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 367; GCN-O1-NEXT: Tail Duplication 368; GCN-O1-NEXT: Machine Copy Propagation Pass 369; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass 370; GCN-O1-NEXT: SI Shrink Instructions 371; GCN-O1-NEXT: SI post-RA bundler 372; GCN-O1-NEXT: MachineDominator Tree Construction 373; GCN-O1-NEXT: Machine Natural Loop Construction 374; GCN-O1-NEXT: PostRA Machine Instruction Scheduler 375; GCN-O1-NEXT: Machine Block Frequency Analysis 376; GCN-O1-NEXT: MachinePostDominator Tree Construction 377; GCN-O1-NEXT: Branch Probability Basic Block Placement 378; GCN-O1-NEXT: Insert fentry calls 379; GCN-O1-NEXT: Insert XRay ops 380; GCN-O1-NEXT: SI Memory Legalizer 381; GCN-O1-NEXT: MachinePostDominator Tree Construction 382; GCN-O1-NEXT: SI insert wait instructions 383; GCN-O1-NEXT: Insert required mode register values 384; GCN-O1-NEXT: SI Insert Hard Clauses 385; GCN-O1-NEXT: MachineDominator Tree Construction 386; GCN-O1-NEXT: SI Final Branch Preparation 387; GCN-O1-NEXT: SI peephole optimizations 388; GCN-O1-NEXT: Post RA hazard recognizer 389; GCN-O1-NEXT: Branch relaxation pass 390; GCN-O1-NEXT: Register Usage Information Collector Pass 391; GCN-O1-NEXT: Live DEBUG_VALUE analysis 392; GCN-O1-NEXT: Function register usage analysis 393; GCN-O1-NEXT: FunctionPass Manager 394; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 395; GCN-O1-NEXT: Machine Optimization Remark Emitter 396; GCN-O1-NEXT: AMDGPU Assembly Printer 397; GCN-O1-NEXT: Free MachineFunction 398; GCN-O1-NEXT:Pass Arguments: -domtree 399; GCN-O1-NEXT: FunctionPass Manager 400; GCN-O1-NEXT: Dominator Tree Construction 401 402; GCN-O1-OPTS:Target Library Information 403; GCN-O1-OPTS-NEXT:Target Pass Configuration 404; GCN-O1-OPTS-NEXT:Machine Module Information 405; GCN-O1-OPTS-NEXT:Target Transform Information 406; GCN-O1-OPTS-NEXT:Assumption Cache Tracker 407; GCN-O1-OPTS-NEXT:Profile summary info 408; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis 409; GCN-O1-OPTS-NEXT:External Alias Analysis 410; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis 411; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis 412; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage 413; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata 414; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis 415; GCN-O1-OPTS-NEXT:Register Usage Information Storage 416; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor 417; GCN-O1-OPTS-NEXT: ModulePass Manager 418; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering 419; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering 420; GCN-O1-OPTS-NEXT: FunctionPass Manager 421; GCN-O1-OPTS-NEXT: Dominator Tree Construction 422; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU 423; GCN-O1-OPTS-NEXT: FunctionPass Manager 424; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions 425; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics 426; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions 427; GCN-O1-OPTS-NEXT: CallGraph Construction 428; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 429; GCN-O1-OPTS-NEXT: Inliner for always_inline functions 430; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass 431; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks 432; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions 433; GCN-O1-OPTS-NEXT: FunctionPass Manager 434; GCN-O1-OPTS-NEXT: Infer address spaces 435; GCN-O1-OPTS-NEXT: Expand Atomic instructions 436; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca 437; GCN-O1-OPTS-NEXT: Dominator Tree Construction 438; GCN-O1-OPTS-NEXT: SROA 439; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 440; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 441; GCN-O1-OPTS-NEXT: Memory SSA 442; GCN-O1-OPTS-NEXT: Natural Loop Information 443; GCN-O1-OPTS-NEXT: Canonicalize natural loops 444; GCN-O1-OPTS-NEXT: LCSSA Verifier 445; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 446; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 447; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 448; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 449; GCN-O1-OPTS-NEXT: Loop Pass Manager 450; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion 451; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 452; GCN-O1-OPTS-NEXT: Speculatively execute instructions 453; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 454; GCN-O1-OPTS-NEXT: Straight line strength reduction 455; GCN-O1-OPTS-NEXT: Early CSE 456; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 457; GCN-O1-OPTS-NEXT: Nary reassociation 458; GCN-O1-OPTS-NEXT: Early CSE 459; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 460; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 461; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations 462; GCN-O1-OPTS-NEXT: Canonicalize natural loops 463; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 464; GCN-O1-OPTS-NEXT: Loop Pass Manager 465; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops 466; GCN-O1-OPTS-NEXT: Induction Variable Users 467; GCN-O1-OPTS-NEXT: Loop Strength Reduction 468; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 469; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 470; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp 471; GCN-O1-OPTS-NEXT: Natural Loop Information 472; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 473; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 474; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores 475; GCN-O1-OPTS-NEXT: Lower constant intrinsics 476; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 477; GCN-O1-OPTS-NEXT: Natural Loop Information 478; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 479; GCN-O1-OPTS-NEXT: Branch Probability Analysis 480; GCN-O1-OPTS-NEXT: Block Frequency Analysis 481; GCN-O1-OPTS-NEXT: Constant Hoisting 482; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library 483; GCN-O1-OPTS-NEXT: Partially inline calls to library functions 484; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics 485; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics 486; GCN-O1-OPTS-NEXT: Expand reduction intrinsics 487; GCN-O1-OPTS-NEXT: Natural Loop Information 488; GCN-O1-OPTS-NEXT: TLS Variable Hoist 489; GCN-O1-OPTS-NEXT: Early CSE 490; GCN-O1-OPTS-NEXT: AMDGPU Attributor 491; GCN-O1-OPTS-NEXT: CallGraph Construction 492; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 493; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features 494; GCN-O1-OPTS-NEXT: FunctionPass Manager 495; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments 496; GCN-O1-OPTS-NEXT: Dominator Tree Construction 497; GCN-O1-OPTS-NEXT: Natural Loop Information 498; GCN-O1-OPTS-NEXT: CodeGen Prepare 499; GCN-O1-OPTS-NEXT: Dominator Tree Construction 500; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 501; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 502; GCN-O1-OPTS-NEXT: Natural Loop Information 503; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 504; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer 505; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 506; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 507; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators 508; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 509; GCN-O1-OPTS-NEXT: Dominator Tree Construction 510; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 511; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 512; GCN-O1-OPTS-NEXT: Flatten the CFG 513; GCN-O1-OPTS-NEXT: Dominator Tree Construction 514; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 515; GCN-O1-OPTS-NEXT: Natural Loop Information 516; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 517; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations 518; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 519; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 520; GCN-O1-OPTS-NEXT: Code sinking 521; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 522; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes 523; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 524; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 525; GCN-O1-OPTS-NEXT: Dominator Tree Construction 526; GCN-O1-OPTS-NEXT: Natural Loop Information 527; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops 528; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block 529; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 530; GCN-O1-OPTS-NEXT: Dominance Frontier Construction 531; GCN-O1-OPTS-NEXT: Detect single entry single exit regions 532; GCN-O1-OPTS-NEXT: Region Pass Manager 533; GCN-O1-OPTS-NEXT: Structurize control flow 534; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 535; GCN-O1-OPTS-NEXT: Natural Loop Information 536; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 537; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 538; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 539; GCN-O1-OPTS-NEXT: Memory SSA 540; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values 541; GCN-O1-OPTS-NEXT: SI annotate control flow 542; GCN-O1-OPTS-NEXT: LCSSA Verifier 543; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 544; GCN-O1-OPTS-NEXT: DummyCGSCCPass 545; GCN-O1-OPTS-NEXT: FunctionPass Manager 546; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass 547; GCN-O1-OPTS-NEXT: Insert stack protectors 548; GCN-O1-OPTS-NEXT: Dominator Tree Construction 549; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 550; GCN-O1-OPTS-NEXT: Natural Loop Information 551; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 552; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 553; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 554; GCN-O1-OPTS-NEXT: Branch Probability Analysis 555; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 556; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 557; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 558; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 559; GCN-O1-OPTS-NEXT: SI Fix SGPR copies 560; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 561; GCN-O1-OPTS-NEXT: SI Lower i1 Copies 562; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions 563; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 564; GCN-O1-OPTS-NEXT: Early Tail Duplication 565; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs 566; GCN-O1-OPTS-NEXT: Slot index numbering 567; GCN-O1-OPTS-NEXT: Merge disjoint stack slots 568; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation 569; GCN-O1-OPTS-NEXT: Remove dead machine instructions 570; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 571; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 572; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 573; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 574; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 575; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 576; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 577; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 578; GCN-O1-OPTS-NEXT: Machine Cycle Info Analysis 579; GCN-O1-OPTS-NEXT: Machine code sinking 580; GCN-O1-OPTS-NEXT: Peephole Optimizations 581; GCN-O1-OPTS-NEXT: Remove dead machine instructions 582; GCN-O1-OPTS-NEXT: SI Fold Operands 583; GCN-O1-OPTS-NEXT: GCN DPP Combine 584; GCN-O1-OPTS-NEXT: SI Load Store Optimizer 585; GCN-O1-OPTS-NEXT: SI Peephole SDWA 586; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 587; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 588; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 589; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 590; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 591; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 592; GCN-O1-OPTS-NEXT: SI Fold Operands 593; GCN-O1-OPTS-NEXT: Remove dead machine instructions 594; GCN-O1-OPTS-NEXT: SI Shrink Instructions 595; GCN-O1-OPTS-NEXT: Register Usage Information Propagation 596; GCN-O1-OPTS-NEXT: Detect Dead Lanes 597; GCN-O1-OPTS-NEXT: Remove dead machine instructions 598; GCN-O1-OPTS-NEXT: Process Implicit Definitions 599; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks 600; GCN-O1-OPTS-NEXT: Live Variable Analysis 601; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange 602; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation 603; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions 604; GCN-O1-OPTS-NEXT: Two-Address instruction pass 605; GCN-O1-OPTS-NEXT: Slot index numbering 606; GCN-O1-OPTS-NEXT: Live Interval Analysis 607; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 608; GCN-O1-OPTS-NEXT: Simple Register Coalescing 609; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components 610; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations 611; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler 612; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 613; GCN-O1-OPTS-NEXT: SI Whole Quad Mode 614; GCN-O1-OPTS-NEXT: Virtual Register Map 615; GCN-O1-OPTS-NEXT: Live Register Matrix 616; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers 617; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA 618; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 619; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 620; GCN-O1-OPTS-NEXT: Debug Variable Analysis 621; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis 622; GCN-O1-OPTS-NEXT: Virtual Register Map 623; GCN-O1-OPTS-NEXT: Live Register Matrix 624; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges 625; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis 626; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 627; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 628; GCN-O1-OPTS-NEXT: Greedy Register Allocator 629; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 630; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions 631; GCN-O1-OPTS-NEXT: Virtual Register Map 632; GCN-O1-OPTS-NEXT: Live Register Matrix 633; GCN-O1-OPTS-NEXT: Greedy Register Allocator 634; GCN-O1-OPTS-NEXT: GCN NSA Reassign 635; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 636; GCN-O1-OPTS-NEXT: Stack Slot Coloring 637; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 638; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion 639; GCN-O1-OPTS-NEXT: SI Fix VGPR copies 640; GCN-O1-OPTS-NEXT: SI optimize exec mask operations 641; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis 642; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved 643; GCN-O1-OPTS-NEXT: PostRA Machine Sink 644; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 645; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 646; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 647; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 648; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 649; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 650; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis 651; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization 652; GCN-O1-OPTS-NEXT: Control Flow Optimizer 653; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 654; GCN-O1-OPTS-NEXT: Tail Duplication 655; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 656; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass 657; GCN-O1-OPTS-NEXT: SI Shrink Instructions 658; GCN-O1-OPTS-NEXT: SI post-RA bundler 659; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 660; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 661; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler 662; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 663; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 664; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement 665; GCN-O1-OPTS-NEXT: Insert fentry calls 666; GCN-O1-OPTS-NEXT: Insert XRay ops 667; GCN-O1-OPTS-NEXT: SI Memory Legalizer 668; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 669; GCN-O1-OPTS-NEXT: SI insert wait instructions 670; GCN-O1-OPTS-NEXT: Insert required mode register values 671; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses 672; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 673; GCN-O1-OPTS-NEXT: SI Final Branch Preparation 674; GCN-O1-OPTS-NEXT: SI peephole optimizations 675; GCN-O1-OPTS-NEXT: Post RA hazard recognizer 676; GCN-O1-OPTS-NEXT: Branch relaxation pass 677; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass 678; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis 679; GCN-O1-OPTS-NEXT: Function register usage analysis 680; GCN-O1-OPTS-NEXT: FunctionPass Manager 681; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 682; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 683; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer 684; GCN-O1-OPTS-NEXT: Free MachineFunction 685; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree 686; GCN-O1-OPTS-NEXT: FunctionPass Manager 687; GCN-O1-OPTS-NEXT: Dominator Tree Construction 688 689; GCN-O2:Target Library Information 690; GCN-O2-NEXT:Target Pass Configuration 691; GCN-O2-NEXT:Machine Module Information 692; GCN-O2-NEXT:Target Transform Information 693; GCN-O2-NEXT:Assumption Cache Tracker 694; GCN-O2-NEXT:Profile summary info 695; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis 696; GCN-O2-NEXT:External Alias Analysis 697; GCN-O2-NEXT:Type-Based Alias Analysis 698; GCN-O2-NEXT:Scoped NoAlias Alias Analysis 699; GCN-O2-NEXT:Argument Register Usage Information Storage 700; GCN-O2-NEXT:Create Garbage Collector Module Metadata 701; GCN-O2-NEXT:Machine Branch Probability Analysis 702; GCN-O2-NEXT:Register Usage Information Storage 703; GCN-O2-NEXT:Default Regalloc Eviction Advisor 704; GCN-O2-NEXT: ModulePass Manager 705; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering 706; GCN-O2-NEXT: AMDGPU Printf lowering 707; GCN-O2-NEXT: FunctionPass Manager 708; GCN-O2-NEXT: Dominator Tree Construction 709; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU 710; GCN-O2-NEXT: FunctionPass Manager 711; GCN-O2-NEXT: Early propagate attributes from kernels to functions 712; GCN-O2-NEXT: AMDGPU Lower Intrinsics 713; GCN-O2-NEXT: AMDGPU Inline All Functions 714; GCN-O2-NEXT: CallGraph Construction 715; GCN-O2-NEXT: Call Graph SCC Pass Manager 716; GCN-O2-NEXT: Inliner for always_inline functions 717; GCN-O2-NEXT: A No-Op Barrier Pass 718; GCN-O2-NEXT: Lower OpenCL enqueued blocks 719; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions 720; GCN-O2-NEXT: FunctionPass Manager 721; GCN-O2-NEXT: Infer address spaces 722; GCN-O2-NEXT: Expand Atomic instructions 723; GCN-O2-NEXT: AMDGPU Promote Alloca 724; GCN-O2-NEXT: Dominator Tree Construction 725; GCN-O2-NEXT: SROA 726; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 727; GCN-O2-NEXT: Function Alias Analysis Results 728; GCN-O2-NEXT: Memory SSA 729; GCN-O2-NEXT: Natural Loop Information 730; GCN-O2-NEXT: Canonicalize natural loops 731; GCN-O2-NEXT: LCSSA Verifier 732; GCN-O2-NEXT: Loop-Closed SSA Form Pass 733; GCN-O2-NEXT: Scalar Evolution Analysis 734; GCN-O2-NEXT: Lazy Branch Probability Analysis 735; GCN-O2-NEXT: Lazy Block Frequency Analysis 736; GCN-O2-NEXT: Loop Pass Manager 737; GCN-O2-NEXT: Loop Invariant Code Motion 738; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 739; GCN-O2-NEXT: Speculatively execute instructions 740; GCN-O2-NEXT: Scalar Evolution Analysis 741; GCN-O2-NEXT: Straight line strength reduction 742; GCN-O2-NEXT: Early CSE 743; GCN-O2-NEXT: Scalar Evolution Analysis 744; GCN-O2-NEXT: Nary reassociation 745; GCN-O2-NEXT: Early CSE 746; GCN-O2-NEXT: Post-Dominator Tree Construction 747; GCN-O2-NEXT: Legacy Divergence Analysis 748; GCN-O2-NEXT: AMDGPU IR optimizations 749; GCN-O2-NEXT: Canonicalize natural loops 750; GCN-O2-NEXT: Scalar Evolution Analysis 751; GCN-O2-NEXT: Loop Pass Manager 752; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops 753; GCN-O2-NEXT: Induction Variable Users 754; GCN-O2-NEXT: Loop Strength Reduction 755; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 756; GCN-O2-NEXT: Function Alias Analysis Results 757; GCN-O2-NEXT: Merge contiguous icmps into a memcmp 758; GCN-O2-NEXT: Natural Loop Information 759; GCN-O2-NEXT: Lazy Branch Probability Analysis 760; GCN-O2-NEXT: Lazy Block Frequency Analysis 761; GCN-O2-NEXT: Expand memcmp() to load/stores 762; GCN-O2-NEXT: Lower constant intrinsics 763; GCN-O2-NEXT: Remove unreachable blocks from the CFG 764; GCN-O2-NEXT: Natural Loop Information 765; GCN-O2-NEXT: Post-Dominator Tree Construction 766; GCN-O2-NEXT: Branch Probability Analysis 767; GCN-O2-NEXT: Block Frequency Analysis 768; GCN-O2-NEXT: Constant Hoisting 769; GCN-O2-NEXT: Replace intrinsics with calls to vector library 770; GCN-O2-NEXT: Partially inline calls to library functions 771; GCN-O2-NEXT: Expand vector predication intrinsics 772; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics 773; GCN-O2-NEXT: Expand reduction intrinsics 774; GCN-O2-NEXT: Natural Loop Information 775; GCN-O2-NEXT: TLS Variable Hoist 776; GCN-O2-NEXT: Early CSE 777; GCN-O2-NEXT: AMDGPU Attributor 778; GCN-O2-NEXT: CallGraph Construction 779; GCN-O2-NEXT: Call Graph SCC Pass Manager 780; GCN-O2-NEXT: AMDGPU Annotate Kernel Features 781; GCN-O2-NEXT: FunctionPass Manager 782; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments 783; GCN-O2-NEXT: Dominator Tree Construction 784; GCN-O2-NEXT: Natural Loop Information 785; GCN-O2-NEXT: CodeGen Prepare 786; GCN-O2-NEXT: Dominator Tree Construction 787; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 788; GCN-O2-NEXT: Function Alias Analysis Results 789; GCN-O2-NEXT: Natural Loop Information 790; GCN-O2-NEXT: Scalar Evolution Analysis 791; GCN-O2-NEXT: GPU Load and Store Vectorizer 792; GCN-O2-NEXT: Lazy Value Information Analysis 793; GCN-O2-NEXT: Lower SwitchInst's to branches 794; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators 795; GCN-O2-NEXT: Remove unreachable blocks from the CFG 796; GCN-O2-NEXT: Dominator Tree Construction 797; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 798; GCN-O2-NEXT: Function Alias Analysis Results 799; GCN-O2-NEXT: Flatten the CFG 800; GCN-O2-NEXT: Dominator Tree Construction 801; GCN-O2-NEXT: Post-Dominator Tree Construction 802; GCN-O2-NEXT: Natural Loop Information 803; GCN-O2-NEXT: Legacy Divergence Analysis 804; GCN-O2-NEXT: AMDGPU IR late optimizations 805; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 806; GCN-O2-NEXT: Function Alias Analysis Results 807; GCN-O2-NEXT: Code sinking 808; GCN-O2-NEXT: Legacy Divergence Analysis 809; GCN-O2-NEXT: Unify divergent function exit nodes 810; GCN-O2-NEXT: Lazy Value Information Analysis 811; GCN-O2-NEXT: Lower SwitchInst's to branches 812; GCN-O2-NEXT: Dominator Tree Construction 813; GCN-O2-NEXT: Natural Loop Information 814; GCN-O2-NEXT: Convert irreducible control-flow into natural loops 815; GCN-O2-NEXT: Fixup each natural loop to have a single exit block 816; GCN-O2-NEXT: Post-Dominator Tree Construction 817; GCN-O2-NEXT: Dominance Frontier Construction 818; GCN-O2-NEXT: Detect single entry single exit regions 819; GCN-O2-NEXT: Region Pass Manager 820; GCN-O2-NEXT: Structurize control flow 821; GCN-O2-NEXT: Post-Dominator Tree Construction 822; GCN-O2-NEXT: Natural Loop Information 823; GCN-O2-NEXT: Legacy Divergence Analysis 824; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 825; GCN-O2-NEXT: Function Alias Analysis Results 826; GCN-O2-NEXT: Memory SSA 827; GCN-O2-NEXT: AMDGPU Annotate Uniform Values 828; GCN-O2-NEXT: SI annotate control flow 829; GCN-O2-NEXT: LCSSA Verifier 830; GCN-O2-NEXT: Loop-Closed SSA Form Pass 831; GCN-O2-NEXT: Analysis if a function is memory bound 832; GCN-O2-NEXT: DummyCGSCCPass 833; GCN-O2-NEXT: FunctionPass Manager 834; GCN-O2-NEXT: Safe Stack instrumentation pass 835; GCN-O2-NEXT: Insert stack protectors 836; GCN-O2-NEXT: Dominator Tree Construction 837; GCN-O2-NEXT: Post-Dominator Tree Construction 838; GCN-O2-NEXT: Natural Loop Information 839; GCN-O2-NEXT: Legacy Divergence Analysis 840; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 841; GCN-O2-NEXT: Function Alias Analysis Results 842; GCN-O2-NEXT: Branch Probability Analysis 843; GCN-O2-NEXT: Lazy Branch Probability Analysis 844; GCN-O2-NEXT: Lazy Block Frequency Analysis 845; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 846; GCN-O2-NEXT: MachineDominator Tree Construction 847; GCN-O2-NEXT: SI Fix SGPR copies 848; GCN-O2-NEXT: MachinePostDominator Tree Construction 849; GCN-O2-NEXT: SI Lower i1 Copies 850; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions 851; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 852; GCN-O2-NEXT: Early Tail Duplication 853; GCN-O2-NEXT: Optimize machine instruction PHIs 854; GCN-O2-NEXT: Slot index numbering 855; GCN-O2-NEXT: Merge disjoint stack slots 856; GCN-O2-NEXT: Local Stack Slot Allocation 857; GCN-O2-NEXT: Remove dead machine instructions 858; GCN-O2-NEXT: MachineDominator Tree Construction 859; GCN-O2-NEXT: Machine Natural Loop Construction 860; GCN-O2-NEXT: Machine Block Frequency Analysis 861; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 862; GCN-O2-NEXT: MachineDominator Tree Construction 863; GCN-O2-NEXT: Machine Block Frequency Analysis 864; GCN-O2-NEXT: Machine Common Subexpression Elimination 865; GCN-O2-NEXT: MachinePostDominator Tree Construction 866; GCN-O2-NEXT: Machine Cycle Info Analysis 867; GCN-O2-NEXT: Machine code sinking 868; GCN-O2-NEXT: Peephole Optimizations 869; GCN-O2-NEXT: Remove dead machine instructions 870; GCN-O2-NEXT: SI Fold Operands 871; GCN-O2-NEXT: GCN DPP Combine 872; GCN-O2-NEXT: SI Load Store Optimizer 873; GCN-O2-NEXT: SI Peephole SDWA 874; GCN-O2-NEXT: Machine Block Frequency Analysis 875; GCN-O2-NEXT: MachineDominator Tree Construction 876; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 877; GCN-O2-NEXT: MachineDominator Tree Construction 878; GCN-O2-NEXT: Machine Block Frequency Analysis 879; GCN-O2-NEXT: Machine Common Subexpression Elimination 880; GCN-O2-NEXT: SI Fold Operands 881; GCN-O2-NEXT: Remove dead machine instructions 882; GCN-O2-NEXT: SI Shrink Instructions 883; GCN-O2-NEXT: Register Usage Information Propagation 884; GCN-O2-NEXT: Detect Dead Lanes 885; GCN-O2-NEXT: Remove dead machine instructions 886; GCN-O2-NEXT: Process Implicit Definitions 887; GCN-O2-NEXT: Remove unreachable machine basic blocks 888; GCN-O2-NEXT: Live Variable Analysis 889; GCN-O2-NEXT: SI Optimize VGPR LiveRange 890; GCN-O2-NEXT: Eliminate PHI nodes for register allocation 891; GCN-O2-NEXT: SI Lower control flow pseudo instructions 892; GCN-O2-NEXT: Two-Address instruction pass 893; GCN-O2-NEXT: Slot index numbering 894; GCN-O2-NEXT: Live Interval Analysis 895; GCN-O2-NEXT: Machine Natural Loop Construction 896; GCN-O2-NEXT: Simple Register Coalescing 897; GCN-O2-NEXT: Rename Disconnected Subregister Components 898; GCN-O2-NEXT: AMDGPU Pre-RA optimizations 899; GCN-O2-NEXT: Machine Instruction Scheduler 900; GCN-O2-NEXT: MachinePostDominator Tree Construction 901; GCN-O2-NEXT: SI Whole Quad Mode 902; GCN-O2-NEXT: Virtual Register Map 903; GCN-O2-NEXT: Live Register Matrix 904; GCN-O2-NEXT: SI Pre-allocate WWM Registers 905; GCN-O2-NEXT: SI optimize exec mask operations pre-RA 906; GCN-O2-NEXT: SI Form memory clauses 907; GCN-O2-NEXT: Machine Natural Loop Construction 908; GCN-O2-NEXT: Machine Block Frequency Analysis 909; GCN-O2-NEXT: Debug Variable Analysis 910; GCN-O2-NEXT: Live Stack Slot Analysis 911; GCN-O2-NEXT: Virtual Register Map 912; GCN-O2-NEXT: Live Register Matrix 913; GCN-O2-NEXT: Bundle Machine CFG Edges 914; GCN-O2-NEXT: Spill Code Placement Analysis 915; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 916; GCN-O2-NEXT: Machine Optimization Remark Emitter 917; GCN-O2-NEXT: Greedy Register Allocator 918; GCN-O2-NEXT: Virtual Register Rewriter 919; GCN-O2-NEXT: SI lower SGPR spill instructions 920; GCN-O2-NEXT: Virtual Register Map 921; GCN-O2-NEXT: Live Register Matrix 922; GCN-O2-NEXT: Greedy Register Allocator 923; GCN-O2-NEXT: GCN NSA Reassign 924; GCN-O2-NEXT: Virtual Register Rewriter 925; GCN-O2-NEXT: Stack Slot Coloring 926; GCN-O2-NEXT: Machine Copy Propagation Pass 927; GCN-O2-NEXT: Machine Loop Invariant Code Motion 928; GCN-O2-NEXT: SI Fix VGPR copies 929; GCN-O2-NEXT: SI optimize exec mask operations 930; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis 931; GCN-O2-NEXT: Fixup Statepoint Caller Saved 932; GCN-O2-NEXT: PostRA Machine Sink 933; GCN-O2-NEXT: MachineDominator Tree Construction 934; GCN-O2-NEXT: Machine Natural Loop Construction 935; GCN-O2-NEXT: Machine Block Frequency Analysis 936; GCN-O2-NEXT: MachinePostDominator Tree Construction 937; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 938; GCN-O2-NEXT: Machine Optimization Remark Emitter 939; GCN-O2-NEXT: Shrink Wrapping analysis 940; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization 941; GCN-O2-NEXT: Control Flow Optimizer 942; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 943; GCN-O2-NEXT: Tail Duplication 944; GCN-O2-NEXT: Machine Copy Propagation Pass 945; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass 946; GCN-O2-NEXT: SI Shrink Instructions 947; GCN-O2-NEXT: SI post-RA bundler 948; GCN-O2-NEXT: MachineDominator Tree Construction 949; GCN-O2-NEXT: Machine Natural Loop Construction 950; GCN-O2-NEXT: PostRA Machine Instruction Scheduler 951; GCN-O2-NEXT: Machine Block Frequency Analysis 952; GCN-O2-NEXT: MachinePostDominator Tree Construction 953; GCN-O2-NEXT: Branch Probability Basic Block Placement 954; GCN-O2-NEXT: Insert fentry calls 955; GCN-O2-NEXT: Insert XRay ops 956; GCN-O2-NEXT: SI Memory Legalizer 957; GCN-O2-NEXT: MachinePostDominator Tree Construction 958; GCN-O2-NEXT: SI insert wait instructions 959; GCN-O2-NEXT: Insert required mode register values 960; GCN-O2-NEXT: SI Insert Hard Clauses 961; GCN-O2-NEXT: MachineDominator Tree Construction 962; GCN-O2-NEXT: SI Final Branch Preparation 963; GCN-O2-NEXT: SI peephole optimizations 964; GCN-O2-NEXT: Post RA hazard recognizer 965; GCN-O2-NEXT: Branch relaxation pass 966; GCN-O2-NEXT: Register Usage Information Collector Pass 967; GCN-O2-NEXT: Live DEBUG_VALUE analysis 968; GCN-O2-NEXT: Function register usage analysis 969; GCN-O2-NEXT: FunctionPass Manager 970; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 971; GCN-O2-NEXT: Machine Optimization Remark Emitter 972; GCN-O2-NEXT: AMDGPU Assembly Printer 973; GCN-O2-NEXT: Free MachineFunction 974; GCN-O2-NEXT:Pass Arguments: -domtree 975; GCN-O2-NEXT: FunctionPass Manager 976; GCN-O2-NEXT: Dominator Tree Construction 977 978; GCN-O3:Target Library Information 979; GCN-O3-NEXT:Target Pass Configuration 980; GCN-O3-NEXT:Machine Module Information 981; GCN-O3-NEXT:Target Transform Information 982; GCN-O3-NEXT:Assumption Cache Tracker 983; GCN-O3-NEXT:Profile summary info 984; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis 985; GCN-O3-NEXT:External Alias Analysis 986; GCN-O3-NEXT:Type-Based Alias Analysis 987; GCN-O3-NEXT:Scoped NoAlias Alias Analysis 988; GCN-O3-NEXT:Argument Register Usage Information Storage 989; GCN-O3-NEXT:Create Garbage Collector Module Metadata 990; GCN-O3-NEXT:Machine Branch Probability Analysis 991; GCN-O3-NEXT:Register Usage Information Storage 992; GCN-O3-NEXT:Default Regalloc Eviction Advisor 993; GCN-O3-NEXT: ModulePass Manager 994; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering 995; GCN-O3-NEXT: AMDGPU Printf lowering 996; GCN-O3-NEXT: FunctionPass Manager 997; GCN-O3-NEXT: Dominator Tree Construction 998; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU 999; GCN-O3-NEXT: FunctionPass Manager 1000; GCN-O3-NEXT: Early propagate attributes from kernels to functions 1001; GCN-O3-NEXT: AMDGPU Lower Intrinsics 1002; GCN-O3-NEXT: AMDGPU Inline All Functions 1003; GCN-O3-NEXT: CallGraph Construction 1004; GCN-O3-NEXT: Call Graph SCC Pass Manager 1005; GCN-O3-NEXT: Inliner for always_inline functions 1006; GCN-O3-NEXT: A No-Op Barrier Pass 1007; GCN-O3-NEXT: Lower OpenCL enqueued blocks 1008; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions 1009; GCN-O3-NEXT: FunctionPass Manager 1010; GCN-O3-NEXT: Infer address spaces 1011; GCN-O3-NEXT: Expand Atomic instructions 1012; GCN-O3-NEXT: AMDGPU Promote Alloca 1013; GCN-O3-NEXT: Dominator Tree Construction 1014; GCN-O3-NEXT: SROA 1015; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1016; GCN-O3-NEXT: Function Alias Analysis Results 1017; GCN-O3-NEXT: Memory SSA 1018; GCN-O3-NEXT: Natural Loop Information 1019; GCN-O3-NEXT: Canonicalize natural loops 1020; GCN-O3-NEXT: LCSSA Verifier 1021; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1022; GCN-O3-NEXT: Scalar Evolution Analysis 1023; GCN-O3-NEXT: Lazy Branch Probability Analysis 1024; GCN-O3-NEXT: Lazy Block Frequency Analysis 1025; GCN-O3-NEXT: Loop Pass Manager 1026; GCN-O3-NEXT: Loop Invariant Code Motion 1027; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 1028; GCN-O3-NEXT: Speculatively execute instructions 1029; GCN-O3-NEXT: Scalar Evolution Analysis 1030; GCN-O3-NEXT: Straight line strength reduction 1031; GCN-O3-NEXT: Phi Values Analysis 1032; GCN-O3-NEXT: Function Alias Analysis Results 1033; GCN-O3-NEXT: Memory Dependence Analysis 1034; GCN-O3-NEXT: Optimization Remark Emitter 1035; GCN-O3-NEXT: Global Value Numbering 1036; GCN-O3-NEXT: Scalar Evolution Analysis 1037; GCN-O3-NEXT: Nary reassociation 1038; GCN-O3-NEXT: Early CSE 1039; GCN-O3-NEXT: Post-Dominator Tree Construction 1040; GCN-O3-NEXT: Legacy Divergence Analysis 1041; GCN-O3-NEXT: AMDGPU IR optimizations 1042; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1043; GCN-O3-NEXT: Canonicalize natural loops 1044; GCN-O3-NEXT: Scalar Evolution Analysis 1045; GCN-O3-NEXT: Loop Pass Manager 1046; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops 1047; GCN-O3-NEXT: Induction Variable Users 1048; GCN-O3-NEXT: Loop Strength Reduction 1049; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1050; GCN-O3-NEXT: Function Alias Analysis Results 1051; GCN-O3-NEXT: Merge contiguous icmps into a memcmp 1052; GCN-O3-NEXT: Natural Loop Information 1053; GCN-O3-NEXT: Lazy Branch Probability Analysis 1054; GCN-O3-NEXT: Lazy Block Frequency Analysis 1055; GCN-O3-NEXT: Expand memcmp() to load/stores 1056; GCN-O3-NEXT: Lower constant intrinsics 1057; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1058; GCN-O3-NEXT: Natural Loop Information 1059; GCN-O3-NEXT: Post-Dominator Tree Construction 1060; GCN-O3-NEXT: Branch Probability Analysis 1061; GCN-O3-NEXT: Block Frequency Analysis 1062; GCN-O3-NEXT: Constant Hoisting 1063; GCN-O3-NEXT: Replace intrinsics with calls to vector library 1064; GCN-O3-NEXT: Partially inline calls to library functions 1065; GCN-O3-NEXT: Expand vector predication intrinsics 1066; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics 1067; GCN-O3-NEXT: Expand reduction intrinsics 1068; GCN-O3-NEXT: Natural Loop Information 1069; GCN-O3-NEXT: TLS Variable Hoist 1070; GCN-O3-NEXT: Phi Values Analysis 1071; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1072; GCN-O3-NEXT: Function Alias Analysis Results 1073; GCN-O3-NEXT: Memory Dependence Analysis 1074; GCN-O3-NEXT: Lazy Branch Probability Analysis 1075; GCN-O3-NEXT: Lazy Block Frequency Analysis 1076; GCN-O3-NEXT: Optimization Remark Emitter 1077; GCN-O3-NEXT: Global Value Numbering 1078; GCN-O3-NEXT: AMDGPU Attributor 1079; GCN-O3-NEXT: CallGraph Construction 1080; GCN-O3-NEXT: Call Graph SCC Pass Manager 1081; GCN-O3-NEXT: AMDGPU Annotate Kernel Features 1082; GCN-O3-NEXT: FunctionPass Manager 1083; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments 1084; GCN-O3-NEXT: Dominator Tree Construction 1085; GCN-O3-NEXT: Natural Loop Information 1086; GCN-O3-NEXT: CodeGen Prepare 1087; GCN-O3-NEXT: Dominator Tree Construction 1088; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1089; GCN-O3-NEXT: Function Alias Analysis Results 1090; GCN-O3-NEXT: Natural Loop Information 1091; GCN-O3-NEXT: Scalar Evolution Analysis 1092; GCN-O3-NEXT: GPU Load and Store Vectorizer 1093; GCN-O3-NEXT: Lazy Value Information Analysis 1094; GCN-O3-NEXT: Lower SwitchInst's to branches 1095; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators 1096; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1097; GCN-O3-NEXT: Dominator Tree Construction 1098; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1099; GCN-O3-NEXT: Function Alias Analysis Results 1100; GCN-O3-NEXT: Flatten the CFG 1101; GCN-O3-NEXT: Dominator Tree Construction 1102; GCN-O3-NEXT: Post-Dominator Tree Construction 1103; GCN-O3-NEXT: Natural Loop Information 1104; GCN-O3-NEXT: Legacy Divergence Analysis 1105; GCN-O3-NEXT: AMDGPU IR late optimizations 1106; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1107; GCN-O3-NEXT: Function Alias Analysis Results 1108; GCN-O3-NEXT: Code sinking 1109; GCN-O3-NEXT: Legacy Divergence Analysis 1110; GCN-O3-NEXT: Unify divergent function exit nodes 1111; GCN-O3-NEXT: Lazy Value Information Analysis 1112; GCN-O3-NEXT: Lower SwitchInst's to branches 1113; GCN-O3-NEXT: Dominator Tree Construction 1114; GCN-O3-NEXT: Natural Loop Information 1115; GCN-O3-NEXT: Convert irreducible control-flow into natural loops 1116; GCN-O3-NEXT: Fixup each natural loop to have a single exit block 1117; GCN-O3-NEXT: Post-Dominator Tree Construction 1118; GCN-O3-NEXT: Dominance Frontier Construction 1119; GCN-O3-NEXT: Detect single entry single exit regions 1120; GCN-O3-NEXT: Region Pass Manager 1121; GCN-O3-NEXT: Structurize control flow 1122; GCN-O3-NEXT: Post-Dominator Tree Construction 1123; GCN-O3-NEXT: Natural Loop Information 1124; GCN-O3-NEXT: Legacy Divergence Analysis 1125; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1126; GCN-O3-NEXT: Function Alias Analysis Results 1127; GCN-O3-NEXT: Memory SSA 1128; GCN-O3-NEXT: AMDGPU Annotate Uniform Values 1129; GCN-O3-NEXT: SI annotate control flow 1130; GCN-O3-NEXT: LCSSA Verifier 1131; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1132; GCN-O3-NEXT: Analysis if a function is memory bound 1133; GCN-O3-NEXT: DummyCGSCCPass 1134; GCN-O3-NEXT: FunctionPass Manager 1135; GCN-O3-NEXT: Safe Stack instrumentation pass 1136; GCN-O3-NEXT: Insert stack protectors 1137; GCN-O3-NEXT: Dominator Tree Construction 1138; GCN-O3-NEXT: Post-Dominator Tree Construction 1139; GCN-O3-NEXT: Natural Loop Information 1140; GCN-O3-NEXT: Legacy Divergence Analysis 1141; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1142; GCN-O3-NEXT: Function Alias Analysis Results 1143; GCN-O3-NEXT: Branch Probability Analysis 1144; GCN-O3-NEXT: Lazy Branch Probability Analysis 1145; GCN-O3-NEXT: Lazy Block Frequency Analysis 1146; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 1147; GCN-O3-NEXT: MachineDominator Tree Construction 1148; GCN-O3-NEXT: SI Fix SGPR copies 1149; GCN-O3-NEXT: MachinePostDominator Tree Construction 1150; GCN-O3-NEXT: SI Lower i1 Copies 1151; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions 1152; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1153; GCN-O3-NEXT: Early Tail Duplication 1154; GCN-O3-NEXT: Optimize machine instruction PHIs 1155; GCN-O3-NEXT: Slot index numbering 1156; GCN-O3-NEXT: Merge disjoint stack slots 1157; GCN-O3-NEXT: Local Stack Slot Allocation 1158; GCN-O3-NEXT: Remove dead machine instructions 1159; GCN-O3-NEXT: MachineDominator Tree Construction 1160; GCN-O3-NEXT: Machine Natural Loop Construction 1161; GCN-O3-NEXT: Machine Block Frequency Analysis 1162; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1163; GCN-O3-NEXT: MachineDominator Tree Construction 1164; GCN-O3-NEXT: Machine Block Frequency Analysis 1165; GCN-O3-NEXT: Machine Common Subexpression Elimination 1166; GCN-O3-NEXT: MachinePostDominator Tree Construction 1167; GCN-O3-NEXT: Machine Cycle Info Analysis 1168; GCN-O3-NEXT: Machine code sinking 1169; GCN-O3-NEXT: Peephole Optimizations 1170; GCN-O3-NEXT: Remove dead machine instructions 1171; GCN-O3-NEXT: SI Fold Operands 1172; GCN-O3-NEXT: GCN DPP Combine 1173; GCN-O3-NEXT: SI Load Store Optimizer 1174; GCN-O3-NEXT: SI Peephole SDWA 1175; GCN-O3-NEXT: Machine Block Frequency Analysis 1176; GCN-O3-NEXT: MachineDominator Tree Construction 1177; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1178; GCN-O3-NEXT: MachineDominator Tree Construction 1179; GCN-O3-NEXT: Machine Block Frequency Analysis 1180; GCN-O3-NEXT: Machine Common Subexpression Elimination 1181; GCN-O3-NEXT: SI Fold Operands 1182; GCN-O3-NEXT: Remove dead machine instructions 1183; GCN-O3-NEXT: SI Shrink Instructions 1184; GCN-O3-NEXT: Register Usage Information Propagation 1185; GCN-O3-NEXT: Detect Dead Lanes 1186; GCN-O3-NEXT: Remove dead machine instructions 1187; GCN-O3-NEXT: Process Implicit Definitions 1188; GCN-O3-NEXT: Remove unreachable machine basic blocks 1189; GCN-O3-NEXT: Live Variable Analysis 1190; GCN-O3-NEXT: SI Optimize VGPR LiveRange 1191; GCN-O3-NEXT: Eliminate PHI nodes for register allocation 1192; GCN-O3-NEXT: SI Lower control flow pseudo instructions 1193; GCN-O3-NEXT: Two-Address instruction pass 1194; GCN-O3-NEXT: Slot index numbering 1195; GCN-O3-NEXT: Live Interval Analysis 1196; GCN-O3-NEXT: Machine Natural Loop Construction 1197; GCN-O3-NEXT: Simple Register Coalescing 1198; GCN-O3-NEXT: Rename Disconnected Subregister Components 1199; GCN-O3-NEXT: AMDGPU Pre-RA optimizations 1200; GCN-O3-NEXT: Machine Instruction Scheduler 1201; GCN-O3-NEXT: MachinePostDominator Tree Construction 1202; GCN-O3-NEXT: SI Whole Quad Mode 1203; GCN-O3-NEXT: Virtual Register Map 1204; GCN-O3-NEXT: Live Register Matrix 1205; GCN-O3-NEXT: SI Pre-allocate WWM Registers 1206; GCN-O3-NEXT: SI optimize exec mask operations pre-RA 1207; GCN-O3-NEXT: SI Form memory clauses 1208; GCN-O3-NEXT: Machine Natural Loop Construction 1209; GCN-O3-NEXT: Machine Block Frequency Analysis 1210; GCN-O3-NEXT: Debug Variable Analysis 1211; GCN-O3-NEXT: Live Stack Slot Analysis 1212; GCN-O3-NEXT: Virtual Register Map 1213; GCN-O3-NEXT: Live Register Matrix 1214; GCN-O3-NEXT: Bundle Machine CFG Edges 1215; GCN-O3-NEXT: Spill Code Placement Analysis 1216; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1217; GCN-O3-NEXT: Machine Optimization Remark Emitter 1218; GCN-O3-NEXT: Greedy Register Allocator 1219; GCN-O3-NEXT: Virtual Register Rewriter 1220; GCN-O3-NEXT: SI lower SGPR spill instructions 1221; GCN-O3-NEXT: Virtual Register Map 1222; GCN-O3-NEXT: Live Register Matrix 1223; GCN-O3-NEXT: Greedy Register Allocator 1224; GCN-O3-NEXT: GCN NSA Reassign 1225; GCN-O3-NEXT: Virtual Register Rewriter 1226; GCN-O3-NEXT: Stack Slot Coloring 1227; GCN-O3-NEXT: Machine Copy Propagation Pass 1228; GCN-O3-NEXT: Machine Loop Invariant Code Motion 1229; GCN-O3-NEXT: SI Fix VGPR copies 1230; GCN-O3-NEXT: SI optimize exec mask operations 1231; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis 1232; GCN-O3-NEXT: Fixup Statepoint Caller Saved 1233; GCN-O3-NEXT: PostRA Machine Sink 1234; GCN-O3-NEXT: MachineDominator Tree Construction 1235; GCN-O3-NEXT: Machine Natural Loop Construction 1236; GCN-O3-NEXT: Machine Block Frequency Analysis 1237; GCN-O3-NEXT: MachinePostDominator Tree Construction 1238; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1239; GCN-O3-NEXT: Machine Optimization Remark Emitter 1240; GCN-O3-NEXT: Shrink Wrapping analysis 1241; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization 1242; GCN-O3-NEXT: Control Flow Optimizer 1243; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1244; GCN-O3-NEXT: Tail Duplication 1245; GCN-O3-NEXT: Machine Copy Propagation Pass 1246; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass 1247; GCN-O3-NEXT: SI Shrink Instructions 1248; GCN-O3-NEXT: SI post-RA bundler 1249; GCN-O3-NEXT: MachineDominator Tree Construction 1250; GCN-O3-NEXT: Machine Natural Loop Construction 1251; GCN-O3-NEXT: PostRA Machine Instruction Scheduler 1252; GCN-O3-NEXT: Machine Block Frequency Analysis 1253; GCN-O3-NEXT: MachinePostDominator Tree Construction 1254; GCN-O3-NEXT: Branch Probability Basic Block Placement 1255; GCN-O3-NEXT: Insert fentry calls 1256; GCN-O3-NEXT: Insert XRay ops 1257; GCN-O3-NEXT: SI Memory Legalizer 1258; GCN-O3-NEXT: MachinePostDominator Tree Construction 1259; GCN-O3-NEXT: SI insert wait instructions 1260; GCN-O3-NEXT: Insert required mode register values 1261; GCN-O3-NEXT: SI Insert Hard Clauses 1262; GCN-O3-NEXT: MachineDominator Tree Construction 1263; GCN-O3-NEXT: SI Final Branch Preparation 1264; GCN-O3-NEXT: SI peephole optimizations 1265; GCN-O3-NEXT: Post RA hazard recognizer 1266; GCN-O3-NEXT: Branch relaxation pass 1267; GCN-O3-NEXT: Register Usage Information Collector Pass 1268; GCN-O3-NEXT: Live DEBUG_VALUE analysis 1269; GCN-O3-NEXT: Function register usage analysis 1270; GCN-O3-NEXT: FunctionPass Manager 1271; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1272; GCN-O3-NEXT: Machine Optimization Remark Emitter 1273; GCN-O3-NEXT: AMDGPU Assembly Printer 1274; GCN-O3-NEXT: Free MachineFunction 1275; GCN-O3-NEXT:Pass Arguments: -domtree 1276; GCN-O3-NEXT: FunctionPass Manager 1277; GCN-O3-NEXT: Dominator Tree Construction 1278 1279define void @empty() { 1280 ret void 1281} 1282