1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s 5; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s 7; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \ 8; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \ 9; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s 10; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 11; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s 12; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 13; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s 14 15; REQUIRES: asserts 16 17; GCN-O0:Target Library Information 18; GCN-O0-NEXT:Target Pass Configuration 19; GCN-O0-NEXT:Machine Module Information 20; GCN-O0-NEXT:Target Transform Information 21; GCN-O0-NEXT:Assumption Cache Tracker 22; GCN-O0-NEXT:Profile summary info 23; GCN-O0-NEXT:Argument Register Usage Information Storage 24; GCN-O0-NEXT:Create Garbage Collector Module Metadata 25; GCN-O0-NEXT:Register Usage Information Storage 26; GCN-O0-NEXT:Machine Branch Probability Analysis 27; GCN-O0-NEXT: ModulePass Manager 28; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering 29; GCN-O0-NEXT: AMDGPU Printf lowering 30; GCN-O0-NEXT: FunctionPass Manager 31; GCN-O0-NEXT: Dominator Tree Construction 32; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU 33; GCN-O0-NEXT: FunctionPass Manager 34; GCN-O0-NEXT: Early propagate attributes from kernels to functions 35; GCN-O0-NEXT: AMDGPU Lower Intrinsics 36; GCN-O0-NEXT: AMDGPU Inline All Functions 37; GCN-O0-NEXT: CallGraph Construction 38; GCN-O0-NEXT: Call Graph SCC Pass Manager 39; GCN-O0-NEXT: Inliner for always_inline functions 40; GCN-O0-NEXT: A No-Op Barrier Pass 41; GCN-O0-NEXT: Lower OpenCL enqueued blocks 42; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions 43; GCN-O0-NEXT: FunctionPass Manager 44; GCN-O0-NEXT: Expand Atomic instructions 45; GCN-O0-NEXT: Lower constant intrinsics 46; GCN-O0-NEXT: Remove unreachable blocks from the CFG 47; GCN-O0-NEXT: Expand vector predication intrinsics 48; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics 49; GCN-O0-NEXT: Expand reduction intrinsics 50; GCN-O0-NEXT: AMDGPU Attributor 51; GCN-O0-NEXT: CallGraph Construction 52; GCN-O0-NEXT: Call Graph SCC Pass Manager 53; GCN-O0-NEXT: AMDGPU Annotate Kernel Features 54; GCN-O0-NEXT: FunctionPass Manager 55; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments 56; GCN-O0-NEXT: Lazy Value Information Analysis 57; GCN-O0-NEXT: Lower SwitchInst's to branches 58; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators 59; GCN-O0-NEXT: Remove unreachable blocks from the CFG 60; GCN-O0-NEXT: Post-Dominator Tree Construction 61; GCN-O0-NEXT: Dominator Tree Construction 62; GCN-O0-NEXT: Natural Loop Information 63; GCN-O0-NEXT: Legacy Divergence Analysis 64; GCN-O0-NEXT: Unify divergent function exit nodes 65; GCN-O0-NEXT: Lazy Value Information Analysis 66; GCN-O0-NEXT: Lower SwitchInst's to branches 67; GCN-O0-NEXT: Dominator Tree Construction 68; GCN-O0-NEXT: Natural Loop Information 69; GCN-O0-NEXT: Convert irreducible control-flow into natural loops 70; GCN-O0-NEXT: Fixup each natural loop to have a single exit block 71; GCN-O0-NEXT: Post-Dominator Tree Construction 72; GCN-O0-NEXT: Dominance Frontier Construction 73; GCN-O0-NEXT: Detect single entry single exit regions 74; GCN-O0-NEXT: Region Pass Manager 75; GCN-O0-NEXT: Structurize control flow 76; GCN-O0-NEXT: Post-Dominator Tree Construction 77; GCN-O0-NEXT: Natural Loop Information 78; GCN-O0-NEXT: Legacy Divergence Analysis 79; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 80; GCN-O0-NEXT: Function Alias Analysis Results 81; GCN-O0-NEXT: Memory SSA 82; GCN-O0-NEXT: AMDGPU Annotate Uniform Values 83; GCN-O0-NEXT: SI annotate control flow 84; GCN-O0-NEXT: LCSSA Verifier 85; GCN-O0-NEXT: Loop-Closed SSA Form Pass 86; GCN-O0-NEXT: DummyCGSCCPass 87; GCN-O0-NEXT: FunctionPass Manager 88; GCN-O0-NEXT: Safe Stack instrumentation pass 89; GCN-O0-NEXT: Insert stack protectors 90; GCN-O0-NEXT: Dominator Tree Construction 91; GCN-O0-NEXT: Post-Dominator Tree Construction 92; GCN-O0-NEXT: Natural Loop Information 93; GCN-O0-NEXT: Legacy Divergence Analysis 94; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 95; GCN-O0-NEXT: MachineDominator Tree Construction 96; GCN-O0-NEXT: SI Fix SGPR copies 97; GCN-O0-NEXT: MachinePostDominator Tree Construction 98; GCN-O0-NEXT: SI Lower i1 Copies 99; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions 100; GCN-O0-NEXT: Local Stack Slot Allocation 101; GCN-O0-NEXT: Register Usage Information Propagation 102; GCN-O0-NEXT: Eliminate PHI nodes for register allocation 103; GCN-O0-NEXT: SI Lower control flow pseudo instructions 104; GCN-O0-NEXT: Two-Address instruction pass 105; GCN-O0-NEXT: MachineDominator Tree Construction 106; GCN-O0-NEXT: Slot index numbering 107; GCN-O0-NEXT: Live Interval Analysis 108; GCN-O0-NEXT: MachinePostDominator Tree Construction 109; GCN-O0-NEXT: SI Whole Quad Mode 110; GCN-O0-NEXT: Virtual Register Map 111; GCN-O0-NEXT: Live Register Matrix 112; GCN-O0-NEXT: SI Pre-allocate WWM Registers 113; GCN-O0-NEXT: Fast Register Allocator 114; GCN-O0-NEXT: SI lower SGPR spill instructions 115; GCN-O0-NEXT: Fast Register Allocator 116; GCN-O0-NEXT: SI Fix VGPR copies 117; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis 118; GCN-O0-NEXT: Fixup Statepoint Caller Saved 119; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 120; GCN-O0-NEXT: Machine Optimization Remark Emitter 121; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization 122; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass 123; GCN-O0-NEXT: SI post-RA bundler 124; GCN-O0-NEXT: Insert fentry calls 125; GCN-O0-NEXT: Insert XRay ops 126; GCN-O0-NEXT: SI Memory Legalizer 127; GCN-O0-NEXT: MachineDominator Tree Construction 128; GCN-O0-NEXT: Machine Natural Loop Construction 129; GCN-O0-NEXT: MachinePostDominator Tree Construction 130; GCN-O0-NEXT: SI insert wait instructions 131; GCN-O0-NEXT: Insert required mode register values 132; GCN-O0-NEXT: SI Final Branch Preparation 133; GCN-O0-NEXT: Post RA hazard recognizer 134; GCN-O0-NEXT: Branch relaxation pass 135; GCN-O0-NEXT: Register Usage Information Collector Pass 136; GCN-O0-NEXT: Live DEBUG_VALUE analysis 137; GCN-O0-NEXT: Function register usage analysis 138; GCN-O0-NEXT: FunctionPass Manager 139; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 140; GCN-O0-NEXT: Machine Optimization Remark Emitter 141; GCN-O0-NEXT: AMDGPU Assembly Printer 142; GCN-O0-NEXT: Free MachineFunction 143; GCN-O0-NEXT:Pass Arguments: -domtree 144; GCN-O0-NEXT: FunctionPass Manager 145; GCN-O0-NEXT: Dominator Tree Construction 146 147; GCN-O1:Target Library Information 148; GCN-O1-NEXT:Target Pass Configuration 149; GCN-O1-NEXT:Machine Module Information 150; GCN-O1-NEXT:Target Transform Information 151; GCN-O1-NEXT:Assumption Cache Tracker 152; GCN-O1-NEXT:Profile summary info 153; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis 154; GCN-O1-NEXT:External Alias Analysis 155; GCN-O1-NEXT:Type-Based Alias Analysis 156; GCN-O1-NEXT:Scoped NoAlias Alias Analysis 157; GCN-O1-NEXT:Argument Register Usage Information Storage 158; GCN-O1-NEXT:Create Garbage Collector Module Metadata 159; GCN-O1-NEXT:Machine Branch Probability Analysis 160; GCN-O1-NEXT:Register Usage Information Storage 161; GCN-O1-NEXT:Default Regalloc Eviction Advisor 162; GCN-O1-NEXT: ModulePass Manager 163; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering 164; GCN-O1-NEXT: AMDGPU Printf lowering 165; GCN-O1-NEXT: FunctionPass Manager 166; GCN-O1-NEXT: Dominator Tree Construction 167; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU 168; GCN-O1-NEXT: FunctionPass Manager 169; GCN-O1-NEXT: Early propagate attributes from kernels to functions 170; GCN-O1-NEXT: AMDGPU Lower Intrinsics 171; GCN-O1-NEXT: AMDGPU Inline All Functions 172; GCN-O1-NEXT: CallGraph Construction 173; GCN-O1-NEXT: Call Graph SCC Pass Manager 174; GCN-O1-NEXT: Inliner for always_inline functions 175; GCN-O1-NEXT: A No-Op Barrier Pass 176; GCN-O1-NEXT: Lower OpenCL enqueued blocks 177; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions 178; GCN-O1-NEXT: FunctionPass Manager 179; GCN-O1-NEXT: Infer address spaces 180; GCN-O1-NEXT: Expand Atomic instructions 181; GCN-O1-NEXT: AMDGPU Promote Alloca 182; GCN-O1-NEXT: Dominator Tree Construction 183; GCN-O1-NEXT: SROA 184; GCN-O1-NEXT: Post-Dominator Tree Construction 185; GCN-O1-NEXT: Natural Loop Information 186; GCN-O1-NEXT: Legacy Divergence Analysis 187; GCN-O1-NEXT: AMDGPU IR optimizations 188; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 189; GCN-O1-NEXT: Canonicalize natural loops 190; GCN-O1-NEXT: Scalar Evolution Analysis 191; GCN-O1-NEXT: Loop Pass Manager 192; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops 193; GCN-O1-NEXT: Induction Variable Users 194; GCN-O1-NEXT: Loop Strength Reduction 195; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 196; GCN-O1-NEXT: Function Alias Analysis Results 197; GCN-O1-NEXT: Merge contiguous icmps into a memcmp 198; GCN-O1-NEXT: Natural Loop Information 199; GCN-O1-NEXT: Lazy Branch Probability Analysis 200; GCN-O1-NEXT: Lazy Block Frequency Analysis 201; GCN-O1-NEXT: Expand memcmp() to load/stores 202; GCN-O1-NEXT: Lower constant intrinsics 203; GCN-O1-NEXT: Remove unreachable blocks from the CFG 204; GCN-O1-NEXT: Natural Loop Information 205; GCN-O1-NEXT: Post-Dominator Tree Construction 206; GCN-O1-NEXT: Branch Probability Analysis 207; GCN-O1-NEXT: Block Frequency Analysis 208; GCN-O1-NEXT: Constant Hoisting 209; GCN-O1-NEXT: Replace intrinsics with calls to vector library 210; GCN-O1-NEXT: Partially inline calls to library functions 211; GCN-O1-NEXT: Expand vector predication intrinsics 212; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics 213; GCN-O1-NEXT: Expand reduction intrinsics 214; GCN-O1-NEXT: Natural Loop Information 215; GCN-O1-NEXT: TLS Variable Hoist 216; GCN-O1-NEXT: AMDGPU Attributor 217; GCN-O1-NEXT: CallGraph Construction 218; GCN-O1-NEXT: Call Graph SCC Pass Manager 219; GCN-O1-NEXT: AMDGPU Annotate Kernel Features 220; GCN-O1-NEXT: FunctionPass Manager 221; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments 222; GCN-O1-NEXT: Dominator Tree Construction 223; GCN-O1-NEXT: Natural Loop Information 224; GCN-O1-NEXT: CodeGen Prepare 225; GCN-O1-NEXT: Lazy Value Information Analysis 226; GCN-O1-NEXT: Lower SwitchInst's to branches 227; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators 228; GCN-O1-NEXT: Remove unreachable blocks from the CFG 229; GCN-O1-NEXT: Dominator Tree Construction 230; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 231; GCN-O1-NEXT: Function Alias Analysis Results 232; GCN-O1-NEXT: Flatten the CFG 233; GCN-O1-NEXT: Dominator Tree Construction 234; GCN-O1-NEXT: Post-Dominator Tree Construction 235; GCN-O1-NEXT: Natural Loop Information 236; GCN-O1-NEXT: Legacy Divergence Analysis 237; GCN-O1-NEXT: AMDGPU IR late optimizations 238; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 239; GCN-O1-NEXT: Function Alias Analysis Results 240; GCN-O1-NEXT: Code sinking 241; GCN-O1-NEXT: Legacy Divergence Analysis 242; GCN-O1-NEXT: Unify divergent function exit nodes 243; GCN-O1-NEXT: Lazy Value Information Analysis 244; GCN-O1-NEXT: Lower SwitchInst's to branches 245; GCN-O1-NEXT: Dominator Tree Construction 246; GCN-O1-NEXT: Natural Loop Information 247; GCN-O1-NEXT: Convert irreducible control-flow into natural loops 248; GCN-O1-NEXT: Fixup each natural loop to have a single exit block 249; GCN-O1-NEXT: Post-Dominator Tree Construction 250; GCN-O1-NEXT: Dominance Frontier Construction 251; GCN-O1-NEXT: Detect single entry single exit regions 252; GCN-O1-NEXT: Region Pass Manager 253; GCN-O1-NEXT: Structurize control flow 254; GCN-O1-NEXT: Post-Dominator Tree Construction 255; GCN-O1-NEXT: Natural Loop Information 256; GCN-O1-NEXT: Legacy Divergence Analysis 257; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 258; GCN-O1-NEXT: Function Alias Analysis Results 259; GCN-O1-NEXT: Memory SSA 260; GCN-O1-NEXT: AMDGPU Annotate Uniform Values 261; GCN-O1-NEXT: SI annotate control flow 262; GCN-O1-NEXT: LCSSA Verifier 263; GCN-O1-NEXT: Loop-Closed SSA Form Pass 264; GCN-O1-NEXT: DummyCGSCCPass 265; GCN-O1-NEXT: FunctionPass Manager 266; GCN-O1-NEXT: Safe Stack instrumentation pass 267; GCN-O1-NEXT: Insert stack protectors 268; GCN-O1-NEXT: Dominator Tree Construction 269; GCN-O1-NEXT: Post-Dominator Tree Construction 270; GCN-O1-NEXT: Natural Loop Information 271; GCN-O1-NEXT: Legacy Divergence Analysis 272; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 273; GCN-O1-NEXT: Function Alias Analysis Results 274; GCN-O1-NEXT: Branch Probability Analysis 275; GCN-O1-NEXT: Lazy Branch Probability Analysis 276; GCN-O1-NEXT: Lazy Block Frequency Analysis 277; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 278; GCN-O1-NEXT: MachineDominator Tree Construction 279; GCN-O1-NEXT: SI Fix SGPR copies 280; GCN-O1-NEXT: MachinePostDominator Tree Construction 281; GCN-O1-NEXT: SI Lower i1 Copies 282; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions 283; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 284; GCN-O1-NEXT: Early Tail Duplication 285; GCN-O1-NEXT: Optimize machine instruction PHIs 286; GCN-O1-NEXT: Slot index numbering 287; GCN-O1-NEXT: Merge disjoint stack slots 288; GCN-O1-NEXT: Local Stack Slot Allocation 289; GCN-O1-NEXT: Remove dead machine instructions 290; GCN-O1-NEXT: MachineDominator Tree Construction 291; GCN-O1-NEXT: Machine Natural Loop Construction 292; GCN-O1-NEXT: Machine Block Frequency Analysis 293; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion 294; GCN-O1-NEXT: MachineDominator Tree Construction 295; GCN-O1-NEXT: Machine Block Frequency Analysis 296; GCN-O1-NEXT: Machine Common Subexpression Elimination 297; GCN-O1-NEXT: MachinePostDominator Tree Construction 298; GCN-O1-NEXT: Machine Cycle Info Analysis 299; GCN-O1-NEXT: Machine code sinking 300; GCN-O1-NEXT: Peephole Optimizations 301; GCN-O1-NEXT: Remove dead machine instructions 302; GCN-O1-NEXT: SI Fold Operands 303; GCN-O1-NEXT: GCN DPP Combine 304; GCN-O1-NEXT: SI Load Store Optimizer 305; GCN-O1-NEXT: Remove dead machine instructions 306; GCN-O1-NEXT: SI Shrink Instructions 307; GCN-O1-NEXT: Register Usage Information Propagation 308; GCN-O1-NEXT: Detect Dead Lanes 309; GCN-O1-NEXT: Remove dead machine instructions 310; GCN-O1-NEXT: Process Implicit Definitions 311; GCN-O1-NEXT: Remove unreachable machine basic blocks 312; GCN-O1-NEXT: Live Variable Analysis 313; GCN-O1-NEXT: MachineDominator Tree Construction 314; GCN-O1-NEXT: SI Optimize VGPR LiveRange 315; GCN-O1-NEXT: Eliminate PHI nodes for register allocation 316; GCN-O1-NEXT: SI Lower control flow pseudo instructions 317; GCN-O1-NEXT: Two-Address instruction pass 318; GCN-O1-NEXT: Slot index numbering 319; GCN-O1-NEXT: Live Interval Analysis 320; GCN-O1-NEXT: Machine Natural Loop Construction 321; GCN-O1-NEXT: Simple Register Coalescing 322; GCN-O1-NEXT: Rename Disconnected Subregister Components 323; GCN-O1-NEXT: Machine Instruction Scheduler 324; GCN-O1-NEXT: MachinePostDominator Tree Construction 325; GCN-O1-NEXT: SI Whole Quad Mode 326; GCN-O1-NEXT: Virtual Register Map 327; GCN-O1-NEXT: Live Register Matrix 328; GCN-O1-NEXT: SI Pre-allocate WWM Registers 329; GCN-O1-NEXT: SI optimize exec mask operations pre-RA 330; GCN-O1-NEXT: Machine Natural Loop Construction 331; GCN-O1-NEXT: Machine Block Frequency Analysis 332; GCN-O1-NEXT: Debug Variable Analysis 333; GCN-O1-NEXT: Live Stack Slot Analysis 334; GCN-O1-NEXT: Virtual Register Map 335; GCN-O1-NEXT: Live Register Matrix 336; GCN-O1-NEXT: Bundle Machine CFG Edges 337; GCN-O1-NEXT: Spill Code Placement Analysis 338; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 339; GCN-O1-NEXT: Machine Optimization Remark Emitter 340; GCN-O1-NEXT: Greedy Register Allocator 341; GCN-O1-NEXT: Virtual Register Rewriter 342; GCN-O1-NEXT: SI lower SGPR spill instructions 343; GCN-O1-NEXT: Virtual Register Map 344; GCN-O1-NEXT: Live Register Matrix 345; GCN-O1-NEXT: Greedy Register Allocator 346; GCN-O1-NEXT: GCN NSA Reassign 347; GCN-O1-NEXT: Virtual Register Rewriter 348; GCN-O1-NEXT: Stack Slot Coloring 349; GCN-O1-NEXT: Machine Copy Propagation Pass 350; GCN-O1-NEXT: Machine Loop Invariant Code Motion 351; GCN-O1-NEXT: SI Fix VGPR copies 352; GCN-O1-NEXT: SI optimize exec mask operations 353; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis 354; GCN-O1-NEXT: Fixup Statepoint Caller Saved 355; GCN-O1-NEXT: PostRA Machine Sink 356; GCN-O1-NEXT: MachineDominator Tree Construction 357; GCN-O1-NEXT: Machine Natural Loop Construction 358; GCN-O1-NEXT: Machine Block Frequency Analysis 359; GCN-O1-NEXT: MachinePostDominator Tree Construction 360; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 361; GCN-O1-NEXT: Machine Optimization Remark Emitter 362; GCN-O1-NEXT: Shrink Wrapping analysis 363; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization 364; GCN-O1-NEXT: Control Flow Optimizer 365; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 366; GCN-O1-NEXT: Tail Duplication 367; GCN-O1-NEXT: Machine Copy Propagation Pass 368; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass 369; GCN-O1-NEXT: SI Shrink Instructions 370; GCN-O1-NEXT: SI post-RA bundler 371; GCN-O1-NEXT: MachineDominator Tree Construction 372; GCN-O1-NEXT: Machine Natural Loop Construction 373; GCN-O1-NEXT: PostRA Machine Instruction Scheduler 374; GCN-O1-NEXT: Machine Block Frequency Analysis 375; GCN-O1-NEXT: MachinePostDominator Tree Construction 376; GCN-O1-NEXT: Branch Probability Basic Block Placement 377; GCN-O1-NEXT: Insert fentry calls 378; GCN-O1-NEXT: Insert XRay ops 379; GCN-O1-NEXT: GCN Create VOPD Instructions 380; GCN-O1-NEXT: SI Memory Legalizer 381; GCN-O1-NEXT: MachineDominator Tree Construction 382; GCN-O1-NEXT: Machine Natural Loop Construction 383; GCN-O1-NEXT: MachinePostDominator Tree Construction 384; GCN-O1-NEXT: SI insert wait instructions 385; GCN-O1-NEXT: Insert required mode register values 386; GCN-O1-NEXT: SI Insert Hard Clauses 387; GCN-O1-NEXT: SI Final Branch Preparation 388; GCN-O1-NEXT: SI peephole optimizations 389; GCN-O1-NEXT: Post RA hazard recognizer 390; GCN-O1-NEXT: AMDGPU Insert Delay ALU 391; GCN-O1-NEXT: Branch relaxation pass 392; GCN-O1-NEXT: Register Usage Information Collector Pass 393; GCN-O1-NEXT: Live DEBUG_VALUE analysis 394; GCN-O1-NEXT: Function register usage analysis 395; GCN-O1-NEXT: FunctionPass Manager 396; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 397; GCN-O1-NEXT: Machine Optimization Remark Emitter 398; GCN-O1-NEXT: AMDGPU Assembly Printer 399; GCN-O1-NEXT: Free MachineFunction 400; GCN-O1-NEXT:Pass Arguments: -domtree 401; GCN-O1-NEXT: FunctionPass Manager 402; GCN-O1-NEXT: Dominator Tree Construction 403 404; GCN-O1-OPTS:Target Library Information 405; GCN-O1-OPTS-NEXT:Target Pass Configuration 406; GCN-O1-OPTS-NEXT:Machine Module Information 407; GCN-O1-OPTS-NEXT:Target Transform Information 408; GCN-O1-OPTS-NEXT:Assumption Cache Tracker 409; GCN-O1-OPTS-NEXT:Profile summary info 410; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis 411; GCN-O1-OPTS-NEXT:External Alias Analysis 412; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis 413; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis 414; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage 415; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata 416; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis 417; GCN-O1-OPTS-NEXT:Register Usage Information Storage 418; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor 419; GCN-O1-OPTS-NEXT: ModulePass Manager 420; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering 421; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering 422; GCN-O1-OPTS-NEXT: FunctionPass Manager 423; GCN-O1-OPTS-NEXT: Dominator Tree Construction 424; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU 425; GCN-O1-OPTS-NEXT: FunctionPass Manager 426; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions 427; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics 428; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions 429; GCN-O1-OPTS-NEXT: CallGraph Construction 430; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 431; GCN-O1-OPTS-NEXT: Inliner for always_inline functions 432; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass 433; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks 434; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions 435; GCN-O1-OPTS-NEXT: FunctionPass Manager 436; GCN-O1-OPTS-NEXT: Infer address spaces 437; GCN-O1-OPTS-NEXT: Expand Atomic instructions 438; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca 439; GCN-O1-OPTS-NEXT: Dominator Tree Construction 440; GCN-O1-OPTS-NEXT: SROA 441; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 442; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 443; GCN-O1-OPTS-NEXT: Memory SSA 444; GCN-O1-OPTS-NEXT: Natural Loop Information 445; GCN-O1-OPTS-NEXT: Canonicalize natural loops 446; GCN-O1-OPTS-NEXT: LCSSA Verifier 447; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 448; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 449; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 450; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 451; GCN-O1-OPTS-NEXT: Loop Pass Manager 452; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion 453; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 454; GCN-O1-OPTS-NEXT: Speculatively execute instructions 455; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 456; GCN-O1-OPTS-NEXT: Straight line strength reduction 457; GCN-O1-OPTS-NEXT: Early CSE 458; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 459; GCN-O1-OPTS-NEXT: Nary reassociation 460; GCN-O1-OPTS-NEXT: Early CSE 461; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 462; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 463; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations 464; GCN-O1-OPTS-NEXT: Canonicalize natural loops 465; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 466; GCN-O1-OPTS-NEXT: Loop Pass Manager 467; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops 468; GCN-O1-OPTS-NEXT: Induction Variable Users 469; GCN-O1-OPTS-NEXT: Loop Strength Reduction 470; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 471; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 472; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp 473; GCN-O1-OPTS-NEXT: Natural Loop Information 474; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 475; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 476; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores 477; GCN-O1-OPTS-NEXT: Lower constant intrinsics 478; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 479; GCN-O1-OPTS-NEXT: Natural Loop Information 480; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 481; GCN-O1-OPTS-NEXT: Branch Probability Analysis 482; GCN-O1-OPTS-NEXT: Block Frequency Analysis 483; GCN-O1-OPTS-NEXT: Constant Hoisting 484; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library 485; GCN-O1-OPTS-NEXT: Partially inline calls to library functions 486; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics 487; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics 488; GCN-O1-OPTS-NEXT: Expand reduction intrinsics 489; GCN-O1-OPTS-NEXT: Natural Loop Information 490; GCN-O1-OPTS-NEXT: TLS Variable Hoist 491; GCN-O1-OPTS-NEXT: Early CSE 492; GCN-O1-OPTS-NEXT: AMDGPU Attributor 493; GCN-O1-OPTS-NEXT: CallGraph Construction 494; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 495; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features 496; GCN-O1-OPTS-NEXT: FunctionPass Manager 497; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments 498; GCN-O1-OPTS-NEXT: Dominator Tree Construction 499; GCN-O1-OPTS-NEXT: Natural Loop Information 500; GCN-O1-OPTS-NEXT: CodeGen Prepare 501; GCN-O1-OPTS-NEXT: Dominator Tree Construction 502; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 503; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 504; GCN-O1-OPTS-NEXT: Natural Loop Information 505; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 506; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer 507; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 508; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 509; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators 510; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 511; GCN-O1-OPTS-NEXT: Dominator Tree Construction 512; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 513; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 514; GCN-O1-OPTS-NEXT: Flatten the CFG 515; GCN-O1-OPTS-NEXT: Dominator Tree Construction 516; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 517; GCN-O1-OPTS-NEXT: Natural Loop Information 518; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 519; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations 520; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 521; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 522; GCN-O1-OPTS-NEXT: Code sinking 523; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 524; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes 525; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 526; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 527; GCN-O1-OPTS-NEXT: Dominator Tree Construction 528; GCN-O1-OPTS-NEXT: Natural Loop Information 529; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops 530; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block 531; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 532; GCN-O1-OPTS-NEXT: Dominance Frontier Construction 533; GCN-O1-OPTS-NEXT: Detect single entry single exit regions 534; GCN-O1-OPTS-NEXT: Region Pass Manager 535; GCN-O1-OPTS-NEXT: Structurize control flow 536; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 537; GCN-O1-OPTS-NEXT: Natural Loop Information 538; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 539; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 540; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 541; GCN-O1-OPTS-NEXT: Memory SSA 542; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values 543; GCN-O1-OPTS-NEXT: SI annotate control flow 544; GCN-O1-OPTS-NEXT: LCSSA Verifier 545; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 546; GCN-O1-OPTS-NEXT: DummyCGSCCPass 547; GCN-O1-OPTS-NEXT: FunctionPass Manager 548; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass 549; GCN-O1-OPTS-NEXT: Insert stack protectors 550; GCN-O1-OPTS-NEXT: Dominator Tree Construction 551; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 552; GCN-O1-OPTS-NEXT: Natural Loop Information 553; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 554; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 555; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 556; GCN-O1-OPTS-NEXT: Branch Probability Analysis 557; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 558; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 559; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 560; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 561; GCN-O1-OPTS-NEXT: SI Fix SGPR copies 562; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 563; GCN-O1-OPTS-NEXT: SI Lower i1 Copies 564; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions 565; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 566; GCN-O1-OPTS-NEXT: Early Tail Duplication 567; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs 568; GCN-O1-OPTS-NEXT: Slot index numbering 569; GCN-O1-OPTS-NEXT: Merge disjoint stack slots 570; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation 571; GCN-O1-OPTS-NEXT: Remove dead machine instructions 572; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 573; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 574; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 575; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 576; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 577; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 578; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 579; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 580; GCN-O1-OPTS-NEXT: Machine Cycle Info Analysis 581; GCN-O1-OPTS-NEXT: Machine code sinking 582; GCN-O1-OPTS-NEXT: Peephole Optimizations 583; GCN-O1-OPTS-NEXT: Remove dead machine instructions 584; GCN-O1-OPTS-NEXT: SI Fold Operands 585; GCN-O1-OPTS-NEXT: GCN DPP Combine 586; GCN-O1-OPTS-NEXT: SI Load Store Optimizer 587; GCN-O1-OPTS-NEXT: SI Peephole SDWA 588; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 589; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 590; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 591; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 592; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 593; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 594; GCN-O1-OPTS-NEXT: SI Fold Operands 595; GCN-O1-OPTS-NEXT: Remove dead machine instructions 596; GCN-O1-OPTS-NEXT: SI Shrink Instructions 597; GCN-O1-OPTS-NEXT: Register Usage Information Propagation 598; GCN-O1-OPTS-NEXT: Detect Dead Lanes 599; GCN-O1-OPTS-NEXT: Remove dead machine instructions 600; GCN-O1-OPTS-NEXT: Process Implicit Definitions 601; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks 602; GCN-O1-OPTS-NEXT: Live Variable Analysis 603; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange 604; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation 605; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions 606; GCN-O1-OPTS-NEXT: Two-Address instruction pass 607; GCN-O1-OPTS-NEXT: Slot index numbering 608; GCN-O1-OPTS-NEXT: Live Interval Analysis 609; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 610; GCN-O1-OPTS-NEXT: Simple Register Coalescing 611; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components 612; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations 613; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler 614; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 615; GCN-O1-OPTS-NEXT: SI Whole Quad Mode 616; GCN-O1-OPTS-NEXT: Virtual Register Map 617; GCN-O1-OPTS-NEXT: Live Register Matrix 618; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers 619; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA 620; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 621; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 622; GCN-O1-OPTS-NEXT: Debug Variable Analysis 623; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis 624; GCN-O1-OPTS-NEXT: Virtual Register Map 625; GCN-O1-OPTS-NEXT: Live Register Matrix 626; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges 627; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis 628; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 629; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 630; GCN-O1-OPTS-NEXT: Greedy Register Allocator 631; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 632; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions 633; GCN-O1-OPTS-NEXT: Virtual Register Map 634; GCN-O1-OPTS-NEXT: Live Register Matrix 635; GCN-O1-OPTS-NEXT: Greedy Register Allocator 636; GCN-O1-OPTS-NEXT: GCN NSA Reassign 637; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 638; GCN-O1-OPTS-NEXT: Stack Slot Coloring 639; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 640; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion 641; GCN-O1-OPTS-NEXT: SI Fix VGPR copies 642; GCN-O1-OPTS-NEXT: SI optimize exec mask operations 643; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis 644; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved 645; GCN-O1-OPTS-NEXT: PostRA Machine Sink 646; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 647; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 648; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 649; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 650; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 651; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 652; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis 653; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization 654; GCN-O1-OPTS-NEXT: Control Flow Optimizer 655; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 656; GCN-O1-OPTS-NEXT: Tail Duplication 657; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 658; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass 659; GCN-O1-OPTS-NEXT: SI Shrink Instructions 660; GCN-O1-OPTS-NEXT: SI post-RA bundler 661; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 662; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 663; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler 664; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 665; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 666; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement 667; GCN-O1-OPTS-NEXT: Insert fentry calls 668; GCN-O1-OPTS-NEXT: Insert XRay ops 669; GCN-O1-OPTS-NEXT: GCN Create VOPD Instructions 670; GCN-O1-OPTS-NEXT: SI Memory Legalizer 671; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 672; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 673; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 674; GCN-O1-OPTS-NEXT: SI insert wait instructions 675; GCN-O1-OPTS-NEXT: Insert required mode register values 676; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses 677; GCN-O1-OPTS-NEXT: SI Final Branch Preparation 678; GCN-O1-OPTS-NEXT: SI peephole optimizations 679; GCN-O1-OPTS-NEXT: Post RA hazard recognizer 680; GCN-O1-OPTS-NEXT: AMDGPU Insert Delay ALU 681; GCN-O1-OPTS-NEXT: Branch relaxation pass 682; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass 683; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis 684; GCN-O1-OPTS-NEXT: Function register usage analysis 685; GCN-O1-OPTS-NEXT: FunctionPass Manager 686; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 687; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 688; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer 689; GCN-O1-OPTS-NEXT: Free MachineFunction 690; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree 691; GCN-O1-OPTS-NEXT: FunctionPass Manager 692; GCN-O1-OPTS-NEXT: Dominator Tree Construction 693 694; GCN-O2:Target Library Information 695; GCN-O2-NEXT:Target Pass Configuration 696; GCN-O2-NEXT:Machine Module Information 697; GCN-O2-NEXT:Target Transform Information 698; GCN-O2-NEXT:Assumption Cache Tracker 699; GCN-O2-NEXT:Profile summary info 700; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis 701; GCN-O2-NEXT:External Alias Analysis 702; GCN-O2-NEXT:Type-Based Alias Analysis 703; GCN-O2-NEXT:Scoped NoAlias Alias Analysis 704; GCN-O2-NEXT:Argument Register Usage Information Storage 705; GCN-O2-NEXT:Create Garbage Collector Module Metadata 706; GCN-O2-NEXT:Machine Branch Probability Analysis 707; GCN-O2-NEXT:Register Usage Information Storage 708; GCN-O2-NEXT:Default Regalloc Eviction Advisor 709; GCN-O2-NEXT: ModulePass Manager 710; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering 711; GCN-O2-NEXT: AMDGPU Printf lowering 712; GCN-O2-NEXT: FunctionPass Manager 713; GCN-O2-NEXT: Dominator Tree Construction 714; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU 715; GCN-O2-NEXT: FunctionPass Manager 716; GCN-O2-NEXT: Early propagate attributes from kernels to functions 717; GCN-O2-NEXT: AMDGPU Lower Intrinsics 718; GCN-O2-NEXT: AMDGPU Inline All Functions 719; GCN-O2-NEXT: CallGraph Construction 720; GCN-O2-NEXT: Call Graph SCC Pass Manager 721; GCN-O2-NEXT: Inliner for always_inline functions 722; GCN-O2-NEXT: A No-Op Barrier Pass 723; GCN-O2-NEXT: Lower OpenCL enqueued blocks 724; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions 725; GCN-O2-NEXT: FunctionPass Manager 726; GCN-O2-NEXT: Infer address spaces 727; GCN-O2-NEXT: Expand Atomic instructions 728; GCN-O2-NEXT: AMDGPU Promote Alloca 729; GCN-O2-NEXT: Dominator Tree Construction 730; GCN-O2-NEXT: SROA 731; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 732; GCN-O2-NEXT: Function Alias Analysis Results 733; GCN-O2-NEXT: Memory SSA 734; GCN-O2-NEXT: Natural Loop Information 735; GCN-O2-NEXT: Canonicalize natural loops 736; GCN-O2-NEXT: LCSSA Verifier 737; GCN-O2-NEXT: Loop-Closed SSA Form Pass 738; GCN-O2-NEXT: Scalar Evolution Analysis 739; GCN-O2-NEXT: Lazy Branch Probability Analysis 740; GCN-O2-NEXT: Lazy Block Frequency Analysis 741; GCN-O2-NEXT: Loop Pass Manager 742; GCN-O2-NEXT: Loop Invariant Code Motion 743; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 744; GCN-O2-NEXT: Speculatively execute instructions 745; GCN-O2-NEXT: Scalar Evolution Analysis 746; GCN-O2-NEXT: Straight line strength reduction 747; GCN-O2-NEXT: Early CSE 748; GCN-O2-NEXT: Scalar Evolution Analysis 749; GCN-O2-NEXT: Nary reassociation 750; GCN-O2-NEXT: Early CSE 751; GCN-O2-NEXT: Post-Dominator Tree Construction 752; GCN-O2-NEXT: Legacy Divergence Analysis 753; GCN-O2-NEXT: AMDGPU IR optimizations 754; GCN-O2-NEXT: Canonicalize natural loops 755; GCN-O2-NEXT: Scalar Evolution Analysis 756; GCN-O2-NEXT: Loop Pass Manager 757; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops 758; GCN-O2-NEXT: Induction Variable Users 759; GCN-O2-NEXT: Loop Strength Reduction 760; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 761; GCN-O2-NEXT: Function Alias Analysis Results 762; GCN-O2-NEXT: Merge contiguous icmps into a memcmp 763; GCN-O2-NEXT: Natural Loop Information 764; GCN-O2-NEXT: Lazy Branch Probability Analysis 765; GCN-O2-NEXT: Lazy Block Frequency Analysis 766; GCN-O2-NEXT: Expand memcmp() to load/stores 767; GCN-O2-NEXT: Lower constant intrinsics 768; GCN-O2-NEXT: Remove unreachable blocks from the CFG 769; GCN-O2-NEXT: Natural Loop Information 770; GCN-O2-NEXT: Post-Dominator Tree Construction 771; GCN-O2-NEXT: Branch Probability Analysis 772; GCN-O2-NEXT: Block Frequency Analysis 773; GCN-O2-NEXT: Constant Hoisting 774; GCN-O2-NEXT: Replace intrinsics with calls to vector library 775; GCN-O2-NEXT: Partially inline calls to library functions 776; GCN-O2-NEXT: Expand vector predication intrinsics 777; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics 778; GCN-O2-NEXT: Expand reduction intrinsics 779; GCN-O2-NEXT: Natural Loop Information 780; GCN-O2-NEXT: TLS Variable Hoist 781; GCN-O2-NEXT: Early CSE 782; GCN-O2-NEXT: AMDGPU Attributor 783; GCN-O2-NEXT: CallGraph Construction 784; GCN-O2-NEXT: Call Graph SCC Pass Manager 785; GCN-O2-NEXT: AMDGPU Annotate Kernel Features 786; GCN-O2-NEXT: FunctionPass Manager 787; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments 788; GCN-O2-NEXT: Dominator Tree Construction 789; GCN-O2-NEXT: Natural Loop Information 790; GCN-O2-NEXT: CodeGen Prepare 791; GCN-O2-NEXT: Dominator Tree Construction 792; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 793; GCN-O2-NEXT: Function Alias Analysis Results 794; GCN-O2-NEXT: Natural Loop Information 795; GCN-O2-NEXT: Scalar Evolution Analysis 796; GCN-O2-NEXT: GPU Load and Store Vectorizer 797; GCN-O2-NEXT: Lazy Value Information Analysis 798; GCN-O2-NEXT: Lower SwitchInst's to branches 799; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators 800; GCN-O2-NEXT: Remove unreachable blocks from the CFG 801; GCN-O2-NEXT: Dominator Tree Construction 802; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 803; GCN-O2-NEXT: Function Alias Analysis Results 804; GCN-O2-NEXT: Flatten the CFG 805; GCN-O2-NEXT: Dominator Tree Construction 806; GCN-O2-NEXT: Post-Dominator Tree Construction 807; GCN-O2-NEXT: Natural Loop Information 808; GCN-O2-NEXT: Legacy Divergence Analysis 809; GCN-O2-NEXT: AMDGPU IR late optimizations 810; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 811; GCN-O2-NEXT: Function Alias Analysis Results 812; GCN-O2-NEXT: Code sinking 813; GCN-O2-NEXT: Legacy Divergence Analysis 814; GCN-O2-NEXT: Unify divergent function exit nodes 815; GCN-O2-NEXT: Lazy Value Information Analysis 816; GCN-O2-NEXT: Lower SwitchInst's to branches 817; GCN-O2-NEXT: Dominator Tree Construction 818; GCN-O2-NEXT: Natural Loop Information 819; GCN-O2-NEXT: Convert irreducible control-flow into natural loops 820; GCN-O2-NEXT: Fixup each natural loop to have a single exit block 821; GCN-O2-NEXT: Post-Dominator Tree Construction 822; GCN-O2-NEXT: Dominance Frontier Construction 823; GCN-O2-NEXT: Detect single entry single exit regions 824; GCN-O2-NEXT: Region Pass Manager 825; GCN-O2-NEXT: Structurize control flow 826; GCN-O2-NEXT: Post-Dominator Tree Construction 827; GCN-O2-NEXT: Natural Loop Information 828; GCN-O2-NEXT: Legacy Divergence Analysis 829; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 830; GCN-O2-NEXT: Function Alias Analysis Results 831; GCN-O2-NEXT: Memory SSA 832; GCN-O2-NEXT: AMDGPU Annotate Uniform Values 833; GCN-O2-NEXT: SI annotate control flow 834; GCN-O2-NEXT: LCSSA Verifier 835; GCN-O2-NEXT: Loop-Closed SSA Form Pass 836; GCN-O2-NEXT: Analysis if a function is memory bound 837; GCN-O2-NEXT: DummyCGSCCPass 838; GCN-O2-NEXT: FunctionPass Manager 839; GCN-O2-NEXT: Safe Stack instrumentation pass 840; GCN-O2-NEXT: Insert stack protectors 841; GCN-O2-NEXT: Dominator Tree Construction 842; GCN-O2-NEXT: Post-Dominator Tree Construction 843; GCN-O2-NEXT: Natural Loop Information 844; GCN-O2-NEXT: Legacy Divergence Analysis 845; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 846; GCN-O2-NEXT: Function Alias Analysis Results 847; GCN-O2-NEXT: Branch Probability Analysis 848; GCN-O2-NEXT: Lazy Branch Probability Analysis 849; GCN-O2-NEXT: Lazy Block Frequency Analysis 850; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 851; GCN-O2-NEXT: MachineDominator Tree Construction 852; GCN-O2-NEXT: SI Fix SGPR copies 853; GCN-O2-NEXT: MachinePostDominator Tree Construction 854; GCN-O2-NEXT: SI Lower i1 Copies 855; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions 856; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 857; GCN-O2-NEXT: Early Tail Duplication 858; GCN-O2-NEXT: Optimize machine instruction PHIs 859; GCN-O2-NEXT: Slot index numbering 860; GCN-O2-NEXT: Merge disjoint stack slots 861; GCN-O2-NEXT: Local Stack Slot Allocation 862; GCN-O2-NEXT: Remove dead machine instructions 863; GCN-O2-NEXT: MachineDominator Tree Construction 864; GCN-O2-NEXT: Machine Natural Loop Construction 865; GCN-O2-NEXT: Machine Block Frequency Analysis 866; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 867; GCN-O2-NEXT: MachineDominator Tree Construction 868; GCN-O2-NEXT: Machine Block Frequency Analysis 869; GCN-O2-NEXT: Machine Common Subexpression Elimination 870; GCN-O2-NEXT: MachinePostDominator Tree Construction 871; GCN-O2-NEXT: Machine Cycle Info Analysis 872; GCN-O2-NEXT: Machine code sinking 873; GCN-O2-NEXT: Peephole Optimizations 874; GCN-O2-NEXT: Remove dead machine instructions 875; GCN-O2-NEXT: SI Fold Operands 876; GCN-O2-NEXT: GCN DPP Combine 877; GCN-O2-NEXT: SI Load Store Optimizer 878; GCN-O2-NEXT: SI Peephole SDWA 879; GCN-O2-NEXT: Machine Block Frequency Analysis 880; GCN-O2-NEXT: MachineDominator Tree Construction 881; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 882; GCN-O2-NEXT: MachineDominator Tree Construction 883; GCN-O2-NEXT: Machine Block Frequency Analysis 884; GCN-O2-NEXT: Machine Common Subexpression Elimination 885; GCN-O2-NEXT: SI Fold Operands 886; GCN-O2-NEXT: Remove dead machine instructions 887; GCN-O2-NEXT: SI Shrink Instructions 888; GCN-O2-NEXT: Register Usage Information Propagation 889; GCN-O2-NEXT: Detect Dead Lanes 890; GCN-O2-NEXT: Remove dead machine instructions 891; GCN-O2-NEXT: Process Implicit Definitions 892; GCN-O2-NEXT: Remove unreachable machine basic blocks 893; GCN-O2-NEXT: Live Variable Analysis 894; GCN-O2-NEXT: SI Optimize VGPR LiveRange 895; GCN-O2-NEXT: Eliminate PHI nodes for register allocation 896; GCN-O2-NEXT: SI Lower control flow pseudo instructions 897; GCN-O2-NEXT: Two-Address instruction pass 898; GCN-O2-NEXT: Slot index numbering 899; GCN-O2-NEXT: Live Interval Analysis 900; GCN-O2-NEXT: Machine Natural Loop Construction 901; GCN-O2-NEXT: Simple Register Coalescing 902; GCN-O2-NEXT: Rename Disconnected Subregister Components 903; GCN-O2-NEXT: AMDGPU Pre-RA optimizations 904; GCN-O2-NEXT: Machine Instruction Scheduler 905; GCN-O2-NEXT: MachinePostDominator Tree Construction 906; GCN-O2-NEXT: SI Whole Quad Mode 907; GCN-O2-NEXT: Virtual Register Map 908; GCN-O2-NEXT: Live Register Matrix 909; GCN-O2-NEXT: SI Pre-allocate WWM Registers 910; GCN-O2-NEXT: SI optimize exec mask operations pre-RA 911; GCN-O2-NEXT: SI Form memory clauses 912; GCN-O2-NEXT: Machine Natural Loop Construction 913; GCN-O2-NEXT: Machine Block Frequency Analysis 914; GCN-O2-NEXT: Debug Variable Analysis 915; GCN-O2-NEXT: Live Stack Slot Analysis 916; GCN-O2-NEXT: Virtual Register Map 917; GCN-O2-NEXT: Live Register Matrix 918; GCN-O2-NEXT: Bundle Machine CFG Edges 919; GCN-O2-NEXT: Spill Code Placement Analysis 920; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 921; GCN-O2-NEXT: Machine Optimization Remark Emitter 922; GCN-O2-NEXT: Greedy Register Allocator 923; GCN-O2-NEXT: Virtual Register Rewriter 924; GCN-O2-NEXT: SI lower SGPR spill instructions 925; GCN-O2-NEXT: Virtual Register Map 926; GCN-O2-NEXT: Live Register Matrix 927; GCN-O2-NEXT: Greedy Register Allocator 928; GCN-O2-NEXT: GCN NSA Reassign 929; GCN-O2-NEXT: Virtual Register Rewriter 930; GCN-O2-NEXT: Stack Slot Coloring 931; GCN-O2-NEXT: Machine Copy Propagation Pass 932; GCN-O2-NEXT: Machine Loop Invariant Code Motion 933; GCN-O2-NEXT: SI Fix VGPR copies 934; GCN-O2-NEXT: SI optimize exec mask operations 935; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis 936; GCN-O2-NEXT: Fixup Statepoint Caller Saved 937; GCN-O2-NEXT: PostRA Machine Sink 938; GCN-O2-NEXT: MachineDominator Tree Construction 939; GCN-O2-NEXT: Machine Natural Loop Construction 940; GCN-O2-NEXT: Machine Block Frequency Analysis 941; GCN-O2-NEXT: MachinePostDominator Tree Construction 942; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 943; GCN-O2-NEXT: Machine Optimization Remark Emitter 944; GCN-O2-NEXT: Shrink Wrapping analysis 945; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization 946; GCN-O2-NEXT: Control Flow Optimizer 947; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 948; GCN-O2-NEXT: Tail Duplication 949; GCN-O2-NEXT: Machine Copy Propagation Pass 950; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass 951; GCN-O2-NEXT: SI Shrink Instructions 952; GCN-O2-NEXT: SI post-RA bundler 953; GCN-O2-NEXT: MachineDominator Tree Construction 954; GCN-O2-NEXT: Machine Natural Loop Construction 955; GCN-O2-NEXT: PostRA Machine Instruction Scheduler 956; GCN-O2-NEXT: Machine Block Frequency Analysis 957; GCN-O2-NEXT: MachinePostDominator Tree Construction 958; GCN-O2-NEXT: Branch Probability Basic Block Placement 959; GCN-O2-NEXT: Insert fentry calls 960; GCN-O2-NEXT: Insert XRay ops 961; GCN-O2-NEXT: GCN Create VOPD Instructions 962; GCN-O2-NEXT: SI Memory Legalizer 963; GCN-O2-NEXT: MachineDominator Tree Construction 964; GCN-O2-NEXT: Machine Natural Loop Construction 965; GCN-O2-NEXT: MachinePostDominator Tree Construction 966; GCN-O2-NEXT: SI insert wait instructions 967; GCN-O2-NEXT: Insert required mode register values 968; GCN-O2-NEXT: SI Insert Hard Clauses 969; GCN-O2-NEXT: SI Final Branch Preparation 970; GCN-O2-NEXT: SI peephole optimizations 971; GCN-O2-NEXT: Post RA hazard recognizer 972; GCN-O2-NEXT: Release VGPRs 973; GCN-O2-NEXT: AMDGPU Insert Delay ALU 974; GCN-O2-NEXT: Branch relaxation pass 975; GCN-O2-NEXT: Register Usage Information Collector Pass 976; GCN-O2-NEXT: Live DEBUG_VALUE analysis 977; GCN-O2-NEXT: Function register usage analysis 978; GCN-O2-NEXT: FunctionPass Manager 979; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 980; GCN-O2-NEXT: Machine Optimization Remark Emitter 981; GCN-O2-NEXT: AMDGPU Assembly Printer 982; GCN-O2-NEXT: Free MachineFunction 983; GCN-O2-NEXT:Pass Arguments: -domtree 984; GCN-O2-NEXT: FunctionPass Manager 985; GCN-O2-NEXT: Dominator Tree Construction 986 987; GCN-O3:Target Library Information 988; GCN-O3-NEXT:Target Pass Configuration 989; GCN-O3-NEXT:Machine Module Information 990; GCN-O3-NEXT:Target Transform Information 991; GCN-O3-NEXT:Assumption Cache Tracker 992; GCN-O3-NEXT:Profile summary info 993; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis 994; GCN-O3-NEXT:External Alias Analysis 995; GCN-O3-NEXT:Type-Based Alias Analysis 996; GCN-O3-NEXT:Scoped NoAlias Alias Analysis 997; GCN-O3-NEXT:Argument Register Usage Information Storage 998; GCN-O3-NEXT:Create Garbage Collector Module Metadata 999; GCN-O3-NEXT:Machine Branch Probability Analysis 1000; GCN-O3-NEXT:Register Usage Information Storage 1001; GCN-O3-NEXT:Default Regalloc Eviction Advisor 1002; GCN-O3-NEXT: ModulePass Manager 1003; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering 1004; GCN-O3-NEXT: AMDGPU Printf lowering 1005; GCN-O3-NEXT: FunctionPass Manager 1006; GCN-O3-NEXT: Dominator Tree Construction 1007; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU 1008; GCN-O3-NEXT: FunctionPass Manager 1009; GCN-O3-NEXT: Early propagate attributes from kernels to functions 1010; GCN-O3-NEXT: AMDGPU Lower Intrinsics 1011; GCN-O3-NEXT: AMDGPU Inline All Functions 1012; GCN-O3-NEXT: CallGraph Construction 1013; GCN-O3-NEXT: Call Graph SCC Pass Manager 1014; GCN-O3-NEXT: Inliner for always_inline functions 1015; GCN-O3-NEXT: A No-Op Barrier Pass 1016; GCN-O3-NEXT: Lower OpenCL enqueued blocks 1017; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions 1018; GCN-O3-NEXT: FunctionPass Manager 1019; GCN-O3-NEXT: Infer address spaces 1020; GCN-O3-NEXT: Expand Atomic instructions 1021; GCN-O3-NEXT: AMDGPU Promote Alloca 1022; GCN-O3-NEXT: Dominator Tree Construction 1023; GCN-O3-NEXT: SROA 1024; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1025; GCN-O3-NEXT: Function Alias Analysis Results 1026; GCN-O3-NEXT: Memory SSA 1027; GCN-O3-NEXT: Natural Loop Information 1028; GCN-O3-NEXT: Canonicalize natural loops 1029; GCN-O3-NEXT: LCSSA Verifier 1030; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1031; GCN-O3-NEXT: Scalar Evolution Analysis 1032; GCN-O3-NEXT: Lazy Branch Probability Analysis 1033; GCN-O3-NEXT: Lazy Block Frequency Analysis 1034; GCN-O3-NEXT: Loop Pass Manager 1035; GCN-O3-NEXT: Loop Invariant Code Motion 1036; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 1037; GCN-O3-NEXT: Speculatively execute instructions 1038; GCN-O3-NEXT: Scalar Evolution Analysis 1039; GCN-O3-NEXT: Straight line strength reduction 1040; GCN-O3-NEXT: Phi Values Analysis 1041; GCN-O3-NEXT: Function Alias Analysis Results 1042; GCN-O3-NEXT: Memory Dependence Analysis 1043; GCN-O3-NEXT: Optimization Remark Emitter 1044; GCN-O3-NEXT: Global Value Numbering 1045; GCN-O3-NEXT: Scalar Evolution Analysis 1046; GCN-O3-NEXT: Nary reassociation 1047; GCN-O3-NEXT: Early CSE 1048; GCN-O3-NEXT: Post-Dominator Tree Construction 1049; GCN-O3-NEXT: Legacy Divergence Analysis 1050; GCN-O3-NEXT: AMDGPU IR optimizations 1051; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1052; GCN-O3-NEXT: Canonicalize natural loops 1053; GCN-O3-NEXT: Scalar Evolution Analysis 1054; GCN-O3-NEXT: Loop Pass Manager 1055; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops 1056; GCN-O3-NEXT: Induction Variable Users 1057; GCN-O3-NEXT: Loop Strength Reduction 1058; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1059; GCN-O3-NEXT: Function Alias Analysis Results 1060; GCN-O3-NEXT: Merge contiguous icmps into a memcmp 1061; GCN-O3-NEXT: Natural Loop Information 1062; GCN-O3-NEXT: Lazy Branch Probability Analysis 1063; GCN-O3-NEXT: Lazy Block Frequency Analysis 1064; GCN-O3-NEXT: Expand memcmp() to load/stores 1065; GCN-O3-NEXT: Lower constant intrinsics 1066; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1067; GCN-O3-NEXT: Natural Loop Information 1068; GCN-O3-NEXT: Post-Dominator Tree Construction 1069; GCN-O3-NEXT: Branch Probability Analysis 1070; GCN-O3-NEXT: Block Frequency Analysis 1071; GCN-O3-NEXT: Constant Hoisting 1072; GCN-O3-NEXT: Replace intrinsics with calls to vector library 1073; GCN-O3-NEXT: Partially inline calls to library functions 1074; GCN-O3-NEXT: Expand vector predication intrinsics 1075; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics 1076; GCN-O3-NEXT: Expand reduction intrinsics 1077; GCN-O3-NEXT: Natural Loop Information 1078; GCN-O3-NEXT: TLS Variable Hoist 1079; GCN-O3-NEXT: Phi Values Analysis 1080; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1081; GCN-O3-NEXT: Function Alias Analysis Results 1082; GCN-O3-NEXT: Memory Dependence Analysis 1083; GCN-O3-NEXT: Lazy Branch Probability Analysis 1084; GCN-O3-NEXT: Lazy Block Frequency Analysis 1085; GCN-O3-NEXT: Optimization Remark Emitter 1086; GCN-O3-NEXT: Global Value Numbering 1087; GCN-O3-NEXT: AMDGPU Attributor 1088; GCN-O3-NEXT: CallGraph Construction 1089; GCN-O3-NEXT: Call Graph SCC Pass Manager 1090; GCN-O3-NEXT: AMDGPU Annotate Kernel Features 1091; GCN-O3-NEXT: FunctionPass Manager 1092; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments 1093; GCN-O3-NEXT: Dominator Tree Construction 1094; GCN-O3-NEXT: Natural Loop Information 1095; GCN-O3-NEXT: CodeGen Prepare 1096; GCN-O3-NEXT: Dominator Tree Construction 1097; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1098; GCN-O3-NEXT: Function Alias Analysis Results 1099; GCN-O3-NEXT: Natural Loop Information 1100; GCN-O3-NEXT: Scalar Evolution Analysis 1101; GCN-O3-NEXT: GPU Load and Store Vectorizer 1102; GCN-O3-NEXT: Lazy Value Information Analysis 1103; GCN-O3-NEXT: Lower SwitchInst's to branches 1104; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators 1105; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1106; GCN-O3-NEXT: Dominator Tree Construction 1107; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1108; GCN-O3-NEXT: Function Alias Analysis Results 1109; GCN-O3-NEXT: Flatten the CFG 1110; GCN-O3-NEXT: Dominator Tree Construction 1111; GCN-O3-NEXT: Post-Dominator Tree Construction 1112; GCN-O3-NEXT: Natural Loop Information 1113; GCN-O3-NEXT: Legacy Divergence Analysis 1114; GCN-O3-NEXT: AMDGPU IR late optimizations 1115; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1116; GCN-O3-NEXT: Function Alias Analysis Results 1117; GCN-O3-NEXT: Code sinking 1118; GCN-O3-NEXT: Legacy Divergence Analysis 1119; GCN-O3-NEXT: Unify divergent function exit nodes 1120; GCN-O3-NEXT: Lazy Value Information Analysis 1121; GCN-O3-NEXT: Lower SwitchInst's to branches 1122; GCN-O3-NEXT: Dominator Tree Construction 1123; GCN-O3-NEXT: Natural Loop Information 1124; GCN-O3-NEXT: Convert irreducible control-flow into natural loops 1125; GCN-O3-NEXT: Fixup each natural loop to have a single exit block 1126; GCN-O3-NEXT: Post-Dominator Tree Construction 1127; GCN-O3-NEXT: Dominance Frontier Construction 1128; GCN-O3-NEXT: Detect single entry single exit regions 1129; GCN-O3-NEXT: Region Pass Manager 1130; GCN-O3-NEXT: Structurize control flow 1131; GCN-O3-NEXT: Post-Dominator Tree Construction 1132; GCN-O3-NEXT: Natural Loop Information 1133; GCN-O3-NEXT: Legacy Divergence Analysis 1134; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1135; GCN-O3-NEXT: Function Alias Analysis Results 1136; GCN-O3-NEXT: Memory SSA 1137; GCN-O3-NEXT: AMDGPU Annotate Uniform Values 1138; GCN-O3-NEXT: SI annotate control flow 1139; GCN-O3-NEXT: LCSSA Verifier 1140; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1141; GCN-O3-NEXT: Analysis if a function is memory bound 1142; GCN-O3-NEXT: DummyCGSCCPass 1143; GCN-O3-NEXT: FunctionPass Manager 1144; GCN-O3-NEXT: Safe Stack instrumentation pass 1145; GCN-O3-NEXT: Insert stack protectors 1146; GCN-O3-NEXT: Dominator Tree Construction 1147; GCN-O3-NEXT: Post-Dominator Tree Construction 1148; GCN-O3-NEXT: Natural Loop Information 1149; GCN-O3-NEXT: Legacy Divergence Analysis 1150; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1151; GCN-O3-NEXT: Function Alias Analysis Results 1152; GCN-O3-NEXT: Branch Probability Analysis 1153; GCN-O3-NEXT: Lazy Branch Probability Analysis 1154; GCN-O3-NEXT: Lazy Block Frequency Analysis 1155; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 1156; GCN-O3-NEXT: MachineDominator Tree Construction 1157; GCN-O3-NEXT: SI Fix SGPR copies 1158; GCN-O3-NEXT: MachinePostDominator Tree Construction 1159; GCN-O3-NEXT: SI Lower i1 Copies 1160; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions 1161; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1162; GCN-O3-NEXT: Early Tail Duplication 1163; GCN-O3-NEXT: Optimize machine instruction PHIs 1164; GCN-O3-NEXT: Slot index numbering 1165; GCN-O3-NEXT: Merge disjoint stack slots 1166; GCN-O3-NEXT: Local Stack Slot Allocation 1167; GCN-O3-NEXT: Remove dead machine instructions 1168; GCN-O3-NEXT: MachineDominator Tree Construction 1169; GCN-O3-NEXT: Machine Natural Loop Construction 1170; GCN-O3-NEXT: Machine Block Frequency Analysis 1171; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1172; GCN-O3-NEXT: MachineDominator Tree Construction 1173; GCN-O3-NEXT: Machine Block Frequency Analysis 1174; GCN-O3-NEXT: Machine Common Subexpression Elimination 1175; GCN-O3-NEXT: MachinePostDominator Tree Construction 1176; GCN-O3-NEXT: Machine Cycle Info Analysis 1177; GCN-O3-NEXT: Machine code sinking 1178; GCN-O3-NEXT: Peephole Optimizations 1179; GCN-O3-NEXT: Remove dead machine instructions 1180; GCN-O3-NEXT: SI Fold Operands 1181; GCN-O3-NEXT: GCN DPP Combine 1182; GCN-O3-NEXT: SI Load Store Optimizer 1183; GCN-O3-NEXT: SI Peephole SDWA 1184; GCN-O3-NEXT: Machine Block Frequency Analysis 1185; GCN-O3-NEXT: MachineDominator Tree Construction 1186; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1187; GCN-O3-NEXT: MachineDominator Tree Construction 1188; GCN-O3-NEXT: Machine Block Frequency Analysis 1189; GCN-O3-NEXT: Machine Common Subexpression Elimination 1190; GCN-O3-NEXT: SI Fold Operands 1191; GCN-O3-NEXT: Remove dead machine instructions 1192; GCN-O3-NEXT: SI Shrink Instructions 1193; GCN-O3-NEXT: Register Usage Information Propagation 1194; GCN-O3-NEXT: Detect Dead Lanes 1195; GCN-O3-NEXT: Remove dead machine instructions 1196; GCN-O3-NEXT: Process Implicit Definitions 1197; GCN-O3-NEXT: Remove unreachable machine basic blocks 1198; GCN-O3-NEXT: Live Variable Analysis 1199; GCN-O3-NEXT: SI Optimize VGPR LiveRange 1200; GCN-O3-NEXT: Eliminate PHI nodes for register allocation 1201; GCN-O3-NEXT: SI Lower control flow pseudo instructions 1202; GCN-O3-NEXT: Two-Address instruction pass 1203; GCN-O3-NEXT: Slot index numbering 1204; GCN-O3-NEXT: Live Interval Analysis 1205; GCN-O3-NEXT: Machine Natural Loop Construction 1206; GCN-O3-NEXT: Simple Register Coalescing 1207; GCN-O3-NEXT: Rename Disconnected Subregister Components 1208; GCN-O3-NEXT: AMDGPU Pre-RA optimizations 1209; GCN-O3-NEXT: Machine Instruction Scheduler 1210; GCN-O3-NEXT: MachinePostDominator Tree Construction 1211; GCN-O3-NEXT: SI Whole Quad Mode 1212; GCN-O3-NEXT: Virtual Register Map 1213; GCN-O3-NEXT: Live Register Matrix 1214; GCN-O3-NEXT: SI Pre-allocate WWM Registers 1215; GCN-O3-NEXT: SI optimize exec mask operations pre-RA 1216; GCN-O3-NEXT: SI Form memory clauses 1217; GCN-O3-NEXT: Machine Natural Loop Construction 1218; GCN-O3-NEXT: Machine Block Frequency Analysis 1219; GCN-O3-NEXT: Debug Variable Analysis 1220; GCN-O3-NEXT: Live Stack Slot Analysis 1221; GCN-O3-NEXT: Virtual Register Map 1222; GCN-O3-NEXT: Live Register Matrix 1223; GCN-O3-NEXT: Bundle Machine CFG Edges 1224; GCN-O3-NEXT: Spill Code Placement Analysis 1225; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1226; GCN-O3-NEXT: Machine Optimization Remark Emitter 1227; GCN-O3-NEXT: Greedy Register Allocator 1228; GCN-O3-NEXT: Virtual Register Rewriter 1229; GCN-O3-NEXT: SI lower SGPR spill instructions 1230; GCN-O3-NEXT: Virtual Register Map 1231; GCN-O3-NEXT: Live Register Matrix 1232; GCN-O3-NEXT: Greedy Register Allocator 1233; GCN-O3-NEXT: GCN NSA Reassign 1234; GCN-O3-NEXT: Virtual Register Rewriter 1235; GCN-O3-NEXT: Stack Slot Coloring 1236; GCN-O3-NEXT: Machine Copy Propagation Pass 1237; GCN-O3-NEXT: Machine Loop Invariant Code Motion 1238; GCN-O3-NEXT: SI Fix VGPR copies 1239; GCN-O3-NEXT: SI optimize exec mask operations 1240; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis 1241; GCN-O3-NEXT: Fixup Statepoint Caller Saved 1242; GCN-O3-NEXT: PostRA Machine Sink 1243; GCN-O3-NEXT: MachineDominator Tree Construction 1244; GCN-O3-NEXT: Machine Natural Loop Construction 1245; GCN-O3-NEXT: Machine Block Frequency Analysis 1246; GCN-O3-NEXT: MachinePostDominator Tree Construction 1247; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1248; GCN-O3-NEXT: Machine Optimization Remark Emitter 1249; GCN-O3-NEXT: Shrink Wrapping analysis 1250; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization 1251; GCN-O3-NEXT: Control Flow Optimizer 1252; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1253; GCN-O3-NEXT: Tail Duplication 1254; GCN-O3-NEXT: Machine Copy Propagation Pass 1255; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass 1256; GCN-O3-NEXT: SI Shrink Instructions 1257; GCN-O3-NEXT: SI post-RA bundler 1258; GCN-O3-NEXT: MachineDominator Tree Construction 1259; GCN-O3-NEXT: Machine Natural Loop Construction 1260; GCN-O3-NEXT: PostRA Machine Instruction Scheduler 1261; GCN-O3-NEXT: Machine Block Frequency Analysis 1262; GCN-O3-NEXT: MachinePostDominator Tree Construction 1263; GCN-O3-NEXT: Branch Probability Basic Block Placement 1264; GCN-O3-NEXT: Insert fentry calls 1265; GCN-O3-NEXT: Insert XRay ops 1266; GCN-O3-NEXT: GCN Create VOPD Instructions 1267; GCN-O3-NEXT: SI Memory Legalizer 1268; GCN-O3-NEXT: MachineDominator Tree Construction 1269; GCN-O3-NEXT: Machine Natural Loop Construction 1270; GCN-O3-NEXT: MachinePostDominator Tree Construction 1271; GCN-O3-NEXT: SI insert wait instructions 1272; GCN-O3-NEXT: Insert required mode register values 1273; GCN-O3-NEXT: SI Insert Hard Clauses 1274; GCN-O3-NEXT: SI Final Branch Preparation 1275; GCN-O3-NEXT: SI peephole optimizations 1276; GCN-O3-NEXT: Post RA hazard recognizer 1277; GCN-O3-NEXT: Release VGPRs 1278; GCN-O3-NEXT: AMDGPU Insert Delay ALU 1279; GCN-O3-NEXT: Branch relaxation pass 1280; GCN-O3-NEXT: Register Usage Information Collector Pass 1281; GCN-O3-NEXT: Live DEBUG_VALUE analysis 1282; GCN-O3-NEXT: Function register usage analysis 1283; GCN-O3-NEXT: FunctionPass Manager 1284; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1285; GCN-O3-NEXT: Machine Optimization Remark Emitter 1286; GCN-O3-NEXT: AMDGPU Assembly Printer 1287; GCN-O3-NEXT: Free MachineFunction 1288; GCN-O3-NEXT:Pass Arguments: -domtree 1289; GCN-O3-NEXT: FunctionPass Manager 1290; GCN-O3-NEXT: Dominator Tree Construction 1291 1292define void @empty() { 1293 ret void 1294} 1295