1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; fixme: the following line is added to cleanup bots, will be removed in weeks. 4; RUN: rm -f %S/llc-pipeline.s 5; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s 7; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 8; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s 9; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \ 10; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \ 11; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s 12; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 13; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s 14; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \ 15; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s 16 17; REQUIRES: asserts 18 19; GCN-O0:Target Library Information 20; GCN-O0-NEXT:Target Pass Configuration 21; GCN-O0-NEXT:Machine Module Information 22; GCN-O0-NEXT:Target Transform Information 23; GCN-O0-NEXT:Assumption Cache Tracker 24; GCN-O0-NEXT:Profile summary info 25; GCN-O0-NEXT:Argument Register Usage Information Storage 26; GCN-O0-NEXT:Create Garbage Collector Module Metadata 27; GCN-O0-NEXT:Register Usage Information Storage 28; GCN-O0-NEXT:Machine Branch Probability Analysis 29; GCN-O0-NEXT: ModulePass Manager 30; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering 31; GCN-O0-NEXT: AMDGPU Printf lowering 32; GCN-O0-NEXT: FunctionPass Manager 33; GCN-O0-NEXT: Dominator Tree Construction 34; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU 35; GCN-O0-NEXT: Fix function bitcasts for AMDGPU 36; GCN-O0-NEXT: FunctionPass Manager 37; GCN-O0-NEXT: Early propagate attributes from kernels to functions 38; GCN-O0-NEXT: AMDGPU Lower Intrinsics 39; GCN-O0-NEXT: AMDGPU Inline All Functions 40; GCN-O0-NEXT: CallGraph Construction 41; GCN-O0-NEXT: Call Graph SCC Pass Manager 42; GCN-O0-NEXT: Inliner for always_inline functions 43; GCN-O0-NEXT: A No-Op Barrier Pass 44; GCN-O0-NEXT: Lower OpenCL enqueued blocks 45; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions 46; GCN-O0-NEXT: FunctionPass Manager 47; GCN-O0-NEXT: Expand Atomic instructions 48; GCN-O0-NEXT: Lower constant intrinsics 49; GCN-O0-NEXT: Remove unreachable blocks from the CFG 50; GCN-O0-NEXT: Expand vector predication intrinsics 51; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics 52; GCN-O0-NEXT: Expand reduction intrinsics 53; GCN-O0-NEXT: AMDGPU Attributor 54; GCN-O0-NEXT: CallGraph Construction 55; GCN-O0-NEXT: Call Graph SCC Pass Manager 56; GCN-O0-NEXT: AMDGPU Annotate Kernel Features 57; GCN-O0-NEXT: FunctionPass Manager 58; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments 59; GCN-O0-NEXT: Lazy Value Information Analysis 60; GCN-O0-NEXT: Lower SwitchInst's to branches 61; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators 62; GCN-O0-NEXT: Remove unreachable blocks from the CFG 63; GCN-O0-NEXT: Post-Dominator Tree Construction 64; GCN-O0-NEXT: Dominator Tree Construction 65; GCN-O0-NEXT: Natural Loop Information 66; GCN-O0-NEXT: Legacy Divergence Analysis 67; GCN-O0-NEXT: Unify divergent function exit nodes 68; GCN-O0-NEXT: Lazy Value Information Analysis 69; GCN-O0-NEXT: Lower SwitchInst's to branches 70; GCN-O0-NEXT: Dominator Tree Construction 71; GCN-O0-NEXT: Natural Loop Information 72; GCN-O0-NEXT: Convert irreducible control-flow into natural loops 73; GCN-O0-NEXT: Fixup each natural loop to have a single exit block 74; GCN-O0-NEXT: Post-Dominator Tree Construction 75; GCN-O0-NEXT: Dominance Frontier Construction 76; GCN-O0-NEXT: Detect single entry single exit regions 77; GCN-O0-NEXT: Region Pass Manager 78; GCN-O0-NEXT: Structurize control flow 79; GCN-O0-NEXT: Post-Dominator Tree Construction 80; GCN-O0-NEXT: Natural Loop Information 81; GCN-O0-NEXT: Legacy Divergence Analysis 82; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 83; GCN-O0-NEXT: Function Alias Analysis Results 84; GCN-O0-NEXT: Memory SSA 85; GCN-O0-NEXT: AMDGPU Annotate Uniform Values 86; GCN-O0-NEXT: SI annotate control flow 87; GCN-O0-NEXT: LCSSA Verifier 88; GCN-O0-NEXT: Loop-Closed SSA Form Pass 89; GCN-O0-NEXT: DummyCGSCCPass 90; GCN-O0-NEXT: FunctionPass Manager 91; GCN-O0-NEXT: Safe Stack instrumentation pass 92; GCN-O0-NEXT: Insert stack protectors 93; GCN-O0-NEXT: Dominator Tree Construction 94; GCN-O0-NEXT: Post-Dominator Tree Construction 95; GCN-O0-NEXT: Natural Loop Information 96; GCN-O0-NEXT: Legacy Divergence Analysis 97; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 98; GCN-O0-NEXT: MachineDominator Tree Construction 99; GCN-O0-NEXT: SI Fix SGPR copies 100; GCN-O0-NEXT: MachinePostDominator Tree Construction 101; GCN-O0-NEXT: SI Lower i1 Copies 102; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions 103; GCN-O0-NEXT: Local Stack Slot Allocation 104; GCN-O0-NEXT: Register Usage Information Propagation 105; GCN-O0-NEXT: Eliminate PHI nodes for register allocation 106; GCN-O0-NEXT: SI Lower control flow pseudo instructions 107; GCN-O0-NEXT: Two-Address instruction pass 108; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl) 109; GCN-O0-NEXT: Function Alias Analysis Results 110; GCN-O0-NEXT: MachineDominator Tree Construction 111; GCN-O0-NEXT: Slot index numbering 112; GCN-O0-NEXT: Live Interval Analysis 113; GCN-O0-NEXT: MachinePostDominator Tree Construction 114; GCN-O0-NEXT: SI Whole Quad Mode 115; GCN-O0-NEXT: Virtual Register Map 116; GCN-O0-NEXT: Live Register Matrix 117; GCN-O0-NEXT: SI Pre-allocate WWM Registers 118; GCN-O0-NEXT: Fast Register Allocator 119; GCN-O0-NEXT: SI lower SGPR spill instructions 120; GCN-O0-NEXT: Fast Register Allocator 121; GCN-O0-NEXT: SI Fix VGPR copies 122; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis 123; GCN-O0-NEXT: Fixup Statepoint Caller Saved 124; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 125; GCN-O0-NEXT: Machine Optimization Remark Emitter 126; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization 127; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass 128; GCN-O0-NEXT: SI post-RA bundler 129; GCN-O0-NEXT: Insert fentry calls 130; GCN-O0-NEXT: Insert XRay ops 131; GCN-O0-NEXT: SI Memory Legalizer 132; GCN-O0-NEXT: MachinePostDominator Tree Construction 133; GCN-O0-NEXT: SI insert wait instructions 134; GCN-O0-NEXT: Insert required mode register values 135; GCN-O0-NEXT: MachineDominator Tree Construction 136; GCN-O0-NEXT: SI Final Branch Preparation 137; GCN-O0-NEXT: Post RA hazard recognizer 138; GCN-O0-NEXT: Branch relaxation pass 139; GCN-O0-NEXT: Register Usage Information Collector Pass 140; GCN-O0-NEXT: Live DEBUG_VALUE analysis 141; GCN-O0-NEXT: Function register usage analysis 142; GCN-O0-NEXT: FunctionPass Manager 143; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis 144; GCN-O0-NEXT: Machine Optimization Remark Emitter 145; GCN-O0-NEXT: AMDGPU Assembly Printer 146; GCN-O0-NEXT: Free MachineFunction 147; GCN-O0-NEXT:Pass Arguments: -domtree 148; GCN-O0-NEXT: FunctionPass Manager 149; GCN-O0-NEXT: Dominator Tree Construction 150 151; GCN-O1:Target Library Information 152; GCN-O1-NEXT:Target Pass Configuration 153; GCN-O1-NEXT:Machine Module Information 154; GCN-O1-NEXT:Target Transform Information 155; GCN-O1-NEXT:Assumption Cache Tracker 156; GCN-O1-NEXT:Profile summary info 157; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis 158; GCN-O1-NEXT:External Alias Analysis 159; GCN-O1-NEXT:Type-Based Alias Analysis 160; GCN-O1-NEXT:Scoped NoAlias Alias Analysis 161; GCN-O1-NEXT:Argument Register Usage Information Storage 162; GCN-O1-NEXT:Create Garbage Collector Module Metadata 163; GCN-O1-NEXT:Machine Branch Probability Analysis 164; GCN-O1-NEXT:Register Usage Information Storage 165; GCN-O1-NEXT: ModulePass Manager 166; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering 167; GCN-O1-NEXT: AMDGPU Printf lowering 168; GCN-O1-NEXT: FunctionPass Manager 169; GCN-O1-NEXT: Dominator Tree Construction 170; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU 171; GCN-O1-NEXT: Fix function bitcasts for AMDGPU 172; GCN-O1-NEXT: FunctionPass Manager 173; GCN-O1-NEXT: Early propagate attributes from kernels to functions 174; GCN-O1-NEXT: AMDGPU Lower Intrinsics 175; GCN-O1-NEXT: AMDGPU Inline All Functions 176; GCN-O1-NEXT: CallGraph Construction 177; GCN-O1-NEXT: Call Graph SCC Pass Manager 178; GCN-O1-NEXT: Inliner for always_inline functions 179; GCN-O1-NEXT: A No-Op Barrier Pass 180; GCN-O1-NEXT: Lower OpenCL enqueued blocks 181; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions 182; GCN-O1-NEXT: FunctionPass Manager 183; GCN-O1-NEXT: Infer address spaces 184; GCN-O1-NEXT: Expand Atomic instructions 185; GCN-O1-NEXT: AMDGPU Promote Alloca 186; GCN-O1-NEXT: Dominator Tree Construction 187; GCN-O1-NEXT: SROA 188; GCN-O1-NEXT: Post-Dominator Tree Construction 189; GCN-O1-NEXT: Natural Loop Information 190; GCN-O1-NEXT: Legacy Divergence Analysis 191; GCN-O1-NEXT: AMDGPU IR optimizations 192; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 193; GCN-O1-NEXT: Canonicalize natural loops 194; GCN-O1-NEXT: Scalar Evolution Analysis 195; GCN-O1-NEXT: Loop Pass Manager 196; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops 197; GCN-O1-NEXT: Induction Variable Users 198; GCN-O1-NEXT: Loop Strength Reduction 199; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 200; GCN-O1-NEXT: Function Alias Analysis Results 201; GCN-O1-NEXT: Merge contiguous icmps into a memcmp 202; GCN-O1-NEXT: Natural Loop Information 203; GCN-O1-NEXT: Lazy Branch Probability Analysis 204; GCN-O1-NEXT: Lazy Block Frequency Analysis 205; GCN-O1-NEXT: Expand memcmp() to load/stores 206; GCN-O1-NEXT: Lower constant intrinsics 207; GCN-O1-NEXT: Remove unreachable blocks from the CFG 208; GCN-O1-NEXT: Natural Loop Information 209; GCN-O1-NEXT: Post-Dominator Tree Construction 210; GCN-O1-NEXT: Branch Probability Analysis 211; GCN-O1-NEXT: Block Frequency Analysis 212; GCN-O1-NEXT: Constant Hoisting 213; GCN-O1-NEXT: Replace intrinsics with calls to vector library 214; GCN-O1-NEXT: Partially inline calls to library functions 215; GCN-O1-NEXT: Expand vector predication intrinsics 216; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics 217; GCN-O1-NEXT: Expand reduction intrinsics 218; GCN-O1-NEXT: AMDGPU Attributor 219; GCN-O1-NEXT: CallGraph Construction 220; GCN-O1-NEXT: Call Graph SCC Pass Manager 221; GCN-O1-NEXT: AMDGPU Annotate Kernel Features 222; GCN-O1-NEXT: FunctionPass Manager 223; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments 224; GCN-O1-NEXT: Dominator Tree Construction 225; GCN-O1-NEXT: Natural Loop Information 226; GCN-O1-NEXT: CodeGen Prepare 227; GCN-O1-NEXT: Lazy Value Information Analysis 228; GCN-O1-NEXT: Lower SwitchInst's to branches 229; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators 230; GCN-O1-NEXT: Remove unreachable blocks from the CFG 231; GCN-O1-NEXT: Dominator Tree Construction 232; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 233; GCN-O1-NEXT: Function Alias Analysis Results 234; GCN-O1-NEXT: Flatten the CFG 235; GCN-O1-NEXT: Dominator Tree Construction 236; GCN-O1-NEXT: Post-Dominator Tree Construction 237; GCN-O1-NEXT: Natural Loop Information 238; GCN-O1-NEXT: Legacy Divergence Analysis 239; GCN-O1-NEXT: AMDGPU IR late optimizations 240; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 241; GCN-O1-NEXT: Function Alias Analysis Results 242; GCN-O1-NEXT: Code sinking 243; GCN-O1-NEXT: Legacy Divergence Analysis 244; GCN-O1-NEXT: Unify divergent function exit nodes 245; GCN-O1-NEXT: Lazy Value Information Analysis 246; GCN-O1-NEXT: Lower SwitchInst's to branches 247; GCN-O1-NEXT: Dominator Tree Construction 248; GCN-O1-NEXT: Natural Loop Information 249; GCN-O1-NEXT: Convert irreducible control-flow into natural loops 250; GCN-O1-NEXT: Fixup each natural loop to have a single exit block 251; GCN-O1-NEXT: Post-Dominator Tree Construction 252; GCN-O1-NEXT: Dominance Frontier Construction 253; GCN-O1-NEXT: Detect single entry single exit regions 254; GCN-O1-NEXT: Region Pass Manager 255; GCN-O1-NEXT: Structurize control flow 256; GCN-O1-NEXT: Post-Dominator Tree Construction 257; GCN-O1-NEXT: Natural Loop Information 258; GCN-O1-NEXT: Legacy Divergence Analysis 259; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 260; GCN-O1-NEXT: Function Alias Analysis Results 261; GCN-O1-NEXT: Memory SSA 262; GCN-O1-NEXT: AMDGPU Annotate Uniform Values 263; GCN-O1-NEXT: SI annotate control flow 264; GCN-O1-NEXT: LCSSA Verifier 265; GCN-O1-NEXT: Loop-Closed SSA Form Pass 266; GCN-O1-NEXT: DummyCGSCCPass 267; GCN-O1-NEXT: FunctionPass Manager 268; GCN-O1-NEXT: Safe Stack instrumentation pass 269; GCN-O1-NEXT: Insert stack protectors 270; GCN-O1-NEXT: Dominator Tree Construction 271; GCN-O1-NEXT: Post-Dominator Tree Construction 272; GCN-O1-NEXT: Natural Loop Information 273; GCN-O1-NEXT: Legacy Divergence Analysis 274; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl) 275; GCN-O1-NEXT: Function Alias Analysis Results 276; GCN-O1-NEXT: Branch Probability Analysis 277; GCN-O1-NEXT: Lazy Branch Probability Analysis 278; GCN-O1-NEXT: Lazy Block Frequency Analysis 279; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 280; GCN-O1-NEXT: MachineDominator Tree Construction 281; GCN-O1-NEXT: SI Fix SGPR copies 282; GCN-O1-NEXT: MachinePostDominator Tree Construction 283; GCN-O1-NEXT: SI Lower i1 Copies 284; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions 285; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 286; GCN-O1-NEXT: Early Tail Duplication 287; GCN-O1-NEXT: Optimize machine instruction PHIs 288; GCN-O1-NEXT: Slot index numbering 289; GCN-O1-NEXT: Merge disjoint stack slots 290; GCN-O1-NEXT: Local Stack Slot Allocation 291; GCN-O1-NEXT: Remove dead machine instructions 292; GCN-O1-NEXT: MachineDominator Tree Construction 293; GCN-O1-NEXT: Machine Natural Loop Construction 294; GCN-O1-NEXT: Machine Block Frequency Analysis 295; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion 296; GCN-O1-NEXT: MachineDominator Tree Construction 297; GCN-O1-NEXT: Machine Block Frequency Analysis 298; GCN-O1-NEXT: Machine Common Subexpression Elimination 299; GCN-O1-NEXT: MachinePostDominator Tree Construction 300; GCN-O1-NEXT: Machine code sinking 301; GCN-O1-NEXT: Peephole Optimizations 302; GCN-O1-NEXT: Remove dead machine instructions 303; GCN-O1-NEXT: SI Fold Operands 304; GCN-O1-NEXT: GCN DPP Combine 305; GCN-O1-NEXT: SI Load Store Optimizer 306; GCN-O1-NEXT: Remove dead machine instructions 307; GCN-O1-NEXT: SI Shrink Instructions 308; GCN-O1-NEXT: Register Usage Information Propagation 309; GCN-O1-NEXT: Detect Dead Lanes 310; GCN-O1-NEXT: Remove dead machine instructions 311; GCN-O1-NEXT: Process Implicit Definitions 312; GCN-O1-NEXT: Remove unreachable machine basic blocks 313; GCN-O1-NEXT: Live Variable Analysis 314; GCN-O1-NEXT: MachineDominator Tree Construction 315; GCN-O1-NEXT: SI Optimize VGPR LiveRange 316; GCN-O1-NEXT: Eliminate PHI nodes for register allocation 317; GCN-O1-NEXT: SI Lower control flow pseudo instructions 318; GCN-O1-NEXT: Two-Address instruction pass 319; GCN-O1-NEXT: MachineDominator Tree Construction 320; GCN-O1-NEXT: Slot index numbering 321; GCN-O1-NEXT: Live Interval Analysis 322; GCN-O1-NEXT: Machine Natural Loop Construction 323; GCN-O1-NEXT: Simple Register Coalescing 324; GCN-O1-NEXT: Rename Disconnected Subregister Components 325; GCN-O1-NEXT: Machine Instruction Scheduler 326; GCN-O1-NEXT: MachinePostDominator Tree Construction 327; GCN-O1-NEXT: SI Whole Quad Mode 328; GCN-O1-NEXT: Virtual Register Map 329; GCN-O1-NEXT: Live Register Matrix 330; GCN-O1-NEXT: SI Pre-allocate WWM Registers 331; GCN-O1-NEXT: SI optimize exec mask operations pre-RA 332; GCN-O1-NEXT: Machine Natural Loop Construction 333; GCN-O1-NEXT: Machine Block Frequency Analysis 334; GCN-O1-NEXT: Debug Variable Analysis 335; GCN-O1-NEXT: Live Stack Slot Analysis 336; GCN-O1-NEXT: Virtual Register Map 337; GCN-O1-NEXT: Live Register Matrix 338; GCN-O1-NEXT: Bundle Machine CFG Edges 339; GCN-O1-NEXT: Spill Code Placement Analysis 340; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 341; GCN-O1-NEXT: Machine Optimization Remark Emitter 342; GCN-O1-NEXT: Greedy Register Allocator 343; GCN-O1-NEXT: Virtual Register Rewriter 344; GCN-O1-NEXT: SI lower SGPR spill instructions 345; GCN-O1-NEXT: Virtual Register Map 346; GCN-O1-NEXT: Live Register Matrix 347; GCN-O1-NEXT: Greedy Register Allocator 348; GCN-O1-NEXT: GCN NSA Reassign 349; GCN-O1-NEXT: Virtual Register Rewriter 350; GCN-O1-NEXT: Stack Slot Coloring 351; GCN-O1-NEXT: Machine Copy Propagation Pass 352; GCN-O1-NEXT: Machine Loop Invariant Code Motion 353; GCN-O1-NEXT: SI Fix VGPR copies 354; GCN-O1-NEXT: SI optimize exec mask operations 355; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis 356; GCN-O1-NEXT: Fixup Statepoint Caller Saved 357; GCN-O1-NEXT: PostRA Machine Sink 358; GCN-O1-NEXT: MachineDominator Tree Construction 359; GCN-O1-NEXT: Machine Natural Loop Construction 360; GCN-O1-NEXT: Machine Block Frequency Analysis 361; GCN-O1-NEXT: MachinePostDominator Tree Construction 362; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 363; GCN-O1-NEXT: Machine Optimization Remark Emitter 364; GCN-O1-NEXT: Shrink Wrapping analysis 365; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization 366; GCN-O1-NEXT: Control Flow Optimizer 367; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 368; GCN-O1-NEXT: Tail Duplication 369; GCN-O1-NEXT: Machine Copy Propagation Pass 370; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass 371; GCN-O1-NEXT: SI post-RA bundler 372; GCN-O1-NEXT: MachineDominator Tree Construction 373; GCN-O1-NEXT: Machine Natural Loop Construction 374; GCN-O1-NEXT: PostRA Machine Instruction Scheduler 375; GCN-O1-NEXT: Machine Block Frequency Analysis 376; GCN-O1-NEXT: MachinePostDominator Tree Construction 377; GCN-O1-NEXT: Branch Probability Basic Block Placement 378; GCN-O1-NEXT: Insert fentry calls 379; GCN-O1-NEXT: Insert XRay ops 380; GCN-O1-NEXT: SI Memory Legalizer 381; GCN-O1-NEXT: MachinePostDominator Tree Construction 382; GCN-O1-NEXT: SI insert wait instructions 383; GCN-O1-NEXT: SI Shrink Instructions 384; GCN-O1-NEXT: Insert required mode register values 385; GCN-O1-NEXT: SI Insert Hard Clauses 386; GCN-O1-NEXT: MachineDominator Tree Construction 387; GCN-O1-NEXT: SI Final Branch Preparation 388; GCN-O1-NEXT: SI peephole optimizations 389; GCN-O1-NEXT: Post RA hazard recognizer 390; GCN-O1-NEXT: Branch relaxation pass 391; GCN-O1-NEXT: Register Usage Information Collector Pass 392; GCN-O1-NEXT: Live DEBUG_VALUE analysis 393; GCN-O1-NEXT: Function register usage analysis 394; GCN-O1-NEXT: FunctionPass Manager 395; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis 396; GCN-O1-NEXT: Machine Optimization Remark Emitter 397; GCN-O1-NEXT: AMDGPU Assembly Printer 398; GCN-O1-NEXT: Free MachineFunction 399; GCN-O1-NEXT:Pass Arguments: -domtree 400; GCN-O1-NEXT: FunctionPass Manager 401; GCN-O1-NEXT: Dominator Tree Construction 402 403; GCN-O1-OPTS:Target Library Information 404; GCN-O1-OPTS-NEXT:Target Pass Configuration 405; GCN-O1-OPTS-NEXT:Machine Module Information 406; GCN-O1-OPTS-NEXT:Target Transform Information 407; GCN-O1-OPTS-NEXT:Assumption Cache Tracker 408; GCN-O1-OPTS-NEXT:Profile summary info 409; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis 410; GCN-O1-OPTS-NEXT:External Alias Analysis 411; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis 412; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis 413; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage 414; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata 415; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis 416; GCN-O1-OPTS-NEXT:Register Usage Information Storage 417; GCN-O1-OPTS-NEXT: ModulePass Manager 418; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering 419; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering 420; GCN-O1-OPTS-NEXT: FunctionPass Manager 421; GCN-O1-OPTS-NEXT: Dominator Tree Construction 422; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU 423; GCN-O1-OPTS-NEXT: Fix function bitcasts for AMDGPU 424; GCN-O1-OPTS-NEXT: FunctionPass Manager 425; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions 426; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics 427; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions 428; GCN-O1-OPTS-NEXT: CallGraph Construction 429; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 430; GCN-O1-OPTS-NEXT: Inliner for always_inline functions 431; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass 432; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks 433; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions 434; GCN-O1-OPTS-NEXT: FunctionPass Manager 435; GCN-O1-OPTS-NEXT: Infer address spaces 436; GCN-O1-OPTS-NEXT: Expand Atomic instructions 437; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca 438; GCN-O1-OPTS-NEXT: Dominator Tree Construction 439; GCN-O1-OPTS-NEXT: SROA 440; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 441; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 442; GCN-O1-OPTS-NEXT: Memory SSA 443; GCN-O1-OPTS-NEXT: Natural Loop Information 444; GCN-O1-OPTS-NEXT: Canonicalize natural loops 445; GCN-O1-OPTS-NEXT: LCSSA Verifier 446; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 447; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 448; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 449; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 450; GCN-O1-OPTS-NEXT: Loop Pass Manager 451; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion 452; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 453; GCN-O1-OPTS-NEXT: Speculatively execute instructions 454; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 455; GCN-O1-OPTS-NEXT: Straight line strength reduction 456; GCN-O1-OPTS-NEXT: Early CSE 457; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 458; GCN-O1-OPTS-NEXT: Nary reassociation 459; GCN-O1-OPTS-NEXT: Early CSE 460; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 461; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 462; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations 463; GCN-O1-OPTS-NEXT: Canonicalize natural loops 464; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 465; GCN-O1-OPTS-NEXT: Loop Pass Manager 466; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops 467; GCN-O1-OPTS-NEXT: Induction Variable Users 468; GCN-O1-OPTS-NEXT: Loop Strength Reduction 469; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 470; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 471; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp 472; GCN-O1-OPTS-NEXT: Natural Loop Information 473; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 474; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 475; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores 476; GCN-O1-OPTS-NEXT: Lower constant intrinsics 477; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 478; GCN-O1-OPTS-NEXT: Natural Loop Information 479; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 480; GCN-O1-OPTS-NEXT: Branch Probability Analysis 481; GCN-O1-OPTS-NEXT: Block Frequency Analysis 482; GCN-O1-OPTS-NEXT: Constant Hoisting 483; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library 484; GCN-O1-OPTS-NEXT: Partially inline calls to library functions 485; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics 486; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics 487; GCN-O1-OPTS-NEXT: Expand reduction intrinsics 488; GCN-O1-OPTS-NEXT: Early CSE 489; GCN-O1-OPTS-NEXT: AMDGPU Attributor 490; GCN-O1-OPTS-NEXT: CallGraph Construction 491; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager 492; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features 493; GCN-O1-OPTS-NEXT: FunctionPass Manager 494; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments 495; GCN-O1-OPTS-NEXT: Dominator Tree Construction 496; GCN-O1-OPTS-NEXT: Natural Loop Information 497; GCN-O1-OPTS-NEXT: CodeGen Prepare 498; GCN-O1-OPTS-NEXT: Dominator Tree Construction 499; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 500; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 501; GCN-O1-OPTS-NEXT: Natural Loop Information 502; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis 503; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer 504; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 505; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 506; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators 507; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG 508; GCN-O1-OPTS-NEXT: Dominator Tree Construction 509; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 510; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 511; GCN-O1-OPTS-NEXT: Flatten the CFG 512; GCN-O1-OPTS-NEXT: Dominator Tree Construction 513; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 514; GCN-O1-OPTS-NEXT: Natural Loop Information 515; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 516; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations 517; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 518; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 519; GCN-O1-OPTS-NEXT: Code sinking 520; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 521; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes 522; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis 523; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches 524; GCN-O1-OPTS-NEXT: Dominator Tree Construction 525; GCN-O1-OPTS-NEXT: Natural Loop Information 526; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops 527; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block 528; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 529; GCN-O1-OPTS-NEXT: Dominance Frontier Construction 530; GCN-O1-OPTS-NEXT: Detect single entry single exit regions 531; GCN-O1-OPTS-NEXT: Region Pass Manager 532; GCN-O1-OPTS-NEXT: Structurize control flow 533; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 534; GCN-O1-OPTS-NEXT: Natural Loop Information 535; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 536; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 537; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 538; GCN-O1-OPTS-NEXT: Memory SSA 539; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values 540; GCN-O1-OPTS-NEXT: SI annotate control flow 541; GCN-O1-OPTS-NEXT: LCSSA Verifier 542; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass 543; GCN-O1-OPTS-NEXT: DummyCGSCCPass 544; GCN-O1-OPTS-NEXT: FunctionPass Manager 545; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass 546; GCN-O1-OPTS-NEXT: Insert stack protectors 547; GCN-O1-OPTS-NEXT: Dominator Tree Construction 548; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction 549; GCN-O1-OPTS-NEXT: Natural Loop Information 550; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis 551; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl) 552; GCN-O1-OPTS-NEXT: Function Alias Analysis Results 553; GCN-O1-OPTS-NEXT: Branch Probability Analysis 554; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis 555; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis 556; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 557; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 558; GCN-O1-OPTS-NEXT: SI Fix SGPR copies 559; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 560; GCN-O1-OPTS-NEXT: SI Lower i1 Copies 561; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions 562; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 563; GCN-O1-OPTS-NEXT: Early Tail Duplication 564; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs 565; GCN-O1-OPTS-NEXT: Slot index numbering 566; GCN-O1-OPTS-NEXT: Merge disjoint stack slots 567; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation 568; GCN-O1-OPTS-NEXT: Remove dead machine instructions 569; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 570; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 571; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 572; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 573; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 574; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 575; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 576; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 577; GCN-O1-OPTS-NEXT: Machine code sinking 578; GCN-O1-OPTS-NEXT: Peephole Optimizations 579; GCN-O1-OPTS-NEXT: Remove dead machine instructions 580; GCN-O1-OPTS-NEXT: SI Fold Operands 581; GCN-O1-OPTS-NEXT: GCN DPP Combine 582; GCN-O1-OPTS-NEXT: SI Load Store Optimizer 583; GCN-O1-OPTS-NEXT: SI Peephole SDWA 584; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 585; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 586; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion 587; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 588; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 589; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination 590; GCN-O1-OPTS-NEXT: SI Fold Operands 591; GCN-O1-OPTS-NEXT: Remove dead machine instructions 592; GCN-O1-OPTS-NEXT: SI Shrink Instructions 593; GCN-O1-OPTS-NEXT: Register Usage Information Propagation 594; GCN-O1-OPTS-NEXT: Detect Dead Lanes 595; GCN-O1-OPTS-NEXT: Remove dead machine instructions 596; GCN-O1-OPTS-NEXT: Process Implicit Definitions 597; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks 598; GCN-O1-OPTS-NEXT: Live Variable Analysis 599; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange 600; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation 601; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions 602; GCN-O1-OPTS-NEXT: Two-Address instruction pass 603; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 604; GCN-O1-OPTS-NEXT: Slot index numbering 605; GCN-O1-OPTS-NEXT: Live Interval Analysis 606; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 607; GCN-O1-OPTS-NEXT: Simple Register Coalescing 608; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components 609; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations 610; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler 611; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 612; GCN-O1-OPTS-NEXT: SI Whole Quad Mode 613; GCN-O1-OPTS-NEXT: Virtual Register Map 614; GCN-O1-OPTS-NEXT: Live Register Matrix 615; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers 616; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA 617; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 618; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 619; GCN-O1-OPTS-NEXT: Debug Variable Analysis 620; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis 621; GCN-O1-OPTS-NEXT: Virtual Register Map 622; GCN-O1-OPTS-NEXT: Live Register Matrix 623; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges 624; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis 625; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 626; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 627; GCN-O1-OPTS-NEXT: Greedy Register Allocator 628; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 629; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions 630; GCN-O1-OPTS-NEXT: Virtual Register Map 631; GCN-O1-OPTS-NEXT: Live Register Matrix 632; GCN-O1-OPTS-NEXT: Greedy Register Allocator 633; GCN-O1-OPTS-NEXT: GCN NSA Reassign 634; GCN-O1-OPTS-NEXT: Virtual Register Rewriter 635; GCN-O1-OPTS-NEXT: Stack Slot Coloring 636; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 637; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion 638; GCN-O1-OPTS-NEXT: SI Fix VGPR copies 639; GCN-O1-OPTS-NEXT: SI optimize exec mask operations 640; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis 641; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved 642; GCN-O1-OPTS-NEXT: PostRA Machine Sink 643; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 644; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 645; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 646; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 647; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 648; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 649; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis 650; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization 651; GCN-O1-OPTS-NEXT: Control Flow Optimizer 652; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 653; GCN-O1-OPTS-NEXT: Tail Duplication 654; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass 655; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass 656; GCN-O1-OPTS-NEXT: SI post-RA bundler 657; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 658; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction 659; GCN-O1-OPTS-NEXT: PostRA Machine Instruction Scheduler 660; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis 661; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 662; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement 663; GCN-O1-OPTS-NEXT: Insert fentry calls 664; GCN-O1-OPTS-NEXT: Insert XRay ops 665; GCN-O1-OPTS-NEXT: SI Memory Legalizer 666; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction 667; GCN-O1-OPTS-NEXT: SI insert wait instructions 668; GCN-O1-OPTS-NEXT: SI Shrink Instructions 669; GCN-O1-OPTS-NEXT: Insert required mode register values 670; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses 671; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction 672; GCN-O1-OPTS-NEXT: SI Final Branch Preparation 673; GCN-O1-OPTS-NEXT: SI peephole optimizations 674; GCN-O1-OPTS-NEXT: Post RA hazard recognizer 675; GCN-O1-OPTS-NEXT: Branch relaxation pass 676; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass 677; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis 678; GCN-O1-OPTS-NEXT: Function register usage analysis 679; GCN-O1-OPTS-NEXT: FunctionPass Manager 680; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis 681; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter 682; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer 683; GCN-O1-OPTS-NEXT: Free MachineFunction 684; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree 685; GCN-O1-OPTS-NEXT: FunctionPass Manager 686; GCN-O1-OPTS-NEXT: Dominator Tree Construction 687 688; GCN-O2:Target Library Information 689; GCN-O2-NEXT:Target Pass Configuration 690; GCN-O2-NEXT:Machine Module Information 691; GCN-O2-NEXT:Target Transform Information 692; GCN-O2-NEXT:Assumption Cache Tracker 693; GCN-O2-NEXT:Profile summary info 694; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis 695; GCN-O2-NEXT:External Alias Analysis 696; GCN-O2-NEXT:Type-Based Alias Analysis 697; GCN-O2-NEXT:Scoped NoAlias Alias Analysis 698; GCN-O2-NEXT:Argument Register Usage Information Storage 699; GCN-O2-NEXT:Create Garbage Collector Module Metadata 700; GCN-O2-NEXT:Machine Branch Probability Analysis 701; GCN-O2-NEXT:Register Usage Information Storage 702; GCN-O2-NEXT: ModulePass Manager 703; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering 704; GCN-O2-NEXT: AMDGPU Printf lowering 705; GCN-O2-NEXT: FunctionPass Manager 706; GCN-O2-NEXT: Dominator Tree Construction 707; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU 708; GCN-O2-NEXT: Fix function bitcasts for AMDGPU 709; GCN-O2-NEXT: FunctionPass Manager 710; GCN-O2-NEXT: Early propagate attributes from kernels to functions 711; GCN-O2-NEXT: AMDGPU Lower Intrinsics 712; GCN-O2-NEXT: AMDGPU Inline All Functions 713; GCN-O2-NEXT: CallGraph Construction 714; GCN-O2-NEXT: Call Graph SCC Pass Manager 715; GCN-O2-NEXT: Inliner for always_inline functions 716; GCN-O2-NEXT: A No-Op Barrier Pass 717; GCN-O2-NEXT: Lower OpenCL enqueued blocks 718; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions 719; GCN-O2-NEXT: FunctionPass Manager 720; GCN-O2-NEXT: Infer address spaces 721; GCN-O2-NEXT: Expand Atomic instructions 722; GCN-O2-NEXT: AMDGPU Promote Alloca 723; GCN-O2-NEXT: Dominator Tree Construction 724; GCN-O2-NEXT: SROA 725; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 726; GCN-O2-NEXT: Function Alias Analysis Results 727; GCN-O2-NEXT: Memory SSA 728; GCN-O2-NEXT: Natural Loop Information 729; GCN-O2-NEXT: Canonicalize natural loops 730; GCN-O2-NEXT: LCSSA Verifier 731; GCN-O2-NEXT: Loop-Closed SSA Form Pass 732; GCN-O2-NEXT: Scalar Evolution Analysis 733; GCN-O2-NEXT: Lazy Branch Probability Analysis 734; GCN-O2-NEXT: Lazy Block Frequency Analysis 735; GCN-O2-NEXT: Loop Pass Manager 736; GCN-O2-NEXT: Loop Invariant Code Motion 737; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 738; GCN-O2-NEXT: Speculatively execute instructions 739; GCN-O2-NEXT: Scalar Evolution Analysis 740; GCN-O2-NEXT: Straight line strength reduction 741; GCN-O2-NEXT: Early CSE 742; GCN-O2-NEXT: Scalar Evolution Analysis 743; GCN-O2-NEXT: Nary reassociation 744; GCN-O2-NEXT: Early CSE 745; GCN-O2-NEXT: Post-Dominator Tree Construction 746; GCN-O2-NEXT: Legacy Divergence Analysis 747; GCN-O2-NEXT: AMDGPU IR optimizations 748; GCN-O2-NEXT: Canonicalize natural loops 749; GCN-O2-NEXT: Scalar Evolution Analysis 750; GCN-O2-NEXT: Loop Pass Manager 751; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops 752; GCN-O2-NEXT: Induction Variable Users 753; GCN-O2-NEXT: Loop Strength Reduction 754; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 755; GCN-O2-NEXT: Function Alias Analysis Results 756; GCN-O2-NEXT: Merge contiguous icmps into a memcmp 757; GCN-O2-NEXT: Natural Loop Information 758; GCN-O2-NEXT: Lazy Branch Probability Analysis 759; GCN-O2-NEXT: Lazy Block Frequency Analysis 760; GCN-O2-NEXT: Expand memcmp() to load/stores 761; GCN-O2-NEXT: Lower constant intrinsics 762; GCN-O2-NEXT: Remove unreachable blocks from the CFG 763; GCN-O2-NEXT: Natural Loop Information 764; GCN-O2-NEXT: Post-Dominator Tree Construction 765; GCN-O2-NEXT: Branch Probability Analysis 766; GCN-O2-NEXT: Block Frequency Analysis 767; GCN-O2-NEXT: Constant Hoisting 768; GCN-O2-NEXT: Replace intrinsics with calls to vector library 769; GCN-O2-NEXT: Partially inline calls to library functions 770; GCN-O2-NEXT: Expand vector predication intrinsics 771; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics 772; GCN-O2-NEXT: Expand reduction intrinsics 773; GCN-O2-NEXT: Early CSE 774; GCN-O2-NEXT: AMDGPU Attributor 775; GCN-O2-NEXT: CallGraph Construction 776; GCN-O2-NEXT: Call Graph SCC Pass Manager 777; GCN-O2-NEXT: AMDGPU Annotate Kernel Features 778; GCN-O2-NEXT: FunctionPass Manager 779; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments 780; GCN-O2-NEXT: Dominator Tree Construction 781; GCN-O2-NEXT: Natural Loop Information 782; GCN-O2-NEXT: CodeGen Prepare 783; GCN-O2-NEXT: Dominator Tree Construction 784; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 785; GCN-O2-NEXT: Function Alias Analysis Results 786; GCN-O2-NEXT: Natural Loop Information 787; GCN-O2-NEXT: Scalar Evolution Analysis 788; GCN-O2-NEXT: GPU Load and Store Vectorizer 789; GCN-O2-NEXT: Lazy Value Information Analysis 790; GCN-O2-NEXT: Lower SwitchInst's to branches 791; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators 792; GCN-O2-NEXT: Remove unreachable blocks from the CFG 793; GCN-O2-NEXT: Dominator Tree Construction 794; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 795; GCN-O2-NEXT: Function Alias Analysis Results 796; GCN-O2-NEXT: Flatten the CFG 797; GCN-O2-NEXT: Dominator Tree Construction 798; GCN-O2-NEXT: Post-Dominator Tree Construction 799; GCN-O2-NEXT: Natural Loop Information 800; GCN-O2-NEXT: Legacy Divergence Analysis 801; GCN-O2-NEXT: AMDGPU IR late optimizations 802; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 803; GCN-O2-NEXT: Function Alias Analysis Results 804; GCN-O2-NEXT: Code sinking 805; GCN-O2-NEXT: Legacy Divergence Analysis 806; GCN-O2-NEXT: Unify divergent function exit nodes 807; GCN-O2-NEXT: Lazy Value Information Analysis 808; GCN-O2-NEXT: Lower SwitchInst's to branches 809; GCN-O2-NEXT: Dominator Tree Construction 810; GCN-O2-NEXT: Natural Loop Information 811; GCN-O2-NEXT: Convert irreducible control-flow into natural loops 812; GCN-O2-NEXT: Fixup each natural loop to have a single exit block 813; GCN-O2-NEXT: Post-Dominator Tree Construction 814; GCN-O2-NEXT: Dominance Frontier Construction 815; GCN-O2-NEXT: Detect single entry single exit regions 816; GCN-O2-NEXT: Region Pass Manager 817; GCN-O2-NEXT: Structurize control flow 818; GCN-O2-NEXT: Post-Dominator Tree Construction 819; GCN-O2-NEXT: Natural Loop Information 820; GCN-O2-NEXT: Legacy Divergence Analysis 821; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 822; GCN-O2-NEXT: Function Alias Analysis Results 823; GCN-O2-NEXT: Memory SSA 824; GCN-O2-NEXT: AMDGPU Annotate Uniform Values 825; GCN-O2-NEXT: SI annotate control flow 826; GCN-O2-NEXT: LCSSA Verifier 827; GCN-O2-NEXT: Loop-Closed SSA Form Pass 828; GCN-O2-NEXT: Analysis if a function is memory bound 829; GCN-O2-NEXT: DummyCGSCCPass 830; GCN-O2-NEXT: FunctionPass Manager 831; GCN-O2-NEXT: Safe Stack instrumentation pass 832; GCN-O2-NEXT: Insert stack protectors 833; GCN-O2-NEXT: Dominator Tree Construction 834; GCN-O2-NEXT: Post-Dominator Tree Construction 835; GCN-O2-NEXT: Natural Loop Information 836; GCN-O2-NEXT: Legacy Divergence Analysis 837; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl) 838; GCN-O2-NEXT: Function Alias Analysis Results 839; GCN-O2-NEXT: Branch Probability Analysis 840; GCN-O2-NEXT: Lazy Branch Probability Analysis 841; GCN-O2-NEXT: Lazy Block Frequency Analysis 842; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 843; GCN-O2-NEXT: MachineDominator Tree Construction 844; GCN-O2-NEXT: SI Fix SGPR copies 845; GCN-O2-NEXT: MachinePostDominator Tree Construction 846; GCN-O2-NEXT: SI Lower i1 Copies 847; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions 848; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 849; GCN-O2-NEXT: Early Tail Duplication 850; GCN-O2-NEXT: Optimize machine instruction PHIs 851; GCN-O2-NEXT: Slot index numbering 852; GCN-O2-NEXT: Merge disjoint stack slots 853; GCN-O2-NEXT: Local Stack Slot Allocation 854; GCN-O2-NEXT: Remove dead machine instructions 855; GCN-O2-NEXT: MachineDominator Tree Construction 856; GCN-O2-NEXT: Machine Natural Loop Construction 857; GCN-O2-NEXT: Machine Block Frequency Analysis 858; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 859; GCN-O2-NEXT: MachineDominator Tree Construction 860; GCN-O2-NEXT: Machine Block Frequency Analysis 861; GCN-O2-NEXT: Machine Common Subexpression Elimination 862; GCN-O2-NEXT: MachinePostDominator Tree Construction 863; GCN-O2-NEXT: Machine code sinking 864; GCN-O2-NEXT: Peephole Optimizations 865; GCN-O2-NEXT: Remove dead machine instructions 866; GCN-O2-NEXT: SI Fold Operands 867; GCN-O2-NEXT: GCN DPP Combine 868; GCN-O2-NEXT: SI Load Store Optimizer 869; GCN-O2-NEXT: SI Peephole SDWA 870; GCN-O2-NEXT: Machine Block Frequency Analysis 871; GCN-O2-NEXT: MachineDominator Tree Construction 872; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion 873; GCN-O2-NEXT: MachineDominator Tree Construction 874; GCN-O2-NEXT: Machine Block Frequency Analysis 875; GCN-O2-NEXT: Machine Common Subexpression Elimination 876; GCN-O2-NEXT: SI Fold Operands 877; GCN-O2-NEXT: Remove dead machine instructions 878; GCN-O2-NEXT: SI Shrink Instructions 879; GCN-O2-NEXT: Register Usage Information Propagation 880; GCN-O2-NEXT: Detect Dead Lanes 881; GCN-O2-NEXT: Remove dead machine instructions 882; GCN-O2-NEXT: Process Implicit Definitions 883; GCN-O2-NEXT: Remove unreachable machine basic blocks 884; GCN-O2-NEXT: Live Variable Analysis 885; GCN-O2-NEXT: SI Optimize VGPR LiveRange 886; GCN-O2-NEXT: Eliminate PHI nodes for register allocation 887; GCN-O2-NEXT: SI Lower control flow pseudo instructions 888; GCN-O2-NEXT: Two-Address instruction pass 889; GCN-O2-NEXT: MachineDominator Tree Construction 890; GCN-O2-NEXT: Slot index numbering 891; GCN-O2-NEXT: Live Interval Analysis 892; GCN-O2-NEXT: Machine Natural Loop Construction 893; GCN-O2-NEXT: Simple Register Coalescing 894; GCN-O2-NEXT: Rename Disconnected Subregister Components 895; GCN-O2-NEXT: AMDGPU Pre-RA optimizations 896; GCN-O2-NEXT: Machine Instruction Scheduler 897; GCN-O2-NEXT: MachinePostDominator Tree Construction 898; GCN-O2-NEXT: SI Whole Quad Mode 899; GCN-O2-NEXT: Virtual Register Map 900; GCN-O2-NEXT: Live Register Matrix 901; GCN-O2-NEXT: SI Pre-allocate WWM Registers 902; GCN-O2-NEXT: SI optimize exec mask operations pre-RA 903; GCN-O2-NEXT: SI Form memory clauses 904; GCN-O2-NEXT: Machine Natural Loop Construction 905; GCN-O2-NEXT: Machine Block Frequency Analysis 906; GCN-O2-NEXT: Debug Variable Analysis 907; GCN-O2-NEXT: Live Stack Slot Analysis 908; GCN-O2-NEXT: Virtual Register Map 909; GCN-O2-NEXT: Live Register Matrix 910; GCN-O2-NEXT: Bundle Machine CFG Edges 911; GCN-O2-NEXT: Spill Code Placement Analysis 912; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 913; GCN-O2-NEXT: Machine Optimization Remark Emitter 914; GCN-O2-NEXT: Greedy Register Allocator 915; GCN-O2-NEXT: Virtual Register Rewriter 916; GCN-O2-NEXT: SI lower SGPR spill instructions 917; GCN-O2-NEXT: Virtual Register Map 918; GCN-O2-NEXT: Live Register Matrix 919; GCN-O2-NEXT: Greedy Register Allocator 920; GCN-O2-NEXT: GCN NSA Reassign 921; GCN-O2-NEXT: Virtual Register Rewriter 922; GCN-O2-NEXT: Stack Slot Coloring 923; GCN-O2-NEXT: Machine Copy Propagation Pass 924; GCN-O2-NEXT: Machine Loop Invariant Code Motion 925; GCN-O2-NEXT: SI Fix VGPR copies 926; GCN-O2-NEXT: SI optimize exec mask operations 927; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis 928; GCN-O2-NEXT: Fixup Statepoint Caller Saved 929; GCN-O2-NEXT: PostRA Machine Sink 930; GCN-O2-NEXT: MachineDominator Tree Construction 931; GCN-O2-NEXT: Machine Natural Loop Construction 932; GCN-O2-NEXT: Machine Block Frequency Analysis 933; GCN-O2-NEXT: MachinePostDominator Tree Construction 934; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 935; GCN-O2-NEXT: Machine Optimization Remark Emitter 936; GCN-O2-NEXT: Shrink Wrapping analysis 937; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization 938; GCN-O2-NEXT: Control Flow Optimizer 939; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 940; GCN-O2-NEXT: Tail Duplication 941; GCN-O2-NEXT: Machine Copy Propagation Pass 942; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass 943; GCN-O2-NEXT: SI post-RA bundler 944; GCN-O2-NEXT: MachineDominator Tree Construction 945; GCN-O2-NEXT: Machine Natural Loop Construction 946; GCN-O2-NEXT: PostRA Machine Instruction Scheduler 947; GCN-O2-NEXT: Machine Block Frequency Analysis 948; GCN-O2-NEXT: MachinePostDominator Tree Construction 949; GCN-O2-NEXT: Branch Probability Basic Block Placement 950; GCN-O2-NEXT: Insert fentry calls 951; GCN-O2-NEXT: Insert XRay ops 952; GCN-O2-NEXT: SI Memory Legalizer 953; GCN-O2-NEXT: MachinePostDominator Tree Construction 954; GCN-O2-NEXT: SI insert wait instructions 955; GCN-O2-NEXT: SI Shrink Instructions 956; GCN-O2-NEXT: Insert required mode register values 957; GCN-O2-NEXT: SI Insert Hard Clauses 958; GCN-O2-NEXT: MachineDominator Tree Construction 959; GCN-O2-NEXT: SI Final Branch Preparation 960; GCN-O2-NEXT: SI peephole optimizations 961; GCN-O2-NEXT: Post RA hazard recognizer 962; GCN-O2-NEXT: Branch relaxation pass 963; GCN-O2-NEXT: Register Usage Information Collector Pass 964; GCN-O2-NEXT: Live DEBUG_VALUE analysis 965; GCN-O2-NEXT: Function register usage analysis 966; GCN-O2-NEXT: FunctionPass Manager 967; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis 968; GCN-O2-NEXT: Machine Optimization Remark Emitter 969; GCN-O2-NEXT: AMDGPU Assembly Printer 970; GCN-O2-NEXT: Free MachineFunction 971; GCN-O2-NEXT:Pass Arguments: -domtree 972; GCN-O2-NEXT: FunctionPass Manager 973; GCN-O2-NEXT: Dominator Tree Construction 974 975; GCN-O3:Target Library Information 976; GCN-O3-NEXT:Target Pass Configuration 977; GCN-O3-NEXT:Machine Module Information 978; GCN-O3-NEXT:Target Transform Information 979; GCN-O3-NEXT:Assumption Cache Tracker 980; GCN-O3-NEXT:Profile summary info 981; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis 982; GCN-O3-NEXT:External Alias Analysis 983; GCN-O3-NEXT:Type-Based Alias Analysis 984; GCN-O3-NEXT:Scoped NoAlias Alias Analysis 985; GCN-O3-NEXT:Argument Register Usage Information Storage 986; GCN-O3-NEXT:Create Garbage Collector Module Metadata 987; GCN-O3-NEXT:Machine Branch Probability Analysis 988; GCN-O3-NEXT:Register Usage Information Storage 989; GCN-O3-NEXT: ModulePass Manager 990; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering 991; GCN-O3-NEXT: AMDGPU Printf lowering 992; GCN-O3-NEXT: FunctionPass Manager 993; GCN-O3-NEXT: Dominator Tree Construction 994; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU 995; GCN-O3-NEXT: Fix function bitcasts for AMDGPU 996; GCN-O3-NEXT: FunctionPass Manager 997; GCN-O3-NEXT: Early propagate attributes from kernels to functions 998; GCN-O3-NEXT: AMDGPU Lower Intrinsics 999; GCN-O3-NEXT: AMDGPU Inline All Functions 1000; GCN-O3-NEXT: CallGraph Construction 1001; GCN-O3-NEXT: Call Graph SCC Pass Manager 1002; GCN-O3-NEXT: Inliner for always_inline functions 1003; GCN-O3-NEXT: A No-Op Barrier Pass 1004; GCN-O3-NEXT: Lower OpenCL enqueued blocks 1005; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions 1006; GCN-O3-NEXT: FunctionPass Manager 1007; GCN-O3-NEXT: Infer address spaces 1008; GCN-O3-NEXT: Expand Atomic instructions 1009; GCN-O3-NEXT: AMDGPU Promote Alloca 1010; GCN-O3-NEXT: Dominator Tree Construction 1011; GCN-O3-NEXT: SROA 1012; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1013; GCN-O3-NEXT: Function Alias Analysis Results 1014; GCN-O3-NEXT: Memory SSA 1015; GCN-O3-NEXT: Natural Loop Information 1016; GCN-O3-NEXT: Canonicalize natural loops 1017; GCN-O3-NEXT: LCSSA Verifier 1018; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1019; GCN-O3-NEXT: Scalar Evolution Analysis 1020; GCN-O3-NEXT: Lazy Branch Probability Analysis 1021; GCN-O3-NEXT: Lazy Block Frequency Analysis 1022; GCN-O3-NEXT: Loop Pass Manager 1023; GCN-O3-NEXT: Loop Invariant Code Motion 1024; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE 1025; GCN-O3-NEXT: Speculatively execute instructions 1026; GCN-O3-NEXT: Scalar Evolution Analysis 1027; GCN-O3-NEXT: Straight line strength reduction 1028; GCN-O3-NEXT: Phi Values Analysis 1029; GCN-O3-NEXT: Function Alias Analysis Results 1030; GCN-O3-NEXT: Memory Dependence Analysis 1031; GCN-O3-NEXT: Optimization Remark Emitter 1032; GCN-O3-NEXT: Global Value Numbering 1033; GCN-O3-NEXT: Scalar Evolution Analysis 1034; GCN-O3-NEXT: Nary reassociation 1035; GCN-O3-NEXT: Early CSE 1036; GCN-O3-NEXT: Post-Dominator Tree Construction 1037; GCN-O3-NEXT: Legacy Divergence Analysis 1038; GCN-O3-NEXT: AMDGPU IR optimizations 1039; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1040; GCN-O3-NEXT: Canonicalize natural loops 1041; GCN-O3-NEXT: Scalar Evolution Analysis 1042; GCN-O3-NEXT: Loop Pass Manager 1043; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops 1044; GCN-O3-NEXT: Induction Variable Users 1045; GCN-O3-NEXT: Loop Strength Reduction 1046; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1047; GCN-O3-NEXT: Function Alias Analysis Results 1048; GCN-O3-NEXT: Merge contiguous icmps into a memcmp 1049; GCN-O3-NEXT: Natural Loop Information 1050; GCN-O3-NEXT: Lazy Branch Probability Analysis 1051; GCN-O3-NEXT: Lazy Block Frequency Analysis 1052; GCN-O3-NEXT: Expand memcmp() to load/stores 1053; GCN-O3-NEXT: Lower constant intrinsics 1054; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1055; GCN-O3-NEXT: Natural Loop Information 1056; GCN-O3-NEXT: Post-Dominator Tree Construction 1057; GCN-O3-NEXT: Branch Probability Analysis 1058; GCN-O3-NEXT: Block Frequency Analysis 1059; GCN-O3-NEXT: Constant Hoisting 1060; GCN-O3-NEXT: Replace intrinsics with calls to vector library 1061; GCN-O3-NEXT: Partially inline calls to library functions 1062; GCN-O3-NEXT: Expand vector predication intrinsics 1063; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics 1064; GCN-O3-NEXT: Expand reduction intrinsics 1065; GCN-O3-NEXT: Natural Loop Information 1066; GCN-O3-NEXT: Phi Values Analysis 1067; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1068; GCN-O3-NEXT: Function Alias Analysis Results 1069; GCN-O3-NEXT: Memory Dependence Analysis 1070; GCN-O3-NEXT: Lazy Branch Probability Analysis 1071; GCN-O3-NEXT: Lazy Block Frequency Analysis 1072; GCN-O3-NEXT: Optimization Remark Emitter 1073; GCN-O3-NEXT: Global Value Numbering 1074; GCN-O3-NEXT: AMDGPU Attributor 1075; GCN-O3-NEXT: CallGraph Construction 1076; GCN-O3-NEXT: Call Graph SCC Pass Manager 1077; GCN-O3-NEXT: AMDGPU Annotate Kernel Features 1078; GCN-O3-NEXT: FunctionPass Manager 1079; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments 1080; GCN-O3-NEXT: Dominator Tree Construction 1081; GCN-O3-NEXT: Natural Loop Information 1082; GCN-O3-NEXT: CodeGen Prepare 1083; GCN-O3-NEXT: Dominator Tree Construction 1084; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1085; GCN-O3-NEXT: Function Alias Analysis Results 1086; GCN-O3-NEXT: Natural Loop Information 1087; GCN-O3-NEXT: Scalar Evolution Analysis 1088; GCN-O3-NEXT: GPU Load and Store Vectorizer 1089; GCN-O3-NEXT: Lazy Value Information Analysis 1090; GCN-O3-NEXT: Lower SwitchInst's to branches 1091; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators 1092; GCN-O3-NEXT: Remove unreachable blocks from the CFG 1093; GCN-O3-NEXT: Dominator Tree Construction 1094; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1095; GCN-O3-NEXT: Function Alias Analysis Results 1096; GCN-O3-NEXT: Flatten the CFG 1097; GCN-O3-NEXT: Dominator Tree Construction 1098; GCN-O3-NEXT: Post-Dominator Tree Construction 1099; GCN-O3-NEXT: Natural Loop Information 1100; GCN-O3-NEXT: Legacy Divergence Analysis 1101; GCN-O3-NEXT: AMDGPU IR late optimizations 1102; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1103; GCN-O3-NEXT: Function Alias Analysis Results 1104; GCN-O3-NEXT: Code sinking 1105; GCN-O3-NEXT: Legacy Divergence Analysis 1106; GCN-O3-NEXT: Unify divergent function exit nodes 1107; GCN-O3-NEXT: Lazy Value Information Analysis 1108; GCN-O3-NEXT: Lower SwitchInst's to branches 1109; GCN-O3-NEXT: Dominator Tree Construction 1110; GCN-O3-NEXT: Natural Loop Information 1111; GCN-O3-NEXT: Convert irreducible control-flow into natural loops 1112; GCN-O3-NEXT: Fixup each natural loop to have a single exit block 1113; GCN-O3-NEXT: Post-Dominator Tree Construction 1114; GCN-O3-NEXT: Dominance Frontier Construction 1115; GCN-O3-NEXT: Detect single entry single exit regions 1116; GCN-O3-NEXT: Region Pass Manager 1117; GCN-O3-NEXT: Structurize control flow 1118; GCN-O3-NEXT: Post-Dominator Tree Construction 1119; GCN-O3-NEXT: Natural Loop Information 1120; GCN-O3-NEXT: Legacy Divergence Analysis 1121; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1122; GCN-O3-NEXT: Function Alias Analysis Results 1123; GCN-O3-NEXT: Memory SSA 1124; GCN-O3-NEXT: AMDGPU Annotate Uniform Values 1125; GCN-O3-NEXT: SI annotate control flow 1126; GCN-O3-NEXT: LCSSA Verifier 1127; GCN-O3-NEXT: Loop-Closed SSA Form Pass 1128; GCN-O3-NEXT: Analysis if a function is memory bound 1129; GCN-O3-NEXT: DummyCGSCCPass 1130; GCN-O3-NEXT: FunctionPass Manager 1131; GCN-O3-NEXT: Safe Stack instrumentation pass 1132; GCN-O3-NEXT: Insert stack protectors 1133; GCN-O3-NEXT: Dominator Tree Construction 1134; GCN-O3-NEXT: Post-Dominator Tree Construction 1135; GCN-O3-NEXT: Natural Loop Information 1136; GCN-O3-NEXT: Legacy Divergence Analysis 1137; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl) 1138; GCN-O3-NEXT: Function Alias Analysis Results 1139; GCN-O3-NEXT: Branch Probability Analysis 1140; GCN-O3-NEXT: Lazy Branch Probability Analysis 1141; GCN-O3-NEXT: Lazy Block Frequency Analysis 1142; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection 1143; GCN-O3-NEXT: MachineDominator Tree Construction 1144; GCN-O3-NEXT: SI Fix SGPR copies 1145; GCN-O3-NEXT: MachinePostDominator Tree Construction 1146; GCN-O3-NEXT: SI Lower i1 Copies 1147; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions 1148; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1149; GCN-O3-NEXT: Early Tail Duplication 1150; GCN-O3-NEXT: Optimize machine instruction PHIs 1151; GCN-O3-NEXT: Slot index numbering 1152; GCN-O3-NEXT: Merge disjoint stack slots 1153; GCN-O3-NEXT: Local Stack Slot Allocation 1154; GCN-O3-NEXT: Remove dead machine instructions 1155; GCN-O3-NEXT: MachineDominator Tree Construction 1156; GCN-O3-NEXT: Machine Natural Loop Construction 1157; GCN-O3-NEXT: Machine Block Frequency Analysis 1158; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1159; GCN-O3-NEXT: MachineDominator Tree Construction 1160; GCN-O3-NEXT: Machine Block Frequency Analysis 1161; GCN-O3-NEXT: Machine Common Subexpression Elimination 1162; GCN-O3-NEXT: MachinePostDominator Tree Construction 1163; GCN-O3-NEXT: Machine code sinking 1164; GCN-O3-NEXT: Peephole Optimizations 1165; GCN-O3-NEXT: Remove dead machine instructions 1166; GCN-O3-NEXT: SI Fold Operands 1167; GCN-O3-NEXT: GCN DPP Combine 1168; GCN-O3-NEXT: SI Load Store Optimizer 1169; GCN-O3-NEXT: SI Peephole SDWA 1170; GCN-O3-NEXT: Machine Block Frequency Analysis 1171; GCN-O3-NEXT: MachineDominator Tree Construction 1172; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion 1173; GCN-O3-NEXT: MachineDominator Tree Construction 1174; GCN-O3-NEXT: Machine Block Frequency Analysis 1175; GCN-O3-NEXT: Machine Common Subexpression Elimination 1176; GCN-O3-NEXT: SI Fold Operands 1177; GCN-O3-NEXT: Remove dead machine instructions 1178; GCN-O3-NEXT: SI Shrink Instructions 1179; GCN-O3-NEXT: Register Usage Information Propagation 1180; GCN-O3-NEXT: Detect Dead Lanes 1181; GCN-O3-NEXT: Remove dead machine instructions 1182; GCN-O3-NEXT: Process Implicit Definitions 1183; GCN-O3-NEXT: Remove unreachable machine basic blocks 1184; GCN-O3-NEXT: Live Variable Analysis 1185; GCN-O3-NEXT: SI Optimize VGPR LiveRange 1186; GCN-O3-NEXT: Eliminate PHI nodes for register allocation 1187; GCN-O3-NEXT: SI Lower control flow pseudo instructions 1188; GCN-O3-NEXT: Two-Address instruction pass 1189; GCN-O3-NEXT: MachineDominator Tree Construction 1190; GCN-O3-NEXT: Slot index numbering 1191; GCN-O3-NEXT: Live Interval Analysis 1192; GCN-O3-NEXT: Machine Natural Loop Construction 1193; GCN-O3-NEXT: Simple Register Coalescing 1194; GCN-O3-NEXT: Rename Disconnected Subregister Components 1195; GCN-O3-NEXT: AMDGPU Pre-RA optimizations 1196; GCN-O3-NEXT: Machine Instruction Scheduler 1197; GCN-O3-NEXT: MachinePostDominator Tree Construction 1198; GCN-O3-NEXT: SI Whole Quad Mode 1199; GCN-O3-NEXT: Virtual Register Map 1200; GCN-O3-NEXT: Live Register Matrix 1201; GCN-O3-NEXT: SI Pre-allocate WWM Registers 1202; GCN-O3-NEXT: SI optimize exec mask operations pre-RA 1203; GCN-O3-NEXT: SI Form memory clauses 1204; GCN-O3-NEXT: Machine Natural Loop Construction 1205; GCN-O3-NEXT: Machine Block Frequency Analysis 1206; GCN-O3-NEXT: Debug Variable Analysis 1207; GCN-O3-NEXT: Live Stack Slot Analysis 1208; GCN-O3-NEXT: Virtual Register Map 1209; GCN-O3-NEXT: Live Register Matrix 1210; GCN-O3-NEXT: Bundle Machine CFG Edges 1211; GCN-O3-NEXT: Spill Code Placement Analysis 1212; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1213; GCN-O3-NEXT: Machine Optimization Remark Emitter 1214; GCN-O3-NEXT: Greedy Register Allocator 1215; GCN-O3-NEXT: Virtual Register Rewriter 1216; GCN-O3-NEXT: SI lower SGPR spill instructions 1217; GCN-O3-NEXT: Virtual Register Map 1218; GCN-O3-NEXT: Live Register Matrix 1219; GCN-O3-NEXT: Greedy Register Allocator 1220; GCN-O3-NEXT: GCN NSA Reassign 1221; GCN-O3-NEXT: Virtual Register Rewriter 1222; GCN-O3-NEXT: Stack Slot Coloring 1223; GCN-O3-NEXT: Machine Copy Propagation Pass 1224; GCN-O3-NEXT: Machine Loop Invariant Code Motion 1225; GCN-O3-NEXT: SI Fix VGPR copies 1226; GCN-O3-NEXT: SI optimize exec mask operations 1227; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis 1228; GCN-O3-NEXT: Fixup Statepoint Caller Saved 1229; GCN-O3-NEXT: PostRA Machine Sink 1230; GCN-O3-NEXT: MachineDominator Tree Construction 1231; GCN-O3-NEXT: Machine Natural Loop Construction 1232; GCN-O3-NEXT: Machine Block Frequency Analysis 1233; GCN-O3-NEXT: MachinePostDominator Tree Construction 1234; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1235; GCN-O3-NEXT: Machine Optimization Remark Emitter 1236; GCN-O3-NEXT: Shrink Wrapping analysis 1237; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization 1238; GCN-O3-NEXT: Control Flow Optimizer 1239; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1240; GCN-O3-NEXT: Tail Duplication 1241; GCN-O3-NEXT: Machine Copy Propagation Pass 1242; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass 1243; GCN-O3-NEXT: SI post-RA bundler 1244; GCN-O3-NEXT: MachineDominator Tree Construction 1245; GCN-O3-NEXT: Machine Natural Loop Construction 1246; GCN-O3-NEXT: PostRA Machine Instruction Scheduler 1247; GCN-O3-NEXT: Machine Block Frequency Analysis 1248; GCN-O3-NEXT: MachinePostDominator Tree Construction 1249; GCN-O3-NEXT: Branch Probability Basic Block Placement 1250; GCN-O3-NEXT: Insert fentry calls 1251; GCN-O3-NEXT: Insert XRay ops 1252; GCN-O3-NEXT: SI Memory Legalizer 1253; GCN-O3-NEXT: MachinePostDominator Tree Construction 1254; GCN-O3-NEXT: SI insert wait instructions 1255; GCN-O3-NEXT: SI Shrink Instructions 1256; GCN-O3-NEXT: Insert required mode register values 1257; GCN-O3-NEXT: SI Insert Hard Clauses 1258; GCN-O3-NEXT: MachineDominator Tree Construction 1259; GCN-O3-NEXT: SI Final Branch Preparation 1260; GCN-O3-NEXT: SI peephole optimizations 1261; GCN-O3-NEXT: Post RA hazard recognizer 1262; GCN-O3-NEXT: Branch relaxation pass 1263; GCN-O3-NEXT: Register Usage Information Collector Pass 1264; GCN-O3-NEXT: Live DEBUG_VALUE analysis 1265; GCN-O3-NEXT: Function register usage analysis 1266; GCN-O3-NEXT: FunctionPass Manager 1267; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis 1268; GCN-O3-NEXT: Machine Optimization Remark Emitter 1269; GCN-O3-NEXT: AMDGPU Assembly Printer 1270; GCN-O3-NEXT: Free MachineFunction 1271; GCN-O3-NEXT:Pass Arguments: -domtree 1272; GCN-O3-NEXT: FunctionPass Manager 1273; GCN-O3-NEXT: Dominator Tree Construction 1274 1275define void @empty() { 1276 ret void 1277} 1278