1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx901 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s 2; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s 3; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s 4; FIXME: Merge into imm.ll 5 6; GCN-LABEL: {{^}}store_inline_imm_neg_0.0_v2i16: 7; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x80008000{{$}} 8; GCN: buffer_store_dword [[REG]] 9define void @store_inline_imm_neg_0.0_v2i16(<2 x i16> addrspace(1)* %out) #0 { 10 store <2 x i16> <i16 -32768, i16 -32768>, <2 x i16> addrspace(1)* %out 11 ret void 12} 13 14; GCN-LABEL: {{^}}store_inline_imm_0.0_v2f16: 15; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}} 16; GCN: buffer_store_dword [[REG]] 17define void @store_inline_imm_0.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 18 store <2 x half> <half 0.0, half 0.0>, <2 x half> addrspace(1)* %out 19 ret void 20} 21 22; GCN-LABEL: {{^}}store_imm_neg_0.0_v2f16: 23; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x80008000{{$}} 24; GCN: buffer_store_dword [[REG]] 25define void @store_imm_neg_0.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 26 store <2 x half> <half -0.0, half -0.0>, <2 x half> addrspace(1)* %out 27 ret void 28} 29 30; GCN-LABEL: {{^}}store_inline_imm_0.5_v2f16: 31; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x38003800{{$}} 32; GCN: buffer_store_dword [[REG]] 33define void @store_inline_imm_0.5_v2f16(<2 x half> addrspace(1)* %out) #0 { 34 store <2 x half> <half 0.5, half 0.5>, <2 x half> addrspace(1)* %out 35 ret void 36} 37 38; GCN-LABEL: {{^}}store_inline_imm_m_0.5_v2f16: 39; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0xb800b800{{$}} 40; GCN: buffer_store_dword [[REG]] 41define void @store_inline_imm_m_0.5_v2f16(<2 x half> addrspace(1)* %out) #0 { 42 store <2 x half> <half -0.5, half -0.5>, <2 x half> addrspace(1)* %out 43 ret void 44} 45 46; GCN-LABEL: {{^}}store_inline_imm_1.0_v2f16: 47; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x3c003c00{{$}} 48; GCN: buffer_store_dword [[REG]] 49define void @store_inline_imm_1.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 50 store <2 x half> <half 1.0, half 1.0>, <2 x half> addrspace(1)* %out 51 ret void 52} 53 54; GCN-LABEL: {{^}}store_inline_imm_m_1.0_v2f16: 55; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0xbc00bc00{{$}} 56; GCN: buffer_store_dword [[REG]] 57define void @store_inline_imm_m_1.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 58 store <2 x half> <half -1.0, half -1.0>, <2 x half> addrspace(1)* %out 59 ret void 60} 61 62; GCN-LABEL: {{^}}store_inline_imm_2.0_v2f16: 63; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x40004000{{$}} 64; GCN: buffer_store_dword [[REG]] 65define void @store_inline_imm_2.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 66 store <2 x half> <half 2.0, half 2.0>, <2 x half> addrspace(1)* %out 67 ret void 68} 69 70; GCN-LABEL: {{^}}store_inline_imm_m_2.0_v2f16: 71; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0xc000c000{{$}} 72; GCN: buffer_store_dword [[REG]] 73define void @store_inline_imm_m_2.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 74 store <2 x half> <half -2.0, half -2.0>, <2 x half> addrspace(1)* %out 75 ret void 76} 77 78; GCN-LABEL: {{^}}store_inline_imm_4.0_v2f16: 79; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x44004400{{$}} 80; GCN: buffer_store_dword [[REG]] 81define void @store_inline_imm_4.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 82 store <2 x half> <half 4.0, half 4.0>, <2 x half> addrspace(1)* %out 83 ret void 84} 85 86; GCN-LABEL: {{^}}store_inline_imm_m_4.0_v2f16: 87; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0xc400c400{{$}} 88; GCN: buffer_store_dword [[REG]] 89define void @store_inline_imm_m_4.0_v2f16(<2 x half> addrspace(1)* %out) #0 { 90 store <2 x half> <half -4.0, half -4.0>, <2 x half> addrspace(1)* %out 91 ret void 92} 93 94; GCN-LABEL: {{^}}store_inline_imm_inv_2pi_v2f16: 95; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x31183118{{$}} 96; GCN: buffer_store_dword [[REG]] 97define void @store_inline_imm_inv_2pi_v2f16(<2 x half> addrspace(1)* %out) #0 { 98 store <2 x half> <half 0xH3118, half 0xH3118>, <2 x half> addrspace(1)* %out 99 ret void 100} 101 102; GCN-LABEL: {{^}}store_inline_imm_m_inv_2pi_v2f16: 103; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0xb118b118{{$}} 104; GCN: buffer_store_dword [[REG]] 105define void @store_inline_imm_m_inv_2pi_v2f16(<2 x half> addrspace(1)* %out) #0 { 106 store <2 x half> <half 0xHB118, half 0xHB118>, <2 x half> addrspace(1)* %out 107 ret void 108} 109 110; GCN-LABEL: {{^}}store_literal_imm_v2f16: 111; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x6c006c00 112; GCN: buffer_store_dword [[REG]] 113define void @store_literal_imm_v2f16(<2 x half> addrspace(1)* %out) #0 { 114 store <2 x half> <half 4096.0, half 4096.0>, <2 x half> addrspace(1)* %out 115 ret void 116} 117 118; GCN-LABEL: {{^}}add_inline_imm_0.0_v2f16: 119; GFX9: s_load_dword [[VAL:s[0-9]+]] 120; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0{{$}} 121; GFX9: buffer_store_dword [[REG]] 122 123; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 124; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 125; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0, [[VAL0]] 126; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0, [[VAL1]] 127; VI: v_or_b32 128; VI: buffer_store_dword 129define void @add_inline_imm_0.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 130 %y = fadd <2 x half> %x, <half 0.0, half 0.0> 131 store <2 x half> %y, <2 x half> addrspace(1)* %out 132 ret void 133} 134 135; GCN-LABEL: {{^}}add_inline_imm_0.5_v2f16: 136; GFX9: s_load_dword [[VAL:s[0-9]+]] 137; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5{{$}} 138; GFX9: buffer_store_dword [[REG]] 139 140; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 141; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 142; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0.5, [[VAL0]] 143; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0.5, [[VAL1]] 144; VI: v_or_b32 145; VI: buffer_store_dword 146define void @add_inline_imm_0.5_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 147 %y = fadd <2 x half> %x, <half 0.5, half 0.5> 148 store <2 x half> %y, <2 x half> addrspace(1)* %out 149 ret void 150} 151 152; GCN-LABEL: {{^}}add_inline_imm_neg_0.5_v2f16: 153; GFX9: s_load_dword [[VAL:s[0-9]+]] 154; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -0.5{{$}} 155; GFX9: buffer_store_dword [[REG]] 156 157; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 158; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 159; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -0.5, [[VAL0]] 160; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -0.5, [[VAL1]] 161; VI: v_or_b32 162; VI: buffer_store_dword 163define void @add_inline_imm_neg_0.5_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 164 %y = fadd <2 x half> %x, <half -0.5, half -0.5> 165 store <2 x half> %y, <2 x half> addrspace(1)* %out 166 ret void 167} 168 169; GCN-LABEL: {{^}}add_inline_imm_1.0_v2f16: 170; GFX9: s_load_dword [[VAL:s[0-9]+]] 171; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1.0{{$}} 172; GFX9: buffer_store_dword [[REG]] 173 174; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 175; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 176; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 1.0, [[VAL0]] 177; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 1.0, [[VAL1]] 178; VI: v_or_b32 179; VI: buffer_store_dword 180define void @add_inline_imm_1.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 181 %y = fadd <2 x half> %x, <half 1.0, half 1.0> 182 store <2 x half> %y, <2 x half> addrspace(1)* %out 183 ret void 184} 185 186; GCN-LABEL: {{^}}add_inline_imm_neg_1.0_v2f16: 187; GFX9: s_load_dword [[VAL:s[0-9]+]] 188; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -1.0{{$}} 189; GFX9: buffer_store_dword [[REG]] 190 191; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 192; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 193; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -1.0, [[VAL0]] 194; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -1.0, [[VAL1]] 195; VI: v_or_b32 196; VI: buffer_store_dword 197define void @add_inline_imm_neg_1.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 198 %y = fadd <2 x half> %x, <half -1.0, half -1.0> 199 store <2 x half> %y, <2 x half> addrspace(1)* %out 200 ret void 201} 202 203; GCN-LABEL: {{^}}add_inline_imm_2.0_v2f16: 204; GFX9: s_load_dword [[VAL:s[0-9]+]] 205; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2.0{{$}} 206; GFX9: buffer_store_dword [[REG]] 207 208; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 209; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 210; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 2.0, [[VAL0]] 211; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 2.0, [[VAL1]] 212; VI: v_or_b32 213; VI: buffer_store_dword 214define void @add_inline_imm_2.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 215 %y = fadd <2 x half> %x, <half 2.0, half 2.0> 216 store <2 x half> %y, <2 x half> addrspace(1)* %out 217 ret void 218} 219 220; GCN-LABEL: {{^}}add_inline_imm_neg_2.0_v2f16: 221; GFX9: s_load_dword [[VAL:s[0-9]+]] 222; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -2.0{{$}} 223; GFX9: buffer_store_dword [[REG]] 224 225; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 226; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 227; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -2.0, [[VAL0]] 228; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -2.0, [[VAL1]] 229; VI: v_or_b32 230; VI: buffer_store_dword 231define void @add_inline_imm_neg_2.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 232 %y = fadd <2 x half> %x, <half -2.0, half -2.0> 233 store <2 x half> %y, <2 x half> addrspace(1)* %out 234 ret void 235} 236 237; GCN-LABEL: {{^}}add_inline_imm_4.0_v2f16: 238; GFX9: s_load_dword [[VAL:s[0-9]+]] 239; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 4.0{{$}} 240; GFX9: buffer_store_dword [[REG]] 241 242; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 243; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 244; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 4.0, [[VAL0]] 245; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 4.0, [[VAL1]] 246; VI: v_or_b32 247; VI: buffer_store_dword 248define void @add_inline_imm_4.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 249 %y = fadd <2 x half> %x, <half 4.0, half 4.0> 250 store <2 x half> %y, <2 x half> addrspace(1)* %out 251 ret void 252} 253 254; GCN-LABEL: {{^}}add_inline_imm_neg_4.0_v2f16: 255; GFX9: s_load_dword [[VAL:s[0-9]+]] 256; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -4.0{{$}} 257; GFX9: buffer_store_dword [[REG]] 258 259; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 260; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 261; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -4.0, [[VAL0]] 262; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -4.0, [[VAL1]] 263; VI: v_or_b32 264; VI: buffer_store_dword 265define void @add_inline_imm_neg_4.0_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 266 %y = fadd <2 x half> %x, <half -4.0, half -4.0> 267 store <2 x half> %y, <2 x half> addrspace(1)* %out 268 ret void 269} 270 271; GCN-LABEL: {{^}}commute_add_inline_imm_0.5_v2f16: 272; GFX9: buffer_load_dword [[VAL:v[0-9]+]] 273; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5 274; GFX9: buffer_store_dword [[REG]] 275 276; VI: buffer_load_dword 277; VI-NOT: and 278; VI: v_lshrrev_b32_e32 {{v[0-9]+}}, 16, 279; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0.5, v{{[0-9]+}} 280; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 0.5, v{{[0-9]+}} 281; VI: v_or_b32 282; VI: buffer_store_dword 283define void @commute_add_inline_imm_0.5_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %in) #0 { 284 %x = load <2 x half>, <2 x half> addrspace(1)* %in 285 %y = fadd <2 x half> %x, <half 0.5, half 0.5> 286 store <2 x half> %y, <2 x half> addrspace(1)* %out 287 ret void 288} 289 290; GCN-LABEL: {{^}}commute_add_literal_v2f16: 291; GFX9: buffer_load_dword [[VAL:v[0-9]+]] 292; GFX9: s_mov_b32 [[K:s[0-9]+]], 0x64006400 293; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[K]], [[VAL]] 294; GFX9: buffer_store_dword [[REG]] 295 296; VI-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0x6400{{$}} 297; VI-DAG: buffer_load_dword 298; VI-NOT: and 299; VI: v_lshrrev_b32_e32 {{v[0-9]+}}, 16, 300; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, [[K]], v{{[0-9]+}} 301; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, [[K]], v{{[0-9]+}} 302; VI: v_or_b32 303; VI: buffer_store_dword 304define void @commute_add_literal_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %in) #0 { 305 %x = load <2 x half>, <2 x half> addrspace(1)* %in 306 %y = fadd <2 x half> %x, <half 1024.0, half 1024.0> 307 store <2 x half> %y, <2 x half> addrspace(1)* %out 308 ret void 309} 310 311; GCN-LABEL: {{^}}add_inline_imm_1_v2f16: 312; GFX9: s_load_dword [[VAL:s[0-9]+]] 313; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1{{$}} 314; GFX9: buffer_store_dword [[REG]] 315 316; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 317; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 318; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 1, [[VAL0]] 319; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 1, [[VAL1]] 320; VI: v_or_b32 321; VI: buffer_store_dword 322define void @add_inline_imm_1_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 323 %y = fadd <2 x half> %x, <half 0xH0001, half 0xH0001> 324 store <2 x half> %y, <2 x half> addrspace(1)* %out 325 ret void 326} 327 328; GCN-LABEL: {{^}}add_inline_imm_2_v2f16: 329; GFX9: s_load_dword [[VAL:s[0-9]+]] 330; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2{{$}} 331; GFX9: buffer_store_dword [[REG]] 332 333; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 334; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 335; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 2, [[VAL0]] 336; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 2, [[VAL1]] 337; VI: v_or_b32 338; VI: buffer_store_dword 339define void @add_inline_imm_2_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 340 %y = fadd <2 x half> %x, <half 0xH0002, half 0xH0002> 341 store <2 x half> %y, <2 x half> addrspace(1)* %out 342 ret void 343} 344 345; GCN-LABEL: {{^}}add_inline_imm_16_v2f16: 346; GFX9: s_load_dword [[VAL:s[0-9]+]] 347; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 16{{$}} 348; GFX9: buffer_store_dword [[REG]] 349 350; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 351; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 352; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 16, [[VAL0]] 353; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 16, [[VAL1]] 354; VI: v_or_b32 355; VI: buffer_store_dword 356define void @add_inline_imm_16_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 357 %y = fadd <2 x half> %x, <half 0xH0010, half 0xH0010> 358 store <2 x half> %y, <2 x half> addrspace(1)* %out 359 ret void 360} 361 362; GCN-LABEL: {{^}}add_inline_imm_neg_1_v2f16: 363; GFX9: s_load_dword [[VAL:s[0-9]+]] 364; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -1{{$}} 365; GFX9: buffer_store_dword [[REG]] 366 367; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 368; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 369; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -1, [[VAL0]] 370; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -1, [[VAL1]] 371; VI: v_or_b32 372; VI: buffer_store_dword 373define void @add_inline_imm_neg_1_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 374 %y = fadd <2 x half> %x, <half 0xHFFFF, half 0xHFFFF> 375 store <2 x half> %y, <2 x half> addrspace(1)* %out 376 ret void 377} 378 379; GCN-LABEL: {{^}}add_inline_imm_neg_2_v2f16: 380; GFX9: s_load_dword [[VAL:s[0-9]+]] 381; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -2{{$}} 382; GFX9: buffer_store_dword [[REG]] 383 384; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 385; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 386; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -2, [[VAL0]] 387; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -2, [[VAL1]] 388; VI: v_or_b32 389; VI: buffer_store_dword 390define void @add_inline_imm_neg_2_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 391 %y = fadd <2 x half> %x, <half 0xHFFFE, half 0xHFFFE> 392 store <2 x half> %y, <2 x half> addrspace(1)* %out 393 ret void 394} 395 396; GCN-LABEL: {{^}}add_inline_imm_neg_16_v2f16: 397; GFX9: s_load_dword [[VAL:s[0-9]+]] 398; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -16{{$}} 399; GFX9: buffer_store_dword [[REG]] 400 401; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 402; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 403; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -16, [[VAL0]] 404; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, -16, [[VAL1]] 405; VI: v_or_b32 406; VI: buffer_store_dword 407define void @add_inline_imm_neg_16_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 408 %y = fadd <2 x half> %x, <half 0xHFFF0, half 0xHFFF0> 409 store <2 x half> %y, <2 x half> addrspace(1)* %out 410 ret void 411} 412 413; GCN-LABEL: {{^}}add_inline_imm_63_v2f16: 414; GFX9: s_load_dword [[VAL:s[0-9]+]] 415; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 63 416; GFX9: buffer_store_dword [[REG]] 417 418; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 419; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 420; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 63, [[VAL0]] 421; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 63, [[VAL1]] 422; VI: v_or_b32 423; VI: buffer_store_dword 424define void @add_inline_imm_63_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 425 %y = fadd <2 x half> %x, <half 0xH003F, half 0xH003F> 426 store <2 x half> %y, <2 x half> addrspace(1)* %out 427 ret void 428} 429 430; GCN-LABEL: {{^}}add_inline_imm_64_v2f16: 431; GFX9: s_load_dword [[VAL:s[0-9]+]] 432; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 64 433; GFX9: buffer_store_dword [[REG]] 434 435; VI: buffer_load_ushort [[VAL0:v[0-9]+]] 436; VI: buffer_load_ushort [[VAL1:v[0-9]+]] 437; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 64, [[VAL0]] 438; VI-DAG: v_add_f16_e32 v{{[0-9]+}}, 64, [[VAL1]] 439; VI: v_or_b32 440; VI: buffer_store_dword 441define void @add_inline_imm_64_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %x) #0 { 442 %y = fadd <2 x half> %x, <half 0xH0040, half 0xH0040> 443 store <2 x half> %y, <2 x half> addrspace(1)* %out 444 ret void 445} 446 447attributes #0 = { nounwind } 448