1; RUN: llc -march=amdgcn -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
3
4; GCN-LABEL: {{^}}fptrunc_f32_to_f16
5; GCN: buffer_load_dword v[[A_F32:[0-9]+]]
6; GCN: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[A_F32]]
7; GCN: buffer_store_short v[[R_F16]]
8; GCN: s_endpgm
9define void @fptrunc_f32_to_f16(
10    half addrspace(1)* %r,
11    float addrspace(1)* %a) {
12entry:
13  %a.val = load float, float addrspace(1)* %a
14  %r.val = fptrunc float %a.val to half
15  store half %r.val, half addrspace(1)* %r
16  ret void
17}
18
19; GCN-LABEL: {{^}}fptrunc_f64_to_f16
20; GCN: buffer_load_dwordx2 v{{\[}}[[A_F64_0:[0-9]+]]:[[A_F64_1:[0-9]+]]{{\]}}
21; GCN: v_cvt_f32_f64_e32 v[[A_F32:[0-9]+]], v{{\[}}[[A_F64_0]]:[[A_F64_1]]{{\]}}
22; GCN: v_cvt_f16_f32_e32 v[[R_F16:[0-9]+]], v[[A_F32]]
23; GCN: buffer_store_short v[[R_F16]]
24; GCN: s_endpgm
25define void @fptrunc_f64_to_f16(
26    half addrspace(1)* %r,
27    double addrspace(1)* %a) {
28entry:
29  %a.val = load double, double addrspace(1)* %a
30  %r.val = fptrunc double %a.val to half
31  store half %r.val, half addrspace(1)* %r
32  ret void
33}
34
35; GCN-LABEL: {{^}}fptrunc_v2f32_to_v2f16
36; GCN:     buffer_load_dwordx2 v{{\[}}[[A_F32_0:[0-9]+]]:[[A_F32_1:[0-9]+]]{{\]}}
37; GCN-DAG: v_cvt_f16_f32_e32 v[[R_F16_0:[0-9]+]], v[[A_F32_0]]
38; GCN-DAG: v_cvt_f16_f32_e32 v[[R_F16_1:[0-9]+]], v[[A_F32_1]]
39; GCN-DAG: v_and_b32_e32 v[[R_F16_LO:[0-9]+]], 0xffff, v[[R_F16_0]]
40; GCN-DAG: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]]
41; GCN:     v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_HI]], v[[R_F16_LO]]
42; GCN:     buffer_store_dword v[[R_V2_F16]]
43; GCN:     s_endpgm
44define void @fptrunc_v2f32_to_v2f16(
45    <2 x half> addrspace(1)* %r,
46    <2 x float> addrspace(1)* %a) {
47entry:
48  %a.val = load <2 x float>, <2 x float> addrspace(1)* %a
49  %r.val = fptrunc <2 x float> %a.val to <2 x half>
50  store <2 x half> %r.val, <2 x half> addrspace(1)* %r
51  ret void
52}
53
54; GCN-LABEL: {{^}}fptrunc_v2f64_to_v2f16
55; GCN: buffer_load_dwordx4 v{{\[}}[[A_F64_0:[0-9]+]]:[[A_F64_3:[0-9]+]]{{\]}}
56; GCN: v_cvt_f32_f64_e32 v[[A_F32_0:[0-9]+]], v{{\[}}[[A_F64_0]]:{{[0-9]+}}{{\]}}
57; GCN: v_cvt_f32_f64_e32 v[[A_F32_1:[0-9]+]], v{{\[}}{{[0-9]+}}:[[A_F64_3]]{{\]}}
58; GCN: v_cvt_f16_f32_e32 v[[R_F16_0:[0-9]+]], v[[A_F32_0]]
59; GCN: v_cvt_f16_f32_e32 v[[R_F16_1:[0-9]+]], v[[A_F32_1]]
60; GCN: v_and_b32_e32 v[[R_F16_LO:[0-9]+]], 0xffff, v[[R_F16_0]]
61; GCN: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]]
62; GCN: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_HI]], v[[R_F16_LO]]
63; GCN: buffer_store_dword v[[R_V2_F16]]
64define void @fptrunc_v2f64_to_v2f16(
65    <2 x half> addrspace(1)* %r,
66    <2 x double> addrspace(1)* %a) {
67entry:
68  %a.val = load <2 x double>, <2 x double> addrspace(1)* %a
69  %r.val = fptrunc <2 x double> %a.val to <2 x half>
70  store <2 x half> %r.val, <2 x half> addrspace(1)* %r
71  ret void
72}
73