1; RUN: llc -march=amdgcn -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
3
4; GCN-LABEL: {{^}}fptoui_f16_to_i16
5; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
6; GCN: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
7; SI:  v_cvt_u32_f32_e32 v[[R_I16:[0-9]+]], v[[A_F32]]
8; VI:  v_cvt_i32_f32_e32 v[[R_I16:[0-9]+]], v[[A_F32]]
9; GCN: buffer_store_short v[[R_I16]]
10; GCN: s_endpgm
11define void @fptoui_f16_to_i16(
12    i16 addrspace(1)* %r,
13    half addrspace(1)* %a) {
14entry:
15  %a.val = load half, half addrspace(1)* %a
16  %r.val = fptoui half %a.val to i16
17  store i16 %r.val, i16 addrspace(1)* %r
18  ret void
19}
20
21; GCN-LABEL: {{^}}fptoui_f16_to_i32
22; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
23; GCN: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]]
24; GCN: v_cvt_u32_f32_e32 v[[R_I32:[0-9]+]], v[[A_F32]]
25; GCN: buffer_store_dword v[[R_I32]]
26; GCN: s_endpgm
27define void @fptoui_f16_to_i32(
28    i32 addrspace(1)* %r,
29    half addrspace(1)* %a) {
30entry:
31  %a.val = load half, half addrspace(1)* %a
32  %r.val = fptoui half %a.val to i32
33  store i32 %r.val, i32 addrspace(1)* %r
34  ret void
35}
36
37; Need to make sure we promote f16 to f32 when converting f16 to i64. Existing
38; test checks code generated for 'i64 = fp_to_uint f32'.
39
40; GCN-LABEL: {{^}}fptoui_f16_to_i64
41; GCN: buffer_load_ushort
42; GCN: v_cvt_f32_f16_e32
43; GCN: s_endpgm
44define void @fptoui_f16_to_i64(
45    i64 addrspace(1)* %r,
46    half addrspace(1)* %a) {
47entry:
48  %a.val = load half, half addrspace(1)* %a
49  %r.val = fptoui half %a.val to i64
50  store i64 %r.val, i64 addrspace(1)* %r
51  ret void
52}
53
54; GCN-LABEL: {{^}}fptoui_v2f16_to_v2i16
55; GCN:     buffer_load_dword v[[A_V2_F16:[0-9]+]]
56; GCN:     v_lshrrev_b32_e32 v[[A_F16_1:[0-9]+]], 16, v[[A_V2_F16]]
57; GCN-DAG: v_cvt_f32_f16_e32 v[[A_F32_1:[0-9]+]], v[[A_F16_1]]
58; GCN-DAG: v_cvt_f32_f16_e32 v[[A_F32_0:[0-9]+]], v[[A_V2_F16]]
59; SI:      v_cvt_u32_f32_e32 v[[R_I16_1:[0-9]+]], v[[A_F32_1]]
60; SI:      v_cvt_u32_f32_e32 v[[R_I16_0:[0-9]+]], v[[A_F32_0]]
61; VI:      v_cvt_i32_f32_e32 v[[R_I16_0:[0-9]+]], v[[A_F32_0]]
62; VI:      v_cvt_i32_f32_e32 v[[R_I16_1:[0-9]+]], v[[A_F32_1]]
63; GCN:     v_lshlrev_b32_e32 v[[R_I16_HI:[0-9]+]], 16, v[[R_I16_1]]
64; GCN:     v_or_b32_e32 v[[R_V2_I16:[0-9]+]], v[[R_I16_HI]], v[[R_I16_0]]
65; GCN:     buffer_store_dword v[[R_V2_I16]]
66; GCN:     s_endpgm
67define void @fptoui_v2f16_to_v2i16(
68    <2 x i16> addrspace(1)* %r,
69    <2 x half> addrspace(1)* %a) {
70entry:
71  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
72  %r.val = fptoui <2 x half> %a.val to <2 x i16>
73  store <2 x i16> %r.val, <2 x i16> addrspace(1)* %r
74  ret void
75}
76
77; GCN-LABEL: {{^}}fptoui_v2f16_to_v2i32
78; GCN: buffer_load_dword
79; GCN: v_cvt_f32_f16_e32
80; GCN: v_cvt_f32_f16_e32
81; GCN: v_cvt_u32_f32_e32
82; GCN: v_cvt_u32_f32_e32
83; GCN: buffer_store_dwordx2
84; GCN: s_endpgm
85define void @fptoui_v2f16_to_v2i32(
86    <2 x i32> addrspace(1)* %r,
87    <2 x half> addrspace(1)* %a) {
88entry:
89  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
90  %r.val = fptoui <2 x half> %a.val to <2 x i32>
91  store <2 x i32> %r.val, <2 x i32> addrspace(1)* %r
92  ret void
93}
94
95; Need to make sure we promote f16 to f32 when converting f16 to i64. Existing
96; test checks code generated for 'i64 = fp_to_uint f32'.
97
98; GCN-LABEL: {{^}}fptoui_v2f16_to_v2i64
99; GCN: buffer_load_dword
100; GCN: v_cvt_f32_f16_e32
101; GCN: v_cvt_f32_f16_e32
102; GCN: s_endpgm
103define void @fptoui_v2f16_to_v2i64(
104    <2 x i64> addrspace(1)* %r,
105    <2 x half> addrspace(1)* %a) {
106entry:
107  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
108  %r.val = fptoui <2 x half> %a.val to <2 x i64>
109  store <2 x i64> %r.val, <2 x i64> addrspace(1)* %r
110  ret void
111}
112