1; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI-NOXNACK -check-prefix=GCN %s 3 4; RUN: llc -march=amdgcn -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=VI-NOXNACK,GCN %s 5; RUN: llc -march=amdgcn -mcpu=stoney -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=VI-NOXNACK,GCN %s 6 7; RUN: llc -march=amdgcn -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s 8; RUN: llc -march=amdgcn -mcpu=stoney -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s 9 10; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck -check-prefixes=CI,HSA-CI-V2,GCN %s 11; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo --amdhsa-code-object-version=2 -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=VI-XNACK,HSA-VI-XNACK-V2,GCN %s 12 13; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s 14; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=VI-NOXNACK,HSA-VI-NOXNACK,GCN %s 15; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=VI-XNACK,HSA-VI-XNACK,GCN %s 16 17; GCN-LABEL: {{^}}no_vcc_no_flat: 18 19; HSA-CI-V2: is_xnack_enabled = 0 20; HSA-VI-XNACK-V2: is_xnack_enabled = 1 21 22; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 23; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 24; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 25 26; CI: ; NumSgprs: 8 27; VI-NOXNACK: ; NumSgprs: 8 28; VI-XNACK: ; NumSgprs: 12 29define amdgpu_kernel void @no_vcc_no_flat() { 30entry: 31 call void asm sideeffect "", "~{s7}"() 32 ret void 33} 34 35; GCN-LABEL: {{^}}vcc_no_flat: 36 37; HSA-CI-V2: is_xnack_enabled = 0 38; HSA-VI-XNACK-V2: is_xnack_enabled = 1 39 40; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 41; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 42; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 43 44; CI: ; NumSgprs: 10 45; VI-NOXNACK: ; NumSgprs: 10 46; VI-XNACK: ; NumSgprs: 12 47define amdgpu_kernel void @vcc_no_flat() { 48entry: 49 call void asm sideeffect "", "~{s7},~{vcc}"() 50 ret void 51} 52 53; GCN-LABEL: {{^}}no_vcc_flat: 54 55; HSA-CI-V2: is_xnack_enabled = 0 56; HSA-VI-XNACK-V2: is_xnack_enabled = 1 57 58; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 59; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 60; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 61 62; CI: ; NumSgprs: 12 63; VI-NOXNACK: ; NumSgprs: 14 64; VI-XNACK: ; NumSgprs: 14 65define amdgpu_kernel void @no_vcc_flat() { 66entry: 67 call void asm sideeffect "", "~{s7},~{flat_scratch}"() 68 ret void 69} 70 71; GCN-LABEL: {{^}}vcc_flat: 72 73; HSA-CI-V2: is_xnack_enabled = 0 74; HSA-VI-XNACK-V2: is_xnack_enabled = 1 75 76; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 77; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 78; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 79 80; CI: ; NumSgprs: 12 81; VI-NOXNACK: ; NumSgprs: 14 82; VI-XNACK: ; NumSgprs: 14 83define amdgpu_kernel void @vcc_flat() { 84entry: 85 call void asm sideeffect "", "~{s7},~{vcc},~{flat_scratch}"() 86 ret void 87} 88 89; Make sure used SGPR count for flat_scr is correct when there is no 90; scratch usage and implicit flat uses. 91 92; GCN-LABEL: {{^}}use_flat_scr: 93 94; HSA-CI-V2: is_xnack_enabled = 0 95; HSA-VI-XNACK-V2: is_xnack_enabled = 1 96 97; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 98; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 99; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 100 101; CI: NumSgprs: 4 102; VI-NOXNACK: NumSgprs: 6 103; VI-XNACK: NumSgprs: 6 104define amdgpu_kernel void @use_flat_scr() #0 { 105entry: 106 call void asm sideeffect "; clobber ", "~{flat_scratch}"() 107 ret void 108} 109 110; GCN-LABEL: {{^}}use_flat_scr_lo: 111 112; HSA-CI-V2: is_xnack_enabled = 0 113; HSA-VI-XNACK-V2: is_xnack_enabled = 1 114 115; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 116; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 117; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 118 119; CI: NumSgprs: 4 120; VI-NOXNACK: NumSgprs: 6 121; VI-XNACK: NumSgprs: 6 122define amdgpu_kernel void @use_flat_scr_lo() #0 { 123entry: 124 call void asm sideeffect "; clobber ", "~{flat_scratch_lo}"() 125 ret void 126} 127 128; GCN-LABEL: {{^}}use_flat_scr_hi: 129 130; HSA-CI-V2: is_xnack_enabled = 0 131; HSA-VI-XNACK-V2: is_xnack_enabled = 1 132 133; NOT-HSA-CI: .amdhsa_reserve_xnack_mask 134; HSA-VI-NOXNACK: .amdhsa_reserve_xnack_mask 0 135; HSA-VI-XNACK: .amdhsa_reserve_xnack_mask 1 136 137; CI: NumSgprs: 4 138; VI-NOXNACK: NumSgprs: 6 139; VI-XNACK: NumSgprs: 6 140define amdgpu_kernel void @use_flat_scr_hi() #0 { 141entry: 142 call void asm sideeffect "; clobber ", "~{flat_scratch_hi}"() 143 ret void 144} 145 146attributes #0 = { nounwind } 147