1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=-unaligned-access-mode < %s | FileCheck -check-prefixes=GCN,GFX7-ALIGNED %s 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=+unaligned-access-mode < %s | FileCheck -check-prefixes=GCN,GFX7-UNALIGNED %s 4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+unaligned-access-mode < %s | FileCheck -check-prefixes=GCN,GFX9 %s 5 6; Should not merge this to a dword load 7define i32 @global_load_2xi16_align2(i16 addrspace(1)* %p) #0 { 8; GFX7-ALIGNED-LABEL: global_load_2xi16_align2: 9; GFX7-ALIGNED: ; %bb.0: 10; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 11; GFX7-ALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v0 12; GFX7-ALIGNED-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc 13; GFX7-ALIGNED-NEXT: flat_load_ushort v0, v[0:1] 14; GFX7-ALIGNED-NEXT: flat_load_ushort v1, v[2:3] 15; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 16; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v1, 16, v1 17; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v0, v1 18; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31] 19; 20; GFX7-UNALIGNED-LABEL: global_load_2xi16_align2: 21; GFX7-UNALIGNED: ; %bb.0: 22; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 23; GFX7-UNALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v0 24; GFX7-UNALIGNED-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc 25; GFX7-UNALIGNED-NEXT: flat_load_ushort v0, v[0:1] 26; GFX7-UNALIGNED-NEXT: flat_load_ushort v1, v[2:3] 27; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 28; GFX7-UNALIGNED-NEXT: v_lshlrev_b32_e32 v1, 16, v1 29; GFX7-UNALIGNED-NEXT: v_or_b32_e32 v0, v0, v1 30; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31] 31; 32; GFX9-LABEL: global_load_2xi16_align2: 33; GFX9: ; %bb.0: 34; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 35; GFX9-NEXT: global_load_ushort v2, v[0:1], off 36; GFX9-NEXT: global_load_ushort v0, v[0:1], off offset:2 37; GFX9-NEXT: s_waitcnt vmcnt(0) 38; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v2 39; GFX9-NEXT: s_setpc_b64 s[30:31] 40 %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1 41 %p.0 = load i16, i16 addrspace(1)* %p, align 2 42 %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2 43 %zext.0 = zext i16 %p.0 to i32 44 %zext.1 = zext i16 %p.1 to i32 45 %shl.1 = shl i32 %zext.1, 16 46 %or = or i32 %zext.0, %shl.1 47 ret i32 %or 48} 49 50; Should not merge this to a dword store 51define amdgpu_kernel void @global_store_2xi16_align2(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 { 52; GFX7-ALIGNED-LABEL: global_store_2xi16_align2: 53; GFX7-ALIGNED: ; %bb.0: 54; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 55; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 1 56; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0) 57; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0 58; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2 59; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 60; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2 61; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0 62; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s2 63; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 2 64; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s3 65; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2 66; GFX7-ALIGNED-NEXT: s_endpgm 67; 68; GFX7-UNALIGNED-LABEL: global_store_2xi16_align2: 69; GFX7-UNALIGNED: ; %bb.0: 70; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 71; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 1 72; GFX7-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) 73; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0 74; GFX7-UNALIGNED-NEXT: s_add_u32 s2, s0, 2 75; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1 76; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2 77; GFX7-UNALIGNED-NEXT: s_addc_u32 s3, s1, 0 78; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s2 79; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 2 80; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s3 81; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2 82; GFX7-UNALIGNED-NEXT: s_endpgm 83; 84; GFX9-LABEL: global_store_2xi16_align2: 85; GFX9: ; %bb.0: 86; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 87; GFX9-NEXT: v_mov_b32_e32 v2, 1 88; GFX9-NEXT: v_mov_b32_e32 v3, 2 89; GFX9-NEXT: s_waitcnt lgkmcnt(0) 90; GFX9-NEXT: v_mov_b32_e32 v0, s0 91; GFX9-NEXT: v_mov_b32_e32 v1, s1 92; GFX9-NEXT: global_store_short v[0:1], v2, off 93; GFX9-NEXT: global_store_short v[0:1], v3, off offset:2 94; GFX9-NEXT: s_endpgm 95 %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1 96 store i16 1, i16 addrspace(1)* %r, align 2 97 store i16 2, i16 addrspace(1)* %gep.r, align 2 98 ret void 99} 100 101; Should produce align 1 dword when legal 102define i32 @global_load_2xi16_align1(i16 addrspace(1)* %p) #0 { 103; GFX7-ALIGNED-LABEL: global_load_2xi16_align1: 104; GFX7-ALIGNED: ; %bb.0: 105; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 106; GFX7-ALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v0 107; GFX7-ALIGNED-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc 108; GFX7-ALIGNED-NEXT: v_add_i32_e32 v4, vcc, 1, v0 109; GFX7-ALIGNED-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc 110; GFX7-ALIGNED-NEXT: v_add_i32_e32 v6, vcc, 3, v0 111; GFX7-ALIGNED-NEXT: v_addc_u32_e32 v7, vcc, 0, v1, vcc 112; GFX7-ALIGNED-NEXT: flat_load_ubyte v0, v[0:1] 113; GFX7-ALIGNED-NEXT: flat_load_ubyte v1, v[6:7] 114; GFX7-ALIGNED-NEXT: flat_load_ubyte v4, v[4:5] 115; GFX7-ALIGNED-NEXT: flat_load_ubyte v2, v[2:3] 116; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(2) lgkmcnt(2) 117; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v1, 8, v1 118; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(1) lgkmcnt(1) 119; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v3, 8, v4 120; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 121; GFX7-ALIGNED-NEXT: v_or_b32_e32 v1, v1, v2 122; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v3, v0 123; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v1, 16, v1 124; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v0, v1 125; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31] 126; 127; GFX7-UNALIGNED-LABEL: global_load_2xi16_align1: 128; GFX7-UNALIGNED: ; %bb.0: 129; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 130; GFX7-UNALIGNED-NEXT: flat_load_dword v0, v[0:1] 131; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 132; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31] 133; 134; GFX9-LABEL: global_load_2xi16_align1: 135; GFX9: ; %bb.0: 136; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 137; GFX9-NEXT: global_load_dword v0, v[0:1], off 138; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff 139; GFX9-NEXT: s_mov_b32 s4, 0xffff 140; GFX9-NEXT: s_waitcnt vmcnt(0) 141; GFX9-NEXT: v_bfi_b32 v1, v1, 0, v0 142; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v1 143; GFX9-NEXT: s_setpc_b64 s[30:31] 144 %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1 145 %p.0 = load i16, i16 addrspace(1)* %p, align 1 146 %p.1 = load i16, i16 addrspace(1)* %gep.p, align 1 147 %zext.0 = zext i16 %p.0 to i32 148 %zext.1 = zext i16 %p.1 to i32 149 %shl.1 = shl i32 %zext.1, 16 150 %or = or i32 %zext.0, %shl.1 151 ret i32 %or 152} 153 154; Should produce align 1 dword when legal 155define amdgpu_kernel void @global_store_2xi16_align1(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 { 156; GFX7-ALIGNED-LABEL: global_store_2xi16_align1: 157; GFX7-ALIGNED: ; %bb.0: 158; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 159; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v4, 1 160; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v5, 0 161; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0) 162; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2 163; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0 164; GFX7-ALIGNED-NEXT: s_add_u32 s4, s0, 1 165; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0 166; GFX7-ALIGNED-NEXT: s_addc_u32 s5, s1, 0 167; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 168; GFX7-ALIGNED-NEXT: s_add_u32 s0, s0, 3 169; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, s4 170; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, s5 171; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v4 172; GFX7-ALIGNED-NEXT: flat_store_byte v[2:3], v5 173; GFX7-ALIGNED-NEXT: s_addc_u32 s1, s1, 0 174; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0 175; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, s2 176; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 177; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v4, 2 178; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, s3 179; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v5 180; GFX7-ALIGNED-NEXT: flat_store_byte v[2:3], v4 181; GFX7-ALIGNED-NEXT: s_endpgm 182; 183; GFX7-UNALIGNED-LABEL: global_store_2xi16_align1: 184; GFX7-UNALIGNED: ; %bb.0: 185; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 186; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 0x20001 187; GFX7-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) 188; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0 189; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1 190; GFX7-UNALIGNED-NEXT: flat_store_dword v[0:1], v2 191; GFX7-UNALIGNED-NEXT: s_endpgm 192; 193; GFX9-LABEL: global_store_2xi16_align1: 194; GFX9: ; %bb.0: 195; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 196; GFX9-NEXT: v_mov_b32_e32 v2, 0x20001 197; GFX9-NEXT: s_waitcnt lgkmcnt(0) 198; GFX9-NEXT: v_mov_b32_e32 v0, s0 199; GFX9-NEXT: v_mov_b32_e32 v1, s1 200; GFX9-NEXT: global_store_dword v[0:1], v2, off 201; GFX9-NEXT: s_endpgm 202 %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1 203 store i16 1, i16 addrspace(1)* %r, align 1 204 store i16 2, i16 addrspace(1)* %gep.r, align 1 205 ret void 206} 207 208; Should merge this to a dword load 209define i32 @global_load_2xi16_align4(i16 addrspace(1)* %p) #0 { 210; GFX7-LABEL: load_2xi16_align4: 211; GFX7: ; %bb.0: 212; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 213; GFX7-NEXT: flat_load_dword v0, v[0:1] 214; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 215; GFX7-NEXT: s_setpc_b64 s[30:31] 216; 217; GFX7-ALIGNED-LABEL: global_load_2xi16_align4: 218; GFX7-ALIGNED: ; %bb.0: 219; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 220; GFX7-ALIGNED-NEXT: flat_load_dword v0, v[0:1] 221; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 222; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31] 223; 224; GFX7-UNALIGNED-LABEL: global_load_2xi16_align4: 225; GFX7-UNALIGNED: ; %bb.0: 226; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 227; GFX7-UNALIGNED-NEXT: flat_load_dword v0, v[0:1] 228; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 229; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31] 230; 231; GFX9-LABEL: global_load_2xi16_align4: 232; GFX9: ; %bb.0: 233; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 234; GFX9-NEXT: global_load_dword v0, v[0:1], off 235; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff 236; GFX9-NEXT: s_mov_b32 s4, 0xffff 237; GFX9-NEXT: s_waitcnt vmcnt(0) 238; GFX9-NEXT: v_bfi_b32 v1, v1, 0, v0 239; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v1 240; GFX9-NEXT: s_setpc_b64 s[30:31] 241 %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1 242 %p.0 = load i16, i16 addrspace(1)* %p, align 4 243 %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2 244 %zext.0 = zext i16 %p.0 to i32 245 %zext.1 = zext i16 %p.1 to i32 246 %shl.1 = shl i32 %zext.1, 16 247 %or = or i32 %zext.0, %shl.1 248 ret i32 %or 249} 250 251; Should merge this to a dword store 252define amdgpu_kernel void @global_store_2xi16_align4(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 { 253; GFX7-LABEL: global_store_2xi16_align4: 254; GFX7: ; %bb.0: 255; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 256; GFX7-NEXT: v_mov_b32_e32 v2, 0x20001 257; GFX7-NEXT: s_waitcnt lgkmcnt(0) 258; GFX7-NEXT: v_mov_b32_e32 v0, s0 259; GFX7-NEXT: v_mov_b32_e32 v1, s1 260; GFX7-NEXT: flat_store_dword v[0:1], v2 261; GFX7-NEXT: s_endpgm 262; 263; GFX7-ALIGNED-LABEL: global_store_2xi16_align4: 264; GFX7-ALIGNED: ; %bb.0: 265; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 266; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 0x20001 267; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0) 268; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0 269; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 270; GFX7-ALIGNED-NEXT: flat_store_dword v[0:1], v2 271; GFX7-ALIGNED-NEXT: s_endpgm 272; 273; GFX7-UNALIGNED-LABEL: global_store_2xi16_align4: 274; GFX7-UNALIGNED: ; %bb.0: 275; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 276; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 0x20001 277; GFX7-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) 278; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0 279; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1 280; GFX7-UNALIGNED-NEXT: flat_store_dword v[0:1], v2 281; GFX7-UNALIGNED-NEXT: s_endpgm 282; 283; GFX9-LABEL: global_store_2xi16_align4: 284; GFX9: ; %bb.0: 285; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 286; GFX9-NEXT: v_mov_b32_e32 v2, 0x20001 287; GFX9-NEXT: s_waitcnt lgkmcnt(0) 288; GFX9-NEXT: v_mov_b32_e32 v0, s0 289; GFX9-NEXT: v_mov_b32_e32 v1, s1 290; GFX9-NEXT: global_store_dword v[0:1], v2, off 291; GFX9-NEXT: s_endpgm 292 %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1 293 store i16 1, i16 addrspace(1)* %r, align 4 294 store i16 2, i16 addrspace(1)* %gep.r, align 2 295 ret void 296} 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330