1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=-unaligned-access-mode < %s | FileCheck --check-prefix=GFX7-ALIGNED %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX7-UNALIGNED %s
4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX9 %s
5; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX10 %s
6; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX11 %s
7
8; Should not merge this to a dword load
9define i32 @global_load_2xi16_align2(i16 addrspace(1)* %p) #0 {
10; GFX7-ALIGNED-LABEL: global_load_2xi16_align2:
11; GFX7-ALIGNED:       ; %bb.0:
12; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 2, v0
14; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
15; GFX7-ALIGNED-NEXT:    flat_load_ushort v2, v[2:3]
16; GFX7-ALIGNED-NEXT:    flat_load_ushort v0, v[0:1]
17; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(1)
18; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
19; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
20; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v0, v1
21; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
22;
23; GFX7-UNALIGNED-LABEL: global_load_2xi16_align2:
24; GFX7-UNALIGNED:       ; %bb.0:
25; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26; GFX7-UNALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 2, v0
27; GFX7-UNALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
28; GFX7-UNALIGNED-NEXT:    flat_load_ushort v2, v[2:3]
29; GFX7-UNALIGNED-NEXT:    flat_load_ushort v0, v[0:1]
30; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(1)
31; GFX7-UNALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
32; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
33; GFX7-UNALIGNED-NEXT:    v_or_b32_e32 v0, v0, v1
34; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
35;
36; GFX9-LABEL: global_load_2xi16_align2:
37; GFX9:       ; %bb.0:
38; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
39; GFX9-NEXT:    global_load_ushort v2, v[0:1], off
40; GFX9-NEXT:    global_load_ushort v3, v[0:1], off offset:2
41; GFX9-NEXT:    s_waitcnt vmcnt(0)
42; GFX9-NEXT:    v_lshl_or_b32 v0, v3, 16, v2
43; GFX9-NEXT:    s_setpc_b64 s[30:31]
44;
45; GFX10-LABEL: global_load_2xi16_align2:
46; GFX10:       ; %bb.0:
47; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
48; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
49; GFX10-NEXT:    s_clause 0x1
50; GFX10-NEXT:    global_load_ushort v2, v[0:1], off
51; GFX10-NEXT:    global_load_ushort v3, v[0:1], off offset:2
52; GFX10-NEXT:    s_waitcnt vmcnt(0)
53; GFX10-NEXT:    v_lshl_or_b32 v0, v3, 16, v2
54; GFX10-NEXT:    s_setpc_b64 s[30:31]
55;
56; GFX11-LABEL: global_load_2xi16_align2:
57; GFX11:       ; %bb.0:
58; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
59; GFX11-NEXT:    s_waitcnt_vscnt null, 0x0
60; GFX11-NEXT:    s_clause 0x1
61; GFX11-NEXT:    global_load_u16 v2, v[0:1], off
62; GFX11-NEXT:    global_load_u16 v0, v[0:1], off offset:2
63; GFX11-NEXT:    s_waitcnt vmcnt(0)
64; GFX11-NEXT:    v_lshl_or_b32 v0, v0, 16, v2
65; GFX11-NEXT:    s_setpc_b64 s[30:31]
66  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
67  %p.0 = load i16, i16 addrspace(1)* %p, align 2
68  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2
69  %zext.0 = zext i16 %p.0 to i32
70  %zext.1 = zext i16 %p.1 to i32
71  %shl.1 = shl i32 %zext.1, 16
72  %or = or i32 %zext.0, %shl.1
73  ret i32 %or
74}
75
76; Should not merge this to a dword store
77define amdgpu_kernel void @global_store_2xi16_align2(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
78; GFX7-ALIGNED-LABEL: global_store_2xi16_align2:
79; GFX7-ALIGNED:       ; %bb.0:
80; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
81; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 1
82; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
83; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
84; GFX7-ALIGNED-NEXT:    s_add_u32 s2, s0, 2
85; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
86; GFX7-ALIGNED-NEXT:    s_addc_u32 s3, s1, 0
87; GFX7-ALIGNED-NEXT:    flat_store_short v[0:1], v2
88; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s2
89; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 2
90; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s3
91; GFX7-ALIGNED-NEXT:    flat_store_short v[0:1], v2
92; GFX7-ALIGNED-NEXT:    s_endpgm
93;
94; GFX7-UNALIGNED-LABEL: global_store_2xi16_align2:
95; GFX7-UNALIGNED:       ; %bb.0:
96; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
97; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 1
98; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
99; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
100; GFX7-UNALIGNED-NEXT:    s_add_u32 s2, s0, 2
101; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
102; GFX7-UNALIGNED-NEXT:    s_addc_u32 s3, s1, 0
103; GFX7-UNALIGNED-NEXT:    flat_store_short v[0:1], v2
104; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s2
105; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 2
106; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s3
107; GFX7-UNALIGNED-NEXT:    flat_store_short v[0:1], v2
108; GFX7-UNALIGNED-NEXT:    s_endpgm
109;
110; GFX9-LABEL: global_store_2xi16_align2:
111; GFX9:       ; %bb.0:
112; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
113; GFX9-NEXT:    v_mov_b32_e32 v0, 0
114; GFX9-NEXT:    v_mov_b32_e32 v1, 1
115; GFX9-NEXT:    v_mov_b32_e32 v2, 2
116; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
117; GFX9-NEXT:    global_store_short v0, v1, s[0:1]
118; GFX9-NEXT:    global_store_short v0, v2, s[0:1] offset:2
119; GFX9-NEXT:    s_endpgm
120;
121; GFX10-LABEL: global_store_2xi16_align2:
122; GFX10:       ; %bb.0:
123; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
124; GFX10-NEXT:    v_mov_b32_e32 v0, 0
125; GFX10-NEXT:    v_mov_b32_e32 v1, 1
126; GFX10-NEXT:    v_mov_b32_e32 v2, 2
127; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
128; GFX10-NEXT:    global_store_short v0, v1, s[0:1]
129; GFX10-NEXT:    global_store_short v0, v2, s[0:1] offset:2
130; GFX10-NEXT:    s_endpgm
131;
132; GFX11-LABEL: global_store_2xi16_align2:
133; GFX11:       ; %bb.0:
134; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x8
135; GFX11-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
136; GFX11-NEXT:    v_mov_b32_e32 v2, 2
137; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
138; GFX11-NEXT:    s_clause 0x1
139; GFX11-NEXT:    global_store_b16 v0, v1, s[0:1]
140; GFX11-NEXT:    global_store_b16 v0, v2, s[0:1] offset:2
141; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
142; GFX11-NEXT:    s_endpgm
143  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
144  store i16 1, i16 addrspace(1)* %r, align 2
145  store i16 2, i16 addrspace(1)* %gep.r, align 2
146  ret void
147}
148
149; Should produce align 1 dword when legal
150define i32 @global_load_2xi16_align1(i16 addrspace(1)* %p) #0 {
151; GFX7-ALIGNED-LABEL: global_load_2xi16_align1:
152; GFX7-ALIGNED:       ; %bb.0:
153; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
154; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
155; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
156; GFX7-ALIGNED-NEXT:    flat_load_ubyte v4, v[2:3]
157; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 3, v0
158; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
159; GFX7-ALIGNED-NEXT:    flat_load_ubyte v5, v[0:1]
160; GFX7-ALIGNED-NEXT:    flat_load_ubyte v2, v[2:3]
161; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v0, vcc, 2, v0
162; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
163; GFX7-ALIGNED-NEXT:    flat_load_ubyte v0, v[0:1]
164; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(3)
165; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 8, v4
166; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(2)
167; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v1, v1, v5
168; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(1)
169; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v2, 8, v2
170; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
171; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v2, v0
172; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
173; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v1, v0
174; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
175;
176; GFX7-UNALIGNED-LABEL: global_load_2xi16_align1:
177; GFX7-UNALIGNED:       ; %bb.0:
178; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
179; GFX7-UNALIGNED-NEXT:    flat_load_dword v0, v[0:1]
180; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
181; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
182;
183; GFX9-LABEL: global_load_2xi16_align1:
184; GFX9:       ; %bb.0:
185; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
186; GFX9-NEXT:    global_load_dword v0, v[0:1], off
187; GFX9-NEXT:    v_mov_b32_e32 v1, 0xffff
188; GFX9-NEXT:    s_mov_b32 s4, 0xffff
189; GFX9-NEXT:    s_waitcnt vmcnt(0)
190; GFX9-NEXT:    v_bfi_b32 v1, v1, 0, v0
191; GFX9-NEXT:    v_and_or_b32 v0, v0, s4, v1
192; GFX9-NEXT:    s_setpc_b64 s[30:31]
193;
194; GFX10-LABEL: global_load_2xi16_align1:
195; GFX10:       ; %bb.0:
196; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
197; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
198; GFX10-NEXT:    global_load_dword v0, v[0:1], off
199; GFX10-NEXT:    s_waitcnt vmcnt(0)
200; GFX10-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
201; GFX10-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
202; GFX10-NEXT:    s_setpc_b64 s[30:31]
203;
204; GFX11-LABEL: global_load_2xi16_align1:
205; GFX11:       ; %bb.0:
206; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
207; GFX11-NEXT:    s_waitcnt_vscnt null, 0x0
208; GFX11-NEXT:    global_load_b32 v0, v[0:1], off
209; GFX11-NEXT:    s_waitcnt vmcnt(0)
210; GFX11-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
211; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
212; GFX11-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
213; GFX11-NEXT:    s_setpc_b64 s[30:31]
214  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
215  %p.0 = load i16, i16 addrspace(1)* %p, align 1
216  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 1
217  %zext.0 = zext i16 %p.0 to i32
218  %zext.1 = zext i16 %p.1 to i32
219  %shl.1 = shl i32 %zext.1, 16
220  %or = or i32 %zext.0, %shl.1
221  ret i32 %or
222}
223
224; Should produce align 1 dword when legal
225define amdgpu_kernel void @global_store_2xi16_align1(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
226; GFX7-ALIGNED-LABEL: global_store_2xi16_align1:
227; GFX7-ALIGNED:       ; %bb.0:
228; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
229; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 1
230; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v3, 0
231; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
232; GFX7-ALIGNED-NEXT:    s_add_u32 s2, s0, 2
233; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
234; GFX7-ALIGNED-NEXT:    s_addc_u32 s3, s1, 0
235; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
236; GFX7-ALIGNED-NEXT:    s_add_u32 s4, s0, 1
237; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v2
238; GFX7-ALIGNED-NEXT:    s_addc_u32 s5, s1, 0
239; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s4
240; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s5
241; GFX7-ALIGNED-NEXT:    s_add_u32 s0, s0, 3
242; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v3
243; GFX7-ALIGNED-NEXT:    s_addc_u32 s1, s1, 0
244; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
245; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
246; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v3
247; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s2
248; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 2
249; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s3
250; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v2
251; GFX7-ALIGNED-NEXT:    s_endpgm
252;
253; GFX7-UNALIGNED-LABEL: global_store_2xi16_align1:
254; GFX7-UNALIGNED:       ; %bb.0:
255; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
256; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
257; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
258; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
259; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
260; GFX7-UNALIGNED-NEXT:    flat_store_dword v[0:1], v2
261; GFX7-UNALIGNED-NEXT:    s_endpgm
262;
263; GFX9-LABEL: global_store_2xi16_align1:
264; GFX9:       ; %bb.0:
265; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
266; GFX9-NEXT:    v_mov_b32_e32 v0, 0
267; GFX9-NEXT:    v_mov_b32_e32 v1, 0x20001
268; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
269; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
270; GFX9-NEXT:    s_endpgm
271;
272; GFX10-LABEL: global_store_2xi16_align1:
273; GFX10:       ; %bb.0:
274; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
275; GFX10-NEXT:    v_mov_b32_e32 v0, 0
276; GFX10-NEXT:    v_mov_b32_e32 v1, 0x20001
277; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
278; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
279; GFX10-NEXT:    s_endpgm
280;
281; GFX11-LABEL: global_store_2xi16_align1:
282; GFX11:       ; %bb.0:
283; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x8
284; GFX11-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x20001
285; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
286; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
287; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
288; GFX11-NEXT:    s_endpgm
289  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
290  store i16 1, i16 addrspace(1)* %r, align 1
291  store i16 2, i16 addrspace(1)* %gep.r, align 1
292  ret void
293}
294
295; Should merge this to a dword load
296define i32 @global_load_2xi16_align4(i16 addrspace(1)* %p) #0 {
297; GFX7-LABEL: load_2xi16_align4:
298; GFX7:       ; %bb.0:
299; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
300; GFX7-NEXT:    flat_load_dword v0, v[0:1]
301; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
302; GFX7-NEXT:    s_setpc_b64 s[30:31]
303;
304; GFX7-ALIGNED-LABEL: global_load_2xi16_align4:
305; GFX7-ALIGNED:       ; %bb.0:
306; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
307; GFX7-ALIGNED-NEXT:    flat_load_dword v0, v[0:1]
308; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
309; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
310;
311; GFX7-UNALIGNED-LABEL: global_load_2xi16_align4:
312; GFX7-UNALIGNED:       ; %bb.0:
313; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
314; GFX7-UNALIGNED-NEXT:    flat_load_dword v0, v[0:1]
315; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
316; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
317;
318; GFX9-LABEL: global_load_2xi16_align4:
319; GFX9:       ; %bb.0:
320; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
321; GFX9-NEXT:    global_load_dword v0, v[0:1], off
322; GFX9-NEXT:    v_mov_b32_e32 v1, 0xffff
323; GFX9-NEXT:    s_mov_b32 s4, 0xffff
324; GFX9-NEXT:    s_waitcnt vmcnt(0)
325; GFX9-NEXT:    v_bfi_b32 v1, v1, 0, v0
326; GFX9-NEXT:    v_and_or_b32 v0, v0, s4, v1
327; GFX9-NEXT:    s_setpc_b64 s[30:31]
328;
329; GFX10-LABEL: global_load_2xi16_align4:
330; GFX10:       ; %bb.0:
331; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
332; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
333; GFX10-NEXT:    global_load_dword v0, v[0:1], off
334; GFX10-NEXT:    s_waitcnt vmcnt(0)
335; GFX10-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
336; GFX10-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
337; GFX10-NEXT:    s_setpc_b64 s[30:31]
338;
339; GFX11-LABEL: global_load_2xi16_align4:
340; GFX11:       ; %bb.0:
341; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
342; GFX11-NEXT:    s_waitcnt_vscnt null, 0x0
343; GFX11-NEXT:    global_load_b32 v0, v[0:1], off
344; GFX11-NEXT:    s_waitcnt vmcnt(0)
345; GFX11-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
346; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
347; GFX11-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
348; GFX11-NEXT:    s_setpc_b64 s[30:31]
349  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
350  %p.0 = load i16, i16 addrspace(1)* %p, align 4
351  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2
352  %zext.0 = zext i16 %p.0 to i32
353  %zext.1 = zext i16 %p.1 to i32
354  %shl.1 = shl i32 %zext.1, 16
355  %or = or i32 %zext.0, %shl.1
356  ret i32 %or
357}
358
359; Should merge this to a dword store
360define amdgpu_kernel void @global_store_2xi16_align4(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
361; GFX7-LABEL: global_store_2xi16_align4:
362; GFX7:       ; %bb.0:
363; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
364; GFX7-NEXT:    v_mov_b32_e32 v2, 0x20001
365; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
366; GFX7-NEXT:    v_mov_b32_e32 v0, s0
367; GFX7-NEXT:    v_mov_b32_e32 v1, s1
368; GFX7-NEXT:    flat_store_dword v[0:1], v2
369; GFX7-NEXT:    s_endpgm
370;
371; GFX7-ALIGNED-LABEL: global_store_2xi16_align4:
372; GFX7-ALIGNED:       ; %bb.0:
373; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
374; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
375; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
376; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
377; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
378; GFX7-ALIGNED-NEXT:    flat_store_dword v[0:1], v2
379; GFX7-ALIGNED-NEXT:    s_endpgm
380;
381; GFX7-UNALIGNED-LABEL: global_store_2xi16_align4:
382; GFX7-UNALIGNED:       ; %bb.0:
383; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
384; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
385; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
386; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
387; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
388; GFX7-UNALIGNED-NEXT:    flat_store_dword v[0:1], v2
389; GFX7-UNALIGNED-NEXT:    s_endpgm
390;
391; GFX9-LABEL: global_store_2xi16_align4:
392; GFX9:       ; %bb.0:
393; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
394; GFX9-NEXT:    v_mov_b32_e32 v0, 0
395; GFX9-NEXT:    v_mov_b32_e32 v1, 0x20001
396; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
397; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
398; GFX9-NEXT:    s_endpgm
399;
400; GFX10-LABEL: global_store_2xi16_align4:
401; GFX10:       ; %bb.0:
402; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
403; GFX10-NEXT:    v_mov_b32_e32 v0, 0
404; GFX10-NEXT:    v_mov_b32_e32 v1, 0x20001
405; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
406; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
407; GFX10-NEXT:    s_endpgm
408;
409; GFX11-LABEL: global_store_2xi16_align4:
410; GFX11:       ; %bb.0:
411; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x8
412; GFX11-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x20001
413; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
414; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
415; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
416; GFX11-NEXT:    s_endpgm
417  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
418  store i16 1, i16 addrspace(1)* %r, align 4
419  store i16 2, i16 addrspace(1)* %gep.r, align 2
420  ret void
421}
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