1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=-unaligned-access-mode < %s | FileCheck --check-prefix=GFX7-ALIGNED %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX7-UNALIGNED %s
4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX9 %s
5; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+unaligned-access-mode < %s | FileCheck --check-prefix=GFX10 %s
6
7; Should not merge this to a dword load
8define i32 @global_load_2xi16_align2(i16 addrspace(1)* %p) #0 {
9; GFX7-ALIGNED-LABEL: global_load_2xi16_align2:
10; GFX7-ALIGNED:       ; %bb.0:
11; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 2, v0
13; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
14; GFX7-ALIGNED-NEXT:    flat_load_ushort v0, v[0:1]
15; GFX7-ALIGNED-NEXT:    flat_load_ushort v1, v[2:3]
16; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
17; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
18; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v0, v1
19; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
20;
21; GFX7-UNALIGNED-LABEL: global_load_2xi16_align2:
22; GFX7-UNALIGNED:       ; %bb.0:
23; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
24; GFX7-UNALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 2, v0
25; GFX7-UNALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
26; GFX7-UNALIGNED-NEXT:    flat_load_ushort v0, v[0:1]
27; GFX7-UNALIGNED-NEXT:    flat_load_ushort v1, v[2:3]
28; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
29; GFX7-UNALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
30; GFX7-UNALIGNED-NEXT:    v_or_b32_e32 v0, v0, v1
31; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
32;
33; GFX9-LABEL: global_load_2xi16_align2:
34; GFX9:       ; %bb.0:
35; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
36; GFX9-NEXT:    global_load_ushort v2, v[0:1], off
37; GFX9-NEXT:    global_load_ushort v3, v[0:1], off offset:2
38; GFX9-NEXT:    s_waitcnt vmcnt(0)
39; GFX9-NEXT:    v_lshl_or_b32 v0, v3, 16, v2
40; GFX9-NEXT:    s_setpc_b64 s[30:31]
41;
42; GFX10-LABEL: global_load_2xi16_align2:
43; GFX10:       ; %bb.0:
44; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
45; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
46; GFX10-NEXT:    s_clause 0x1
47; GFX10-NEXT:    global_load_ushort v2, v[0:1], off
48; GFX10-NEXT:    global_load_ushort v3, v[0:1], off offset:2
49; GFX10-NEXT:    s_waitcnt vmcnt(0)
50; GFX10-NEXT:    v_lshl_or_b32 v0, v3, 16, v2
51; GFX10-NEXT:    s_setpc_b64 s[30:31]
52  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
53  %p.0 = load i16, i16 addrspace(1)* %p, align 2
54  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2
55  %zext.0 = zext i16 %p.0 to i32
56  %zext.1 = zext i16 %p.1 to i32
57  %shl.1 = shl i32 %zext.1, 16
58  %or = or i32 %zext.0, %shl.1
59  ret i32 %or
60}
61
62; Should not merge this to a dword store
63define amdgpu_kernel void @global_store_2xi16_align2(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
64; GFX7-ALIGNED-LABEL: global_store_2xi16_align2:
65; GFX7-ALIGNED:       ; %bb.0:
66; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
67; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 1
68; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
69; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
70; GFX7-ALIGNED-NEXT:    s_add_u32 s2, s0, 2
71; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
72; GFX7-ALIGNED-NEXT:    flat_store_short v[0:1], v2
73; GFX7-ALIGNED-NEXT:    s_addc_u32 s3, s1, 0
74; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s2
75; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 2
76; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s3
77; GFX7-ALIGNED-NEXT:    flat_store_short v[0:1], v2
78; GFX7-ALIGNED-NEXT:    s_endpgm
79;
80; GFX7-UNALIGNED-LABEL: global_store_2xi16_align2:
81; GFX7-UNALIGNED:       ; %bb.0:
82; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
83; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 1
84; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
85; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
86; GFX7-UNALIGNED-NEXT:    s_add_u32 s2, s0, 2
87; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
88; GFX7-UNALIGNED-NEXT:    flat_store_short v[0:1], v2
89; GFX7-UNALIGNED-NEXT:    s_addc_u32 s3, s1, 0
90; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s2
91; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 2
92; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s3
93; GFX7-UNALIGNED-NEXT:    flat_store_short v[0:1], v2
94; GFX7-UNALIGNED-NEXT:    s_endpgm
95;
96; GFX9-LABEL: global_store_2xi16_align2:
97; GFX9:       ; %bb.0:
98; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
99; GFX9-NEXT:    v_mov_b32_e32 v0, 0
100; GFX9-NEXT:    v_mov_b32_e32 v1, 1
101; GFX9-NEXT:    v_mov_b32_e32 v2, 2
102; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
103; GFX9-NEXT:    global_store_short v0, v1, s[0:1]
104; GFX9-NEXT:    global_store_short v0, v2, s[0:1] offset:2
105; GFX9-NEXT:    s_endpgm
106;
107; GFX10-LABEL: global_store_2xi16_align2:
108; GFX10:       ; %bb.0:
109; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
110; GFX10-NEXT:    v_mov_b32_e32 v0, 0
111; GFX10-NEXT:    v_mov_b32_e32 v1, 1
112; GFX10-NEXT:    v_mov_b32_e32 v2, 2
113; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
114; GFX10-NEXT:    global_store_short v0, v1, s[0:1]
115; GFX10-NEXT:    global_store_short v0, v2, s[0:1] offset:2
116; GFX10-NEXT:    s_endpgm
117  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
118  store i16 1, i16 addrspace(1)* %r, align 2
119  store i16 2, i16 addrspace(1)* %gep.r, align 2
120  ret void
121}
122
123; Should produce align 1 dword when legal
124define i32 @global_load_2xi16_align1(i16 addrspace(1)* %p) #0 {
125; GFX7-ALIGNED-LABEL: global_load_2xi16_align1:
126; GFX7-ALIGNED:       ; %bb.0:
127; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
128; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v2, vcc, 2, v0
129; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
130; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
131; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
132; GFX7-ALIGNED-NEXT:    v_add_i32_e32 v6, vcc, 3, v0
133; GFX7-ALIGNED-NEXT:    v_addc_u32_e32 v7, vcc, 0, v1, vcc
134; GFX7-ALIGNED-NEXT:    flat_load_ubyte v0, v[0:1]
135; GFX7-ALIGNED-NEXT:    flat_load_ubyte v1, v[6:7]
136; GFX7-ALIGNED-NEXT:    flat_load_ubyte v4, v[4:5]
137; GFX7-ALIGNED-NEXT:    flat_load_ubyte v2, v[2:3]
138; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(2)
139; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 8, v1
140; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(1)
141; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v3, 8, v4
142; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
143; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v1, v1, v2
144; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v3, v0
145; GFX7-ALIGNED-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
146; GFX7-ALIGNED-NEXT:    v_or_b32_e32 v0, v0, v1
147; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
148;
149; GFX7-UNALIGNED-LABEL: global_load_2xi16_align1:
150; GFX7-UNALIGNED:       ; %bb.0:
151; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
152; GFX7-UNALIGNED-NEXT:    flat_load_dword v0, v[0:1]
153; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
154; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
155;
156; GFX9-LABEL: global_load_2xi16_align1:
157; GFX9:       ; %bb.0:
158; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
159; GFX9-NEXT:    global_load_dword v0, v[0:1], off
160; GFX9-NEXT:    v_mov_b32_e32 v1, 0xffff
161; GFX9-NEXT:    s_mov_b32 s4, 0xffff
162; GFX9-NEXT:    s_waitcnt vmcnt(0)
163; GFX9-NEXT:    v_bfi_b32 v1, v1, 0, v0
164; GFX9-NEXT:    v_and_or_b32 v0, v0, s4, v1
165; GFX9-NEXT:    s_setpc_b64 s[30:31]
166;
167; GFX10-LABEL: global_load_2xi16_align1:
168; GFX10:       ; %bb.0:
169; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
170; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
171; GFX10-NEXT:    global_load_dword v0, v[0:1], off
172; GFX10-NEXT:    s_waitcnt vmcnt(0)
173; GFX10-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
174; GFX10-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
175; GFX10-NEXT:    s_setpc_b64 s[30:31]
176  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
177  %p.0 = load i16, i16 addrspace(1)* %p, align 1
178  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 1
179  %zext.0 = zext i16 %p.0 to i32
180  %zext.1 = zext i16 %p.1 to i32
181  %shl.1 = shl i32 %zext.1, 16
182  %or = or i32 %zext.0, %shl.1
183  ret i32 %or
184}
185
186; Should produce align 1 dword when legal
187define amdgpu_kernel void @global_store_2xi16_align1(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
188; GFX7-ALIGNED-LABEL: global_store_2xi16_align1:
189; GFX7-ALIGNED:       ; %bb.0:
190; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
191; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 1
192; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v3, 0
193; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
194; GFX7-ALIGNED-NEXT:    s_add_u32 s2, s0, 2
195; GFX7-ALIGNED-NEXT:    s_addc_u32 s3, s1, 0
196; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
197; GFX7-ALIGNED-NEXT:    s_add_u32 s4, s0, 1
198; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
199; GFX7-ALIGNED-NEXT:    s_addc_u32 s5, s1, 0
200; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v2
201; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s4
202; GFX7-ALIGNED-NEXT:    s_add_u32 s0, s0, 3
203; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s5
204; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v3
205; GFX7-ALIGNED-NEXT:    s_addc_u32 s1, s1, 0
206; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
207; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
208; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v3
209; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s2
210; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 2
211; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s3
212; GFX7-ALIGNED-NEXT:    flat_store_byte v[0:1], v2
213; GFX7-ALIGNED-NEXT:    s_endpgm
214;
215; GFX7-UNALIGNED-LABEL: global_store_2xi16_align1:
216; GFX7-UNALIGNED:       ; %bb.0:
217; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
218; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
219; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
220; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
221; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
222; GFX7-UNALIGNED-NEXT:    flat_store_dword v[0:1], v2
223; GFX7-UNALIGNED-NEXT:    s_endpgm
224;
225; GFX9-LABEL: global_store_2xi16_align1:
226; GFX9:       ; %bb.0:
227; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
228; GFX9-NEXT:    v_mov_b32_e32 v0, 0
229; GFX9-NEXT:    v_mov_b32_e32 v1, 0x20001
230; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
231; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
232; GFX9-NEXT:    s_endpgm
233;
234; GFX10-LABEL: global_store_2xi16_align1:
235; GFX10:       ; %bb.0:
236; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
237; GFX10-NEXT:    v_mov_b32_e32 v0, 0
238; GFX10-NEXT:    v_mov_b32_e32 v1, 0x20001
239; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
240; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
241; GFX10-NEXT:    s_endpgm
242  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
243  store i16 1, i16 addrspace(1)* %r, align 1
244  store i16 2, i16 addrspace(1)* %gep.r, align 1
245  ret void
246}
247
248; Should merge this to a dword load
249define i32 @global_load_2xi16_align4(i16 addrspace(1)* %p) #0 {
250; GFX7-LABEL: load_2xi16_align4:
251; GFX7:       ; %bb.0:
252; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
253; GFX7-NEXT:    flat_load_dword v0, v[0:1]
254; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
255; GFX7-NEXT:    s_setpc_b64 s[30:31]
256;
257; GFX7-ALIGNED-LABEL: global_load_2xi16_align4:
258; GFX7-ALIGNED:       ; %bb.0:
259; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
260; GFX7-ALIGNED-NEXT:    flat_load_dword v0, v[0:1]
261; GFX7-ALIGNED-NEXT:    s_waitcnt vmcnt(0)
262; GFX7-ALIGNED-NEXT:    s_setpc_b64 s[30:31]
263;
264; GFX7-UNALIGNED-LABEL: global_load_2xi16_align4:
265; GFX7-UNALIGNED:       ; %bb.0:
266; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
267; GFX7-UNALIGNED-NEXT:    flat_load_dword v0, v[0:1]
268; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
269; GFX7-UNALIGNED-NEXT:    s_setpc_b64 s[30:31]
270;
271; GFX9-LABEL: global_load_2xi16_align4:
272; GFX9:       ; %bb.0:
273; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
274; GFX9-NEXT:    global_load_dword v0, v[0:1], off
275; GFX9-NEXT:    v_mov_b32_e32 v1, 0xffff
276; GFX9-NEXT:    s_mov_b32 s4, 0xffff
277; GFX9-NEXT:    s_waitcnt vmcnt(0)
278; GFX9-NEXT:    v_bfi_b32 v1, v1, 0, v0
279; GFX9-NEXT:    v_and_or_b32 v0, v0, s4, v1
280; GFX9-NEXT:    s_setpc_b64 s[30:31]
281;
282; GFX10-LABEL: global_load_2xi16_align4:
283; GFX10:       ; %bb.0:
284; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
285; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
286; GFX10-NEXT:    global_load_dword v0, v[0:1], off
287; GFX10-NEXT:    s_waitcnt vmcnt(0)
288; GFX10-NEXT:    v_bfi_b32 v1, 0xffff, 0, v0
289; GFX10-NEXT:    v_and_or_b32 v0, 0xffff, v0, v1
290; GFX10-NEXT:    s_setpc_b64 s[30:31]
291  %gep.p = getelementptr i16, i16 addrspace(1)* %p, i64 1
292  %p.0 = load i16, i16 addrspace(1)* %p, align 4
293  %p.1 = load i16, i16 addrspace(1)* %gep.p, align 2
294  %zext.0 = zext i16 %p.0 to i32
295  %zext.1 = zext i16 %p.1 to i32
296  %shl.1 = shl i32 %zext.1, 16
297  %or = or i32 %zext.0, %shl.1
298  ret i32 %or
299}
300
301; Should merge this to a dword store
302define amdgpu_kernel void @global_store_2xi16_align4(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
303; GFX7-LABEL: global_store_2xi16_align4:
304; GFX7:       ; %bb.0:
305; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
306; GFX7-NEXT:    v_mov_b32_e32 v2, 0x20001
307; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
308; GFX7-NEXT:    v_mov_b32_e32 v0, s0
309; GFX7-NEXT:    v_mov_b32_e32 v1, s1
310; GFX7-NEXT:    flat_store_dword v[0:1], v2
311; GFX7-NEXT:    s_endpgm
312;
313; GFX7-ALIGNED-LABEL: global_store_2xi16_align4:
314; GFX7-ALIGNED:       ; %bb.0:
315; GFX7-ALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
316; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
317; GFX7-ALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
318; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v0, s0
319; GFX7-ALIGNED-NEXT:    v_mov_b32_e32 v1, s1
320; GFX7-ALIGNED-NEXT:    flat_store_dword v[0:1], v2
321; GFX7-ALIGNED-NEXT:    s_endpgm
322;
323; GFX7-UNALIGNED-LABEL: global_store_2xi16_align4:
324; GFX7-UNALIGNED:       ; %bb.0:
325; GFX7-UNALIGNED-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x2
326; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v2, 0x20001
327; GFX7-UNALIGNED-NEXT:    s_waitcnt lgkmcnt(0)
328; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v0, s0
329; GFX7-UNALIGNED-NEXT:    v_mov_b32_e32 v1, s1
330; GFX7-UNALIGNED-NEXT:    flat_store_dword v[0:1], v2
331; GFX7-UNALIGNED-NEXT:    s_endpgm
332;
333; GFX9-LABEL: global_store_2xi16_align4:
334; GFX9:       ; %bb.0:
335; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
336; GFX9-NEXT:    v_mov_b32_e32 v0, 0
337; GFX9-NEXT:    v_mov_b32_e32 v1, 0x20001
338; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
339; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
340; GFX9-NEXT:    s_endpgm
341;
342; GFX10-LABEL: global_store_2xi16_align4:
343; GFX10:       ; %bb.0:
344; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x8
345; GFX10-NEXT:    v_mov_b32_e32 v0, 0
346; GFX10-NEXT:    v_mov_b32_e32 v1, 0x20001
347; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
348; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
349; GFX10-NEXT:    s_endpgm
350  %gep.r = getelementptr i16, i16 addrspace(1)* %r, i64 1
351  store i16 1, i16 addrspace(1)* %r, align 4
352  store i16 2, i16 addrspace(1)* %gep.r, align 2
353  ret void
354}
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