1; RUN: llc -march=amdgcn -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 3 4; GCN-LABEL: {{^}}extract_vector_elt_v3f64_2: 5; GCN: buffer_load_dwordx4 6; GCN: buffer_load_dwordx2 7; GCN: buffer_store_dwordx2 8define amdgpu_kernel void @extract_vector_elt_v3f64_2(double addrspace(1)* %out, <3 x double> addrspace(1)* %in) #0 { 9 %ld = load volatile <3 x double>, <3 x double> addrspace(1)* %in 10 %elt = extractelement <3 x double> %ld, i32 2 11 store volatile double %elt, double addrspace(1)* %out 12 ret void 13} 14 15; GCN-LABEL: {{^}}dyn_extract_vector_elt_v3f64: 16; GCN-NOT: buffer_load 17; GCN-DAG: s_cmp_eq_u32 [[IDX:s[0-9]+]], 1 18; GCN-DAG: s_cselect_b64 [[C1:[^,]+]], -1, 0 19; GCN-DAG: s_cmp_eq_u32 [[IDX]], 2 20; GCN-DAG: s_cselect_b64 [[C2:[^,]+]], -1, 0 21; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]] 22; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]] 23; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C2]] 24; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C2]] 25; GCN: store_dwordx2 v[{{[0-9:]+}}] 26define amdgpu_kernel void @dyn_extract_vector_elt_v3f64(double addrspace(1)* %out, <3 x double> %foo, i32 %elt) #0 { 27 %dynelt = extractelement <3 x double> %foo, i32 %elt 28 store volatile double %dynelt, double addrspace(1)* %out 29 ret void 30} 31 32; GCN-LABEL: {{^}}dyn_extract_vector_elt_v4f64: 33; GCN-NOT: buffer_load 34; GCN-DAG: s_cmp_eq_u32 [[IDX:s[0-9]+]], 1 35; GCN-DAG: s_cselect_b64 [[C1:[^,]+]], -1, 0 36; GCN-DAG: s_cmp_eq_u32 [[IDX]], 2 37; GCN-DAG: s_cselect_b64 [[C2:[^,]+]], -1, 0 38; GCN-DAG: s_cmp_eq_u32 [[IDX]], 3 39; GCN-DAG: s_cselect_b64 [[C3:[^,]+]], -1, 0 40; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]] 41; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]] 42; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C2]] 43; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C2]] 44; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C3]] 45; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C3]] 46; GCN: store_dwordx2 v[{{[0-9:]+}}] 47define amdgpu_kernel void @dyn_extract_vector_elt_v4f64(double addrspace(1)* %out, <4 x double> %foo, i32 %elt) #0 { 48 %dynelt = extractelement <4 x double> %foo, i32 %elt 49 store volatile double %dynelt, double addrspace(1)* %out 50 ret void 51} 52 53attributes #0 = { nounwind } 54