1# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=gcn-dpp-combine -o - %s | FileCheck %s
2
3---
4# old is undefined: only combine when masks are fully enabled and
5# bound_ctrl:0 is set, otherwise the result of DPP VALU op can be undefined.
6# CHECK-LABEL: name: old_is_undef
7# CHECK: %2:vgpr_32 = IMPLICIT_DEF
8# VOP2:
9# CHECK: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
10# CHECK: %6:vgpr_32 = V_ADD_U32_e32 %5, %1, implicit $exec
11# CHECK: %8:vgpr_32 = V_ADD_U32_e32 %7, %1, implicit $exec
12# CHECK: %10:vgpr_32 = V_ADD_U32_e32 %9, %1, implicit $exec
13# VOP1:
14# CHECK: %12:vgpr_32 = V_NOT_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
15# CHECK: %14:vgpr_32 = V_NOT_B32_e32 %13, implicit $exec
16# CHECK: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
17# CHECK: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
18name: old_is_undef
19tracksRegLiveness: true
20body: |
21  bb.0:
22    liveins: $vgpr0, $vgpr1
23    %0:vgpr_32 = COPY $vgpr0
24    %1:vgpr_32 = COPY $vgpr1
25    %2:vgpr_32 = IMPLICIT_DEF
26
27    ; VOP2
28    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
29    %4:vgpr_32 = V_ADD_U32_e32 %3, %1, implicit $exec
30
31    %5:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 0, implicit $exec
32    %6:vgpr_32 = V_ADD_U32_e32 %5, %1, implicit $exec
33
34    %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 1, implicit $exec
35    %8:vgpr_32 = V_ADD_U32_e32 %7, %1, implicit $exec
36
37    %9:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
38    %10:vgpr_32 = V_ADD_U32_e32 %9, %1, implicit $exec
39
40    ; VOP1
41    %11:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
42    %12:vgpr_32 = V_NOT_B32_e32 %11, implicit $exec
43
44    %13:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 0, implicit $exec
45    %14:vgpr_32 = V_NOT_B32_e32 %13, implicit $exec
46
47    %15:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 1, implicit $exec
48    %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
49
50    %17:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
51    %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
52...
53
54# old is zero cases:
55
56# CHECK-LABEL: name: old_is_0
57
58# VOP2:
59# case 1: old is zero, masks are fully enabled, bound_ctrl:0 is on:
60# the DPP mov result would be either zero ({src lane disabled}|{src lane is
61# out of range}) or active src lane result - can combine with old = undef.
62# undef is preffered as it makes life easier for the regalloc.
63# CHECK: [[U1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
64# CHECK: %4:vgpr_32 = V_ADD_U32_dpp [[U1]], %0, %1, 1, 15, 15, 1, implicit $exec
65
66# case 2: old is zero, masks are fully enabled, bound_ctrl:0 is off:
67# as the DPP mov old is zero this case is no different from case 1 - combine it
68# setting bound_ctrl0 on for the combined DPP VALU op to make old undefined
69# CHECK: [[U2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
70# CHECK: %6:vgpr_32 = V_ADD_U32_dpp [[U2]], %0, %1, 1, 15, 15, 1, implicit $exec
71
72# case 3: masks are partialy disabled, bound_ctrl:0 is on:
73# the DPP mov result would be either zero ({src lane disabled}|{src lane is
74# out of range} or {the DPP mov's dest VGPR write is disabled by masks}) or
75# active src lane result - can combine with old = src1 of the VALU op.
76# The VALU op should have the same masks as DPP mov as they select lanes
77# with identity value.
78# Special case: the bound_ctrl for the combined DPP VALU op isn't important
79# here but let's make it off to keep the combiner's logic simpler.
80# CHECK: %8:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
81
82# case 4: masks are partialy disabled, bound_ctrl:0 is off:
83# the DPP mov result would be either zero ({src lane disabled}|{src lane is
84# out of range} or {the DPP mov's dest VGPR write is disabled by masks}) or
85# active src lane result - can combine with old = src1 of the VALU op.
86# The VALU op should have the same masks as DPP mov as they select
87# lanes with identity value
88# CHECK: %10:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
89
90# VOP1:
91# see case 1
92# CHECK: [[U3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
93# CHECK: %12:vgpr_32 = V_NOT_B32_dpp [[U3]], %0, 1, 15, 15, 1, implicit $exec
94# see case 2
95# CHECK: [[U4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
96# CHECK: %14:vgpr_32 = V_NOT_B32_dpp [[U4]], %0, 1, 15, 15, 1, implicit $exec
97# case 3 and 4 not appliable as there is no way to specify unchanged result
98# for the unary VALU op
99# CHECK: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
100# CHECK: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
101
102name: old_is_0
103tracksRegLiveness: true
104body: |
105  bb.0:
106    liveins: $vgpr0, $vgpr1
107    %0:vgpr_32 = COPY $vgpr0
108    %1:vgpr_32 = COPY $vgpr1
109    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
110
111    ; VOP2
112    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
113    %4:vgpr_32 = V_ADD_U32_e32 %3, %1, implicit $exec
114
115    %5:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 0, implicit $exec
116    %6:vgpr_32 = V_ADD_U32_e32 %5, %1, implicit $exec
117
118    %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 1, implicit $exec
119    %8:vgpr_32 = V_ADD_U32_e32 %7, %1, implicit $exec
120
121    %9:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
122    %10:vgpr_32 = V_ADD_U32_e32 %9, %1, implicit $exec
123
124    ; VOP1
125    %11:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
126    %12:vgpr_32 = V_NOT_B32_e32 %11, implicit $exec
127
128    %13:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 0, implicit $exec
129    %14:vgpr_32 = V_NOT_B32_e32 %13, implicit $exec
130
131    %15:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 1, implicit $exec
132    %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
133
134    %17:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
135    %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
136...
137
138# old is nonzero identity cases:
139
140# old is nonzero identity, masks are fully enabled, bound_ctrl:0 is off:
141# the DPP mov result would be either identity ({src lane disabled}|{out of
142# range}) or src lane result - can combine with old = src1 of the VALU op
143# The DPP VALU op should have the same masks (and bctrl) as DPP mov as they
144# select lanes with identity value
145
146# CHECK-LABEL: name: nonzero_old_is_identity_masks_enabled_bctl_off
147# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
148# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
149# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
150# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
151
152name: nonzero_old_is_identity_masks_enabled_bctl_off
153tracksRegLiveness: true
154body: |
155  bb.0:
156    liveins: $vgpr0, $vgpr1
157    %0:vgpr_32 = COPY $vgpr0
158    %1:vgpr_32 = COPY $vgpr1
159
160    %2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
161    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 0, implicit $exec
162    %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
163
164    %5:vgpr_32 = V_MOV_B32_e32 4294967295, implicit $exec
165    %6:vgpr_32 = V_MOV_B32_dpp %5, %0, 1, 15, 15, 0, implicit $exec
166    %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
167
168    %8:vgpr_32 = V_MOV_B32_e32 -2147483648, implicit $exec
169    %9:vgpr_32 = V_MOV_B32_dpp %8, %0, 1, 15, 15, 0, implicit $exec
170    %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
171
172    %11:vgpr_32 = V_MOV_B32_e32 2147483647, implicit $exec
173    %12:vgpr_32 = V_MOV_B32_dpp %11, %0, 1, 15, 15, 0, implicit $exec
174    %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
175...
176
177# old is nonzero identity, masks are partially enabled, bound_ctrl:0 is off:
178# the DPP mov result would be either identity ({src lane disabled}|{src lane is
179# out of range} or {the DPP mov's dest VGPR write is disabled by masks}) or
180# active src lane result - can combine with old = src1 of the VALU op.
181# The DPP VALU op should have the same masks (and bctrl) as DPP mov as they
182# select lanes with identity value
183
184# CHECK-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl_off
185# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
186# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
187# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
188# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
189
190name: nonzero_old_is_identity_masks_partially_disabled_bctl_off
191tracksRegLiveness: true
192body: |
193  bb.0:
194    liveins: $vgpr0, $vgpr1
195    %0:vgpr_32 = COPY $vgpr0
196    %1:vgpr_32 = COPY $vgpr1
197
198    %2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
199    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
200    %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
201
202    %5:vgpr_32 = V_MOV_B32_e32 4294967295, implicit $exec
203    %6:vgpr_32 = V_MOV_B32_dpp %5, %0, 1, 15, 14, 0, implicit $exec
204    %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
205
206    %8:vgpr_32 = V_MOV_B32_e32 -2147483648, implicit $exec
207    %9:vgpr_32 = V_MOV_B32_dpp %8, %0, 1, 14, 15, 0, implicit $exec
208    %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
209
210    %11:vgpr_32 = V_MOV_B32_e32 2147483647, implicit $exec
211    %12:vgpr_32 = V_MOV_B32_dpp %11, %0, 1, 15, 14, 0, implicit $exec
212    %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
213...
214
215# old is nonzero identity, masks are partially enabled, bound_ctrl:0 is on:
216# the DPP mov result may have 3 different values:
217#   1. the active src lane result
218#   2. 0 if the src lane is disabled|out of range
219#   3. DPP mov's old value if the mov's dest VGPR write is disabled by masks
220# can't combine
221
222# CHECK-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl0
223# CHECK: %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
224# CHECK: %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
225# CHECK: %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
226# CHECK: %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
227
228name: nonzero_old_is_identity_masks_partially_disabled_bctl0
229tracksRegLiveness: true
230body: |
231  bb.0:
232    liveins: $vgpr0, $vgpr1
233    %0:vgpr_32 = COPY $vgpr0
234    %1:vgpr_32 = COPY $vgpr1
235
236    %2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
237    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 1, implicit $exec
238    %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
239
240    %5:vgpr_32 = V_MOV_B32_e32 4294967295, implicit $exec
241    %6:vgpr_32 = V_MOV_B32_dpp %5, %0, 1, 15, 14, 1, implicit $exec
242    %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
243
244    %8:vgpr_32 = V_MOV_B32_e32 -2147483648, implicit $exec
245    %9:vgpr_32 = V_MOV_B32_dpp %8, %0, 1, 14, 15, 1, implicit $exec
246    %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
247
248    %11:vgpr_32 = V_MOV_B32_e32 2147483647, implicit $exec
249    %12:vgpr_32 = V_MOV_B32_dpp %11, %0, 1, 15, 14, 1, implicit $exec
250    %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
251...
252
253# when the DPP source isn't a src0 operand the operation should be commuted if possible
254# CHECK-LABEL: name: dpp_commute
255# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
256# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
257# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
258# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
259# CHECK: %16:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
260# CHECK: %19:vgpr_32 = V_ADD_I32_e32 5, %18, implicit-def $vcc, implicit $exec
261name: dpp_commute
262tracksRegLiveness: true
263body:             |
264  bb.0:
265    liveins: $vgpr0, $vgpr1
266
267    %0:vgpr_32 = COPY $vgpr0
268    %1:vgpr_32 = COPY $vgpr1
269
270    %2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
271    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
272    %4:vgpr_32 = V_MUL_U32_U24_e32 %1, %3, implicit $exec
273
274    %5:vgpr_32 = V_MOV_B32_e32 4294967295, implicit $exec
275    %6:vgpr_32 = V_MOV_B32_dpp %5, %0, 1, 15, 14, 0, implicit $exec
276    %7:vgpr_32 = V_AND_B32_e32 %1, %6, implicit $exec
277
278    %8:vgpr_32 = V_MOV_B32_e32 -2147483648, implicit $exec
279    %9:vgpr_32 = V_MOV_B32_dpp %8, %0, 1, 14, 15, 0, implicit $exec
280    %10:vgpr_32 = V_MAX_I32_e32 %1, %9, implicit $exec
281
282    %11:vgpr_32 = V_MOV_B32_e32 2147483647, implicit $exec
283    %12:vgpr_32 = V_MOV_B32_dpp %11, %0, 1, 15, 14, 0, implicit $exec
284    %13:vgpr_32 = V_MIN_I32_e32 %1, %12, implicit $exec
285
286    %14:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
287    %15:vgpr_32 = V_MOV_B32_dpp %14, %0, 1, 14, 15, 0, implicit $exec
288    %16:vgpr_32 = V_SUB_I32_e32 %1, %15, implicit-def $vcc, implicit $exec
289
290    ; this cannot be combined because immediate as src0 isn't commutable
291    %17:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
292    %18:vgpr_32 = V_MOV_B32_dpp %17, %0, 1, 14, 15, 0, implicit $exec
293    %19:vgpr_32 = V_ADD_I32_e32 5, %18, implicit-def $vcc, implicit $exec
294...
295
296# check for floating point modifiers
297# CHECK-LABEL: name: add_f32_e64
298# CHECK: %3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
299# CHECK: %4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
300# CHECK: %6:vgpr_32 = V_ADD_F32_dpp %2, 0, %1, 0, %0, 1, 15, 15, 1, implicit $exec
301# CHECK: %8:vgpr_32 = V_ADD_F32_dpp %2, 1, %1, 2, %0, 1, 15, 15, 1, implicit $exec
302# CHECK: %10:vgpr_32 = V_ADD_F32_e64 4, %9, 8, %0, 0, 0, implicit $exec
303
304name: add_f32_e64
305tracksRegLiveness: true
306body:             |
307  bb.0:
308    liveins: $vgpr0, $vgpr1
309
310    %0:vgpr_32 = COPY $vgpr0
311    %1:vgpr_32 = COPY $vgpr1
312    %2:vgpr_32 = IMPLICIT_DEF
313
314    ; this shouldn't be combined as omod is set
315    %3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
316    %4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
317
318    ; this should be combined as all modifiers are default
319    %5:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
320    %6:vgpr_32 = V_ADD_F32_e64 0, %5, 0, %0, 0, 0, implicit $exec
321
322    ; this should be combined as modifiers other than abs|neg are default
323    %7:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
324    %8:vgpr_32 = V_ADD_F32_e64 1, %7, 2, %0, 0, 0, implicit $exec
325
326    ; this shouldn't be combined as modifiers aren't abs|neg
327    %9:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
328    %10:vgpr_32 = V_ADD_F32_e64 4, %9, 8, %0, 0, 0, implicit $exec
329...
330
331# check for e64 modifiers
332# CHECK-LABEL: name: add_u32_e64
333# CHECK: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
334# CHECK: %6:vgpr_32 = V_ADD_U32_e64 %5, %1, 1, implicit $exec
335
336name: add_u32_e64
337tracksRegLiveness: true
338body:             |
339  bb.0:
340    liveins: $vgpr0, $vgpr1
341
342    %0:vgpr_32 = COPY $vgpr0
343    %1:vgpr_32 = COPY $vgpr1
344    %2:vgpr_32 = IMPLICIT_DEF
345
346    ; this should be combined as all modifiers are default
347    %3:vgpr_32 = V_MOV_B32_dpp undef %2, %0, 1, 15, 15, 1, implicit $exec
348    %4:vgpr_32 = V_ADD_U32_e64 %3, %1, 0, implicit $exec
349
350    ; this shouldn't be combined as clamp is set
351    %5:vgpr_32 = V_MOV_B32_dpp undef %2, %0, 1, 15, 15, 1, implicit $exec
352    %6:vgpr_32 = V_ADD_U32_e64 %5, %1, 1, implicit $exec
353...
354
355# tests on sequences of dpp consumers
356# CHECK-LABEL: name: dpp_seq
357# CHECK: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
358# CHECK: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
359# CHECK: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
360# broken sequence:
361# CHECK: %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
362
363name: dpp_seq
364tracksRegLiveness: true
365body: |
366  bb.0:
367    liveins: $vgpr0, $vgpr1
368    %0:vgpr_32 = COPY $vgpr0
369    %1:vgpr_32 = COPY $vgpr1
370    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
371
372    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
373    %4:vgpr_32 = V_ADD_I32_e32 %3, %1, implicit-def $vcc, implicit $exec
374    %5:vgpr_32 = V_SUB_I32_e32 %1, %3, implicit-def $vcc, implicit $exec
375    %6:vgpr_32 = V_OR_B32_e32 %3, %1, implicit $exec
376
377    %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
378    %8:vgpr_32 = V_ADD_I32_e32 %7, %1, implicit-def $vcc, implicit $exec
379    ; this breaks the sequence
380    %9:vgpr_32 = V_SUB_I32_e32 5, %7, implicit-def $vcc, implicit $exec
381...
382
383# tests on sequences of dpp consumers followed by control flow
384# CHECK-LABEL: name: dpp_seq_cf
385# CHECK: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
386# CHECK: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
387# CHECK: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
388
389name: dpp_seq_cf
390tracksRegLiveness: true
391body: |
392  bb.0:
393    successors: %bb.1, %bb.2
394    liveins: $vgpr0, $vgpr1
395    %0:vgpr_32 = COPY $vgpr0
396    %1:vgpr_32 = COPY $vgpr1
397    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
398
399    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
400    %4:vgpr_32 = V_ADD_I32_e32 %3, %1, implicit-def $vcc, implicit $exec
401    %5:vgpr_32 = V_SUB_I32_e32 %1, %3, implicit-def $vcc, implicit $exec
402    %6:vgpr_32 = V_OR_B32_e32 %3, %1, implicit $exec
403
404    %7:sreg_64 = V_CMP_EQ_U32_e64 %5, %6, implicit $exec
405    %8:sreg_64 = SI_IF %7, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
406    S_BRANCH %bb.1
407
408  bb.1:
409    successors: %bb.2
410
411  bb.2:
412    SI_END_CF %8, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
413...
414
415# old reg def is in diff BB - cannot combine
416# CHECK-LABEL: name: old_in_diff_bb
417# CHECK: %3:vgpr_32 = V_MOV_B32_dpp %2, %1, 1, 1, 1, 0, implicit $exec
418
419name: old_in_diff_bb
420tracksRegLiveness: true
421body: |
422  bb.0:
423    successors: %bb.1
424    liveins: $vgpr0, $vgpr1
425
426    %0:vgpr_32 = COPY $vgpr0
427    %1:vgpr_32 = COPY $vgpr1
428    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
429    S_BRANCH %bb.1
430
431  bb.1:
432    %3:vgpr_32 = V_MOV_B32_dpp %2, %1, 1, 1, 1, 0, implicit $exec
433    %4:vgpr_32 = V_ADD_U32_e32 %3, %0, implicit $exec
434...
435
436# old reg def is in diff BB but bound_ctrl:0 - can combine
437# CHECK-LABEL: name: old_in_diff_bb_bctrl_zero
438# CHECK: %4:vgpr_32 = V_ADD_U32_dpp {{%[0-9]}}, %0, %1, 1, 15, 15, 1, implicit $exec
439
440name: old_in_diff_bb_bctrl_zero
441tracksRegLiveness: true
442body: |
443  bb.0:
444    successors: %bb.1
445    liveins: $vgpr0, $vgpr1
446
447    %0:vgpr_32 = COPY $vgpr0
448    %1:vgpr_32 = COPY $vgpr1
449    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
450    S_BRANCH %bb.1
451
452  bb.1:
453    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
454    %4:vgpr_32 = V_ADD_U32_e32 %3, %1, implicit $exec
455...
456
457# EXEC mask changed between def and use - cannot combine
458# CHECK-LABEL: name: exec_changed
459# CHECK: %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
460
461name: exec_changed
462tracksRegLiveness: true
463body: |
464  bb.0:
465    liveins: $vgpr0, $vgpr1
466
467    %0:vgpr_32 = COPY $vgpr0
468    %1:vgpr_32 = COPY $vgpr1
469    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
470    %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
471    %4:vgpr_32 = V_ADD_U32_e32 %3, %1, implicit $exec
472    %5:sreg_64 = COPY $exec, implicit-def $exec
473    %6:vgpr_32 = V_ADD_U32_e32 %3, %1, implicit $exec
474...
475
476# test if $old definition is correctly tracked through subreg manipulation pseudos
477
478# CHECK-LABEL: name: mul_old_subreg
479# CHECK: %7:vgpr_32 = V_MUL_I32_I24_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
480
481name:            mul_old_subreg
482tracksRegLiveness: true
483body: |
484  bb.0:
485    liveins: $vgpr0, $vgpr1
486
487    %0:vreg_64 = COPY $vgpr0
488    %1:vgpr_32 = COPY $vgpr1
489    %2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
490    %3:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
491    %4:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
492    %5:vreg_64 = INSERT_SUBREG %4, %1, %subreg.sub1 ; %5.sub0 is taken from %4
493    %6:vgpr_32 = V_MOV_B32_dpp %5.sub0, %1, 1, 1, 1, 0, implicit $exec
494    %7:vgpr_32 = V_MUL_I32_I24_e32 %6, %0.sub1, implicit $exec
495...
496
497# CHECK-LABEL: name: add_old_subreg
498# CHECK: %5:vgpr_32 = V_ADD_U32_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
499
500name:            add_old_subreg
501tracksRegLiveness: true
502body: |
503  bb.0:
504    liveins: $vgpr0, $vgpr1
505
506    %0:vreg_64 = COPY $vgpr0
507    %1:vgpr_32 = COPY $vgpr1
508    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
509    %3:vreg_64 = INSERT_SUBREG %0, %2, %subreg.sub1 ; %3.sub1 is inserted
510    %4:vgpr_32 = V_MOV_B32_dpp %3.sub1, %1, 1, 1, 1, 0, implicit $exec
511    %5:vgpr_32 = V_ADD_U32_e32 %4, %0.sub1, implicit $exec
512...
513
514# CHECK-LABEL: name: add_old_subreg_undef
515# CHECK: %5:vgpr_32 = V_ADD_U32_dpp %3.sub1, %1, %0.sub1, 1, 15, 15, 1, implicit $exec
516
517name:            add_old_subreg_undef
518tracksRegLiveness: true
519body: |
520  bb.0:
521    liveins: $vgpr0, $vgpr1
522
523    %0:vreg_64 = COPY $vgpr0
524    %1:vgpr_32 = COPY $vgpr1
525    %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
526    %3:vreg_64 = REG_SEQUENCE %2, %subreg.sub0 ; %3.sub1 is undef
527    %4:vgpr_32 = V_MOV_B32_dpp %3.sub1, %1, 1, 15, 15, 1, implicit $exec
528    %5:vgpr_32 = V_ADD_U32_e32 %4, %0.sub1, implicit $exec
529