1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=FUNC %s 3; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 4 5declare i7 @llvm.ctlz.i7(i7, i1) nounwind readnone 6declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone 7declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone 8 9declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone 10declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone 11declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone 12 13declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone 14declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone 15declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1) nounwind readnone 16 17declare i32 @llvm.r600.read.tidig.x() nounwind readnone 18 19; FUNC-LABEL: {{^}}s_ctlz_i32: 20; GCN: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 21; GCN-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]] 22; GCN-DAG: v_cmp_ne_u32_e64 vcc, [[VAL]], 0{{$}} 23; GCN-DAG: v_mov_b32_e32 [[VCTLZ:v[0-9]+]], [[CTLZ]] 24; GCN: v_cndmask_b32_e32 [[RESULT:v[0-9]+]], 32, [[VCTLZ]], vcc 25; GCN: buffer_store_dword [[RESULT]] 26; GCN: s_endpgm 27 28; EG: FFBH_UINT 29; EG: CNDE_INT 30define void @s_ctlz_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind { 31 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 32 store i32 %ctlz, i32 addrspace(1)* %out, align 4 33 ret void 34} 35 36; FUNC-LABEL: {{^}}v_ctlz_i32: 37; GCN: buffer_load_dword [[VAL:v[0-9]+]], 38; GCN-DAG: v_ffbh_u32_e32 [[CTLZ:v[0-9]+]], [[VAL]] 39; GCN-DAG: v_cmp_ne_u32_e32 vcc, 0, [[CTLZ]] 40; GCN: v_cndmask_b32_e32 [[RESULT:v[0-9]+]], 32, [[CTLZ]], vcc 41; GCN: buffer_store_dword [[RESULT]], 42; GCN: s_endpgm 43 44; EG: FFBH_UINT 45; EG: CNDE_INT 46define void @v_ctlz_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 47 %val = load i32, i32 addrspace(1)* %valptr, align 4 48 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 49 store i32 %ctlz, i32 addrspace(1)* %out, align 4 50 ret void 51} 52 53; FUNC-LABEL: {{^}}v_ctlz_v2i32: 54; GCN: buffer_load_dwordx2 55; GCN: v_ffbh_u32_e32 56; GCN: v_ffbh_u32_e32 57; GCN: buffer_store_dwordx2 58; GCN: s_endpgm 59 60; EG: FFBH_UINT 61; EG: CNDE_INT 62; EG: FFBH_UINT 63; EG: CNDE_INT 64define void @v_ctlz_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) nounwind { 65 %val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr, align 8 66 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %val, i1 false) nounwind readnone 67 store <2 x i32> %ctlz, <2 x i32> addrspace(1)* %out, align 8 68 ret void 69} 70 71; FUNC-LABEL: {{^}}v_ctlz_v4i32: 72; GCN: buffer_load_dwordx4 73; GCN: v_ffbh_u32_e32 74; GCN: v_ffbh_u32_e32 75; GCN: v_ffbh_u32_e32 76; GCN: v_ffbh_u32_e32 77; GCN: buffer_store_dwordx4 78; GCN: s_endpgm 79 80 81; EG-DAG: FFBH_UINT 82; EG-DAG: CNDE_INT 83 84; EG-DAG: FFBH_UINT 85; EG-DAG: CNDE_INT 86 87; EG-DAG: FFBH_UINT 88; EG-DAG: CNDE_INT 89 90; EG-DAG: FFBH_UINT 91; EG-DAG: CNDE_INT 92define void @v_ctlz_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %valptr) nounwind { 93 %val = load <4 x i32>, <4 x i32> addrspace(1)* %valptr, align 16 94 %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %val, i1 false) nounwind readnone 95 store <4 x i32> %ctlz, <4 x i32> addrspace(1)* %out, align 16 96 ret void 97} 98 99; FUNC-LABEL: {{^}}v_ctlz_i8: 100; GCN: buffer_load_ubyte [[VAL:v[0-9]+]], 101; GCN-DAG: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]] 102; GCN: buffer_store_byte [[RESULT]], 103; GCN: s_endpgm 104define void @v_ctlz_i8(i8 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %valptr) nounwind { 105 %val = load i8, i8 addrspace(1)* %valptr 106 %ctlz = call i8 @llvm.ctlz.i8(i8 %val, i1 false) nounwind readnone 107 store i8 %ctlz, i8 addrspace(1)* %out 108 ret void 109} 110 111; FUNC-LABEL: {{^}}s_ctlz_i64: 112; GCN: s_load_dwordx2 s{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 113; GCN-DAG: v_cmp_eq_u32_e64 vcc, s[[HI]], 0{{$}} 114; GCN-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]] 115; GCN-DAG: s_add_i32 [[ADD:s[0-9]+]], [[FFBH_LO]], 32 116; GCN-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]] 117; GCN-DAG: v_mov_b32_e32 [[VFFBH_LO:v[0-9]+]], [[ADD]] 118; GCN-DAG: v_mov_b32_e32 [[VFFBH_HI:v[0-9]+]], [[FFBH_HI]] 119; GCN-DAG: v_cndmask_b32_e32 v[[CTLZ:[0-9]+]], [[VFFBH_HI]], [[VFFBH_LO]] 120; GCN-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}} 121; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v{{\[}}[[CTLZ]]:[[CTLZ_HI]]{{\]}} 122define void @s_ctlz_i64(i64 addrspace(1)* noalias %out, i64 %val) nounwind { 123 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false) 124 store i64 %ctlz, i64 addrspace(1)* %out 125 ret void 126} 127 128; FUNC-LABEL: {{^}}s_ctlz_i64_trunc: 129define void @s_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 %val) nounwind { 130 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false) 131 %trunc = trunc i64 %ctlz to i32 132 store i32 %trunc, i32 addrspace(1)* %out 133 ret void 134} 135 136; FUNC-LABEL: {{^}}v_ctlz_i64: 137; GCN-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}} 138; GCN-DAG: {{buffer|flat}}_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}} 139; GCN-DAG: v_cmp_eq_u32_e64 [[CMPHI:s\[[0-9]+:[0-9]+\]]], 0, v[[HI]] 140; GCN-DAG: v_ffbh_u32_e32 [[FFBH_LO:v[0-9]+]], v[[LO]] 141; GCN-DAG: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, 32, [[FFBH_LO]] 142; GCN-DAG: v_ffbh_u32_e32 [[FFBH_HI:v[0-9]+]], v[[HI]] 143; GCN-DAG: v_cndmask_b32_e64 v[[CTLZ:[0-9]+]], [[FFBH_HI]], [[ADD]], [[CMPHI]] 144; GCN-DAG: v_or_b32_e32 [[OR:v[0-9]+]], v[[HI]], v[[LO]] 145; GCN-DAG: v_cmp_ne_u32_e32 vcc, 0, [[OR]] 146; GCN-DAG: v_cndmask_b32_e32 v[[CLTZ_LO:[0-9]+]], 64, v[[CTLZ:[0-9]+]], vcc 147; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v{{\[}}[[CLTZ_LO]]:[[CTLZ_HI]]{{\]}} 148define void @v_ctlz_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { 149 %tid = call i32 @llvm.r600.read.tidig.x() 150 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid 151 %out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid 152 %val = load i64, i64 addrspace(1)* %in.gep 153 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false) 154 store i64 %ctlz, i64 addrspace(1)* %out.gep 155 ret void 156} 157 158; FUNC-LABEL: {{^}}v_ctlz_i64_trunc: 159define void @v_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { 160 %tid = call i32 @llvm.r600.read.tidig.x() 161 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid 162 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid 163 %val = load i64, i64 addrspace(1)* %in.gep 164 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false) 165 %trunc = trunc i64 %ctlz to i32 166 store i32 %trunc, i32 addrspace(1)* %out.gep 167 ret void 168} 169 170; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_neg1: 171; GCN: buffer_load_dword [[VAL:v[0-9]+]], 172; GCN: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]] 173; GCN: buffer_store_dword [[RESULT]], 174; GCN: s_endpgm 175 define void @v_ctlz_i32_sel_eq_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 176 %val = load i32, i32 addrspace(1)* %valptr 177 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 178 %cmp = icmp eq i32 %val, 0 179 %sel = select i1 %cmp, i32 -1, i32 %ctlz 180 store i32 %sel, i32 addrspace(1)* %out 181 ret void 182} 183 184; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_neg1: 185; GCN: buffer_load_dword [[VAL:v[0-9]+]], 186; GCN: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]] 187; GCN: buffer_store_dword [[RESULT]], 188; GCN: s_endpgm 189define void @v_ctlz_i32_sel_ne_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 190 %val = load i32, i32 addrspace(1)* %valptr 191 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 192 %cmp = icmp ne i32 %val, 0 193 %sel = select i1 %cmp, i32 %ctlz, i32 -1 194 store i32 %sel, i32 addrspace(1)* %out 195 ret void 196} 197 198; TODO: Should be able to eliminate select here as well. 199; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_bitwidth: 200; GCN: buffer_load_dword 201; GCN: v_ffbh_u32_e32 202; GCN: v_cmp 203; GCN: v_cndmask 204; GCN: s_endpgm 205define void @v_ctlz_i32_sel_eq_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 206 %val = load i32, i32 addrspace(1)* %valptr 207 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 208 %cmp = icmp eq i32 %ctlz, 32 209 %sel = select i1 %cmp, i32 -1, i32 %ctlz 210 store i32 %sel, i32 addrspace(1)* %out 211 ret void 212} 213 214; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_bitwidth: 215; GCN: buffer_load_dword 216; GCN: v_ffbh_u32_e32 217; GCN: v_cmp 218; GCN: v_cndmask 219; GCN: s_endpgm 220define void @v_ctlz_i32_sel_ne_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 221 %val = load i32, i32 addrspace(1)* %valptr 222 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone 223 %cmp = icmp ne i32 %ctlz, 32 224 %sel = select i1 %cmp, i32 %ctlz, i32 -1 225 store i32 %sel, i32 addrspace(1)* %out 226 ret void 227} 228 229; FUNC-LABEL: {{^}}v_ctlz_i8_sel_eq_neg1: 230; GCN: {{buffer|flat}}_load_ubyte [[VAL:v[0-9]+]], 231; GCN: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]] 232; GCN: {{buffer|flat}}_store_byte [[FFBH]], 233 define void @v_ctlz_i8_sel_eq_neg1(i8 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %valptr) nounwind { 234 %tid = call i32 @llvm.r600.read.tidig.x() 235 %valptr.gep = getelementptr i8, i8 addrspace(1)* %valptr, i32 %tid 236 %val = load i8, i8 addrspace(1)* %valptr.gep 237 %ctlz = call i8 @llvm.ctlz.i8(i8 %val, i1 false) nounwind readnone 238 %cmp = icmp eq i8 %val, 0 239 %sel = select i1 %cmp, i8 -1, i8 %ctlz 240 store i8 %sel, i8 addrspace(1)* %out 241 ret void 242} 243 244; FUNC-LABEL: {{^}}v_ctlz_i16_sel_eq_neg1: 245; SI: buffer_load_ushort [[VAL:v[0-9]+]], 246; SI: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]] 247; SI: buffer_store_short [[FFBH]], 248 define void @v_ctlz_i16_sel_eq_neg1(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) nounwind { 249 %val = load i16, i16 addrspace(1)* %valptr 250 %ctlz = call i16 @llvm.ctlz.i16(i16 %val, i1 false) nounwind readnone 251 %cmp = icmp eq i16 %val, 0 252 %sel = select i1 %cmp, i16 -1, i16 %ctlz 253 store i16 %sel, i16 addrspace(1)* %out 254 ret void 255} 256 257; FIXME: Need to handle non-uniform case for function below (load without gep). 258; FUNC-LABEL: {{^}}v_ctlz_i7_sel_eq_neg1: 259; GCN: {{buffer|flat}}_load_ubyte [[VAL:v[0-9]+]], 260; GCN: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]] 261; GCN: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0x7f, [[FFBH]] 262; GCN: {{buffer|flat}}_store_byte [[TRUNC]], 263define void @v_ctlz_i7_sel_eq_neg1(i7 addrspace(1)* noalias %out, i7 addrspace(1)* noalias %valptr) nounwind { 264 %tid = call i32 @llvm.r600.read.tidig.x() 265 %valptr.gep = getelementptr i7, i7 addrspace(1)* %valptr, i32 %tid 266 %val = load i7, i7 addrspace(1)* %valptr.gep 267 %ctlz = call i7 @llvm.ctlz.i7(i7 %val, i1 false) nounwind readnone 268 %cmp = icmp eq i7 %val, 0 269 %sel = select i1 %cmp, i7 -1, i7 %ctlz 270 store i7 %sel, i7 addrspace(1)* %out 271 ret void 272} 273