1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
3#
4# The failure occurs when the coalescer tries to removePartialRedundency() on the
5# "%2:vreg_64 = COPY %3" in bb.1. The coalescer tries to prune and extend each
6# subrange of %2, the subrange for %2.sub1 has a def location (in bb.2) in the
7# predecessor path 2->3->1. But for another predecessor path 0->4->1,
8# the subrange has only one undef location in bb.0. If we don't compute Undef set,
9# it will fail to find the reaching def for %2.sub1 in predecessor bb.4 and bb.0
10# and crash with error message:
11# "Use of $noreg does not have a corresponding definition on every path
12#  LLVM ERROR: Use not jointly dominated by defs"
13
14---
15name:            _amdgpu_ps_main
16alignment:       1
17tracksRegLiveness: true
18body:             |
19  ; CHECK-LABEL: name: _amdgpu_ps_main
20  ; CHECK: bb.0:
21  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
22  ; CHECK-NEXT:   liveins: $sgpr2, $sgpr3, $vgpr3
23  ; CHECK-NEXT: {{  $}}
24  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr2
25  ; CHECK-NEXT:   undef %1.sub0:vreg_64 = COPY [[COPY]]
26  ; CHECK-NEXT:   undef %2.sub0:vreg_64 = COPY [[COPY]]
27  ; CHECK-NEXT:   S_CBRANCH_VCCNZ %bb.2, implicit undef $vcc
28  ; CHECK-NEXT:   S_BRANCH %bb.4
29  ; CHECK-NEXT: {{  $}}
30  ; CHECK-NEXT: bb.1:
31  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
32  ; CHECK-NEXT: {{  $}}
33  ; CHECK-NEXT:   S_NOP 0, implicit %2.sub0
34  ; CHECK-NEXT: {{  $}}
35  ; CHECK-NEXT: bb.2:
36  ; CHECK-NEXT:   successors: %bb.3(0x04000000), %bb.2(0x7c000000)
37  ; CHECK-NEXT: {{  $}}
38  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vreg_64 = COPY %2
39  ; CHECK-NEXT:   %1.sub0:vreg_64 = COPY [[COPY1]].sub0
40  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vreg_64 = COPY %1
41  ; CHECK-NEXT:   S_CBRANCH_EXECNZ %bb.2, implicit undef $exec
42  ; CHECK-NEXT:   S_BRANCH %bb.3
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT: bb.3:
45  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
46  ; CHECK-NEXT: {{  $}}
47  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:vreg_64 = COPY [[COPY1]]
48  ; CHECK-NEXT:   S_BRANCH %bb.1
49  ; CHECK-NEXT: {{  $}}
50  ; CHECK-NEXT: bb.4:
51  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
52  ; CHECK-NEXT: {{  $}}
53  ; CHECK-NEXT:   S_BRANCH %bb.1
54  bb.0:
55    liveins: $sgpr2, $sgpr3, $vgpr3
56
57    %0:sgpr_32 = COPY $sgpr2
58    undef %1.sub0:vreg_64 = COPY %0
59    undef %2.sub0:vreg_64 = COPY %0
60    S_CBRANCH_VCCNZ %bb.2, implicit undef $vcc
61    S_BRANCH %bb.4
62
63  bb.1:
64    %2:vreg_64 = COPY %3
65    S_NOP 0, implicit %2.sub0
66
67  bb.2:
68    successors: %bb.3(0x04000000), %bb.2(0x7c000000)
69
70    %3:vreg_64 = COPY %2
71    %1.sub0:vreg_64 = COPY %3.sub0
72    %2:vreg_64 = COPY %1
73    S_CBRANCH_EXECNZ %bb.2, implicit undef $exec
74    S_BRANCH %bb.3
75
76  bb.3:
77    S_BRANCH %bb.1
78
79  bb.4:
80    %3:vreg_64 = COPY %2
81    S_BRANCH %bb.1
82
83...
84