1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX6 %s
3; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
4; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
5; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11 %s
6
7define amdgpu_kernel void @v_clamp_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
8; GFX6-LABEL: v_clamp_f32:
9; GFX6:       ; %bb.0:
10; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
11; GFX6-NEXT:    s_mov_b32 s7, 0xf000
12; GFX6-NEXT:    s_mov_b32 s6, 0
13; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
14; GFX6-NEXT:    v_mov_b32_e32 v1, 0
15; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
16; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
17; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
18; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
19; GFX6-NEXT:    s_waitcnt vmcnt(0)
20; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
21; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
22; GFX6-NEXT:    s_endpgm
23;
24; GFX8-LABEL: v_clamp_f32:
25; GFX8:       ; %bb.0:
26; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
27; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
28; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
29; GFX8-NEXT:    v_mov_b32_e32 v1, s3
30; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
31; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
32; GFX8-NEXT:    flat_load_dword v3, v[0:1]
33; GFX8-NEXT:    v_mov_b32_e32 v1, s1
34; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
35; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
36; GFX8-NEXT:    s_waitcnt vmcnt(0)
37; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
38; GFX8-NEXT:    flat_store_dword v[0:1], v2
39; GFX8-NEXT:    s_endpgm
40;
41; GFX9-LABEL: v_clamp_f32:
42; GFX9:       ; %bb.0:
43; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
44; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
45; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
46; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
47; GFX9-NEXT:    s_waitcnt vmcnt(0)
48; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
49; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
50; GFX9-NEXT:    s_endpgm
51;
52; GFX11-LABEL: v_clamp_f32:
53; GFX11:       ; %bb.0:
54; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
55; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
56; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
57; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
58; GFX11-NEXT:    s_waitcnt vmcnt(0)
59; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
60; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
61; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
62; GFX11-NEXT:    s_endpgm
63  %tid = call i32 @llvm.amdgcn.workitem.id.x()
64  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
65  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
66  %a = load float, float addrspace(1)* %gep0
67  %max = call float @llvm.maxnum.f32(float %a, float 0.0)
68  %med = call float @llvm.minnum.f32(float %max, float 1.0)
69
70  store float %med, float addrspace(1)* %out.gep
71  ret void
72}
73
74define amdgpu_kernel void @v_clamp_neg_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
75; GFX6-LABEL: v_clamp_neg_f32:
76; GFX6:       ; %bb.0:
77; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
78; GFX6-NEXT:    s_mov_b32 s7, 0xf000
79; GFX6-NEXT:    s_mov_b32 s6, 0
80; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
81; GFX6-NEXT:    v_mov_b32_e32 v1, 0
82; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
83; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
84; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
85; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
86; GFX6-NEXT:    s_waitcnt vmcnt(0)
87; GFX6-NEXT:    v_max_f32_e64 v2, -v2, -v2 clamp
88; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
89; GFX6-NEXT:    s_endpgm
90;
91; GFX8-LABEL: v_clamp_neg_f32:
92; GFX8:       ; %bb.0:
93; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
94; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
95; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
96; GFX8-NEXT:    v_mov_b32_e32 v1, s3
97; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
98; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
99; GFX8-NEXT:    flat_load_dword v3, v[0:1]
100; GFX8-NEXT:    v_mov_b32_e32 v1, s1
101; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
102; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
103; GFX8-NEXT:    s_waitcnt vmcnt(0)
104; GFX8-NEXT:    v_max_f32_e64 v2, -v3, -v3 clamp
105; GFX8-NEXT:    flat_store_dword v[0:1], v2
106; GFX8-NEXT:    s_endpgm
107;
108; GFX9-LABEL: v_clamp_neg_f32:
109; GFX9:       ; %bb.0:
110; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
111; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
112; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
113; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
114; GFX9-NEXT:    s_waitcnt vmcnt(0)
115; GFX9-NEXT:    v_max_f32_e64 v1, -v1, -v1 clamp
116; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
117; GFX9-NEXT:    s_endpgm
118;
119; GFX11-LABEL: v_clamp_neg_f32:
120; GFX11:       ; %bb.0:
121; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
122; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
123; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
124; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
125; GFX11-NEXT:    s_waitcnt vmcnt(0)
126; GFX11-NEXT:    v_max_f32_e64 v1, -v1, -v1 clamp
127; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
128; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
129; GFX11-NEXT:    s_endpgm
130  %tid = call i32 @llvm.amdgcn.workitem.id.x()
131  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
132  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
133  %a = load float, float addrspace(1)* %gep0
134  %fneg.a = fneg float %a
135  %max = call float @llvm.maxnum.f32(float %fneg.a, float 0.0)
136  %med = call float @llvm.minnum.f32(float %max, float 1.0)
137
138  store float %med, float addrspace(1)* %out.gep
139  ret void
140}
141
142define amdgpu_kernel void @v_clamp_negabs_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
143; GFX6-LABEL: v_clamp_negabs_f32:
144; GFX6:       ; %bb.0:
145; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
146; GFX6-NEXT:    s_mov_b32 s7, 0xf000
147; GFX6-NEXT:    s_mov_b32 s6, 0
148; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
149; GFX6-NEXT:    v_mov_b32_e32 v1, 0
150; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
151; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
152; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
153; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
154; GFX6-NEXT:    s_waitcnt vmcnt(0)
155; GFX6-NEXT:    v_max_f32_e64 v2, -|v2|, -|v2| clamp
156; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
157; GFX6-NEXT:    s_endpgm
158;
159; GFX8-LABEL: v_clamp_negabs_f32:
160; GFX8:       ; %bb.0:
161; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
162; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
163; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
164; GFX8-NEXT:    v_mov_b32_e32 v1, s3
165; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
166; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
167; GFX8-NEXT:    flat_load_dword v3, v[0:1]
168; GFX8-NEXT:    v_mov_b32_e32 v1, s1
169; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
170; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
171; GFX8-NEXT:    s_waitcnt vmcnt(0)
172; GFX8-NEXT:    v_max_f32_e64 v2, -|v3|, -|v3| clamp
173; GFX8-NEXT:    flat_store_dword v[0:1], v2
174; GFX8-NEXT:    s_endpgm
175;
176; GFX9-LABEL: v_clamp_negabs_f32:
177; GFX9:       ; %bb.0:
178; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
179; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
180; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
181; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
182; GFX9-NEXT:    s_waitcnt vmcnt(0)
183; GFX9-NEXT:    v_max_f32_e64 v1, -|v1|, -|v1| clamp
184; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
185; GFX9-NEXT:    s_endpgm
186;
187; GFX11-LABEL: v_clamp_negabs_f32:
188; GFX11:       ; %bb.0:
189; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
190; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
191; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
192; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
193; GFX11-NEXT:    s_waitcnt vmcnt(0)
194; GFX11-NEXT:    v_max_f32_e64 v1, -|v1|, -|v1| clamp
195; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
196; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
197; GFX11-NEXT:    s_endpgm
198  %tid = call i32 @llvm.amdgcn.workitem.id.x()
199  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
200  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
201  %a = load float, float addrspace(1)* %gep0
202  %fabs.a = call float @llvm.fabs.f32(float %a)
203  %fneg.fabs.a = fneg float %fabs.a
204
205  %max = call float @llvm.maxnum.f32(float %fneg.fabs.a, float 0.0)
206  %med = call float @llvm.minnum.f32(float %max, float 1.0)
207
208  store float %med, float addrspace(1)* %out.gep
209  ret void
210}
211
212define amdgpu_kernel void @v_clamp_negzero_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
213; GFX6-LABEL: v_clamp_negzero_f32:
214; GFX6:       ; %bb.0:
215; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
216; GFX6-NEXT:    s_mov_b32 s7, 0xf000
217; GFX6-NEXT:    s_mov_b32 s6, 0
218; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
219; GFX6-NEXT:    v_mov_b32_e32 v1, 0
220; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
221; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
222; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
223; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
224; GFX6-NEXT:    s_waitcnt vmcnt(0)
225; GFX6-NEXT:    v_add_f32_e32 v2, 0.5, v2
226; GFX6-NEXT:    v_max_f32_e32 v2, 0x80000000, v2
227; GFX6-NEXT:    v_min_f32_e32 v2, 1.0, v2
228; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
229; GFX6-NEXT:    s_endpgm
230;
231; GFX8-LABEL: v_clamp_negzero_f32:
232; GFX8:       ; %bb.0:
233; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
234; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
235; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
236; GFX8-NEXT:    v_mov_b32_e32 v1, s3
237; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
238; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
239; GFX8-NEXT:    flat_load_dword v3, v[0:1]
240; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
241; GFX8-NEXT:    v_mov_b32_e32 v1, s1
242; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
243; GFX8-NEXT:    s_waitcnt vmcnt(0)
244; GFX8-NEXT:    v_add_f32_e32 v2, 0.5, v3
245; GFX8-NEXT:    v_max_f32_e32 v2, 0x80000000, v2
246; GFX8-NEXT:    v_min_f32_e32 v2, 1.0, v2
247; GFX8-NEXT:    flat_store_dword v[0:1], v2
248; GFX8-NEXT:    s_endpgm
249;
250; GFX9-LABEL: v_clamp_negzero_f32:
251; GFX9:       ; %bb.0:
252; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
253; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
254; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
255; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
256; GFX9-NEXT:    s_waitcnt vmcnt(0)
257; GFX9-NEXT:    v_add_f32_e32 v1, 0.5, v1
258; GFX9-NEXT:    v_max_f32_e32 v1, 0x80000000, v1
259; GFX9-NEXT:    v_min_f32_e32 v1, 1.0, v1
260; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
261; GFX9-NEXT:    s_endpgm
262;
263; GFX11-LABEL: v_clamp_negzero_f32:
264; GFX11:       ; %bb.0:
265; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
266; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
267; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
268; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
269; GFX11-NEXT:    s_waitcnt vmcnt(0)
270; GFX11-NEXT:    v_add_f32_e32 v1, 0.5, v1
271; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
272; GFX11-NEXT:    v_max_f32_e32 v1, 0x80000000, v1
273; GFX11-NEXT:    v_min_f32_e32 v1, 1.0, v1
274; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
275; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
276; GFX11-NEXT:    s_endpgm
277  %tid = call i32 @llvm.amdgcn.workitem.id.x()
278  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
279  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
280  %a = load float, float addrspace(1)* %gep0
281  %add = fadd nnan float %a, 0.5
282  %max = call float @llvm.maxnum.f32(float %add, float -0.0)
283  %med = call float @llvm.minnum.f32(float %max, float 1.0)
284
285  store float %med, float addrspace(1)* %out.gep
286  ret void
287}
288
289; FIXME: Weird inconsistency in how -0.0 is treated. Accepted if clamp
290; matched through med3, not if directly. Is this correct?
291define amdgpu_kernel void @v_clamp_negzero_maybe_snan_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
292; GFX6-LABEL: v_clamp_negzero_maybe_snan_f32:
293; GFX6:       ; %bb.0:
294; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
295; GFX6-NEXT:    s_mov_b32 s7, 0xf000
296; GFX6-NEXT:    s_mov_b32 s6, 0
297; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
298; GFX6-NEXT:    v_mov_b32_e32 v1, 0
299; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
300; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
301; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
302; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
303; GFX6-NEXT:    s_waitcnt vmcnt(0)
304; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
305; GFX6-NEXT:    v_max_f32_e32 v2, 0x80000000, v2
306; GFX6-NEXT:    v_min_f32_e32 v2, 1.0, v2
307; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
308; GFX6-NEXT:    s_endpgm
309;
310; GFX8-LABEL: v_clamp_negzero_maybe_snan_f32:
311; GFX8:       ; %bb.0:
312; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
313; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
314; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
315; GFX8-NEXT:    v_mov_b32_e32 v1, s3
316; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
317; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
318; GFX8-NEXT:    flat_load_dword v3, v[0:1]
319; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
320; GFX8-NEXT:    v_mov_b32_e32 v1, s1
321; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
322; GFX8-NEXT:    s_waitcnt vmcnt(0)
323; GFX8-NEXT:    v_mul_f32_e32 v2, 1.0, v3
324; GFX8-NEXT:    v_max_f32_e32 v2, 0x80000000, v2
325; GFX8-NEXT:    v_min_f32_e32 v2, 1.0, v2
326; GFX8-NEXT:    flat_store_dword v[0:1], v2
327; GFX8-NEXT:    s_endpgm
328;
329; GFX9-LABEL: v_clamp_negzero_maybe_snan_f32:
330; GFX9:       ; %bb.0:
331; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
332; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
333; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
334; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
335; GFX9-NEXT:    s_waitcnt vmcnt(0)
336; GFX9-NEXT:    v_max_f32_e32 v1, v1, v1
337; GFX9-NEXT:    v_max_f32_e32 v1, 0x80000000, v1
338; GFX9-NEXT:    v_min_f32_e32 v1, 1.0, v1
339; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
340; GFX9-NEXT:    s_endpgm
341;
342; GFX11-LABEL: v_clamp_negzero_maybe_snan_f32:
343; GFX11:       ; %bb.0:
344; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
345; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
346; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
347; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
348; GFX11-NEXT:    s_waitcnt vmcnt(0)
349; GFX11-NEXT:    v_max_f32_e32 v1, v1, v1
350; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
351; GFX11-NEXT:    v_max_f32_e32 v1, 0x80000000, v1
352; GFX11-NEXT:    v_min_f32_e32 v1, 1.0, v1
353; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
354; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
355; GFX11-NEXT:    s_endpgm
356  %tid = call i32 @llvm.amdgcn.workitem.id.x()
357  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
358  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
359  %a = load float, float addrspace(1)* %gep0
360  %max = call float @llvm.maxnum.f32(float %a, float -0.0)
361  %med = call float @llvm.minnum.f32(float %max, float 1.0)
362
363  store float %med, float addrspace(1)* %out.gep
364  ret void
365}
366
367define amdgpu_kernel void @v_clamp_multi_use_max_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
368; GFX6-LABEL: v_clamp_multi_use_max_f32:
369; GFX6:       ; %bb.0:
370; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
371; GFX6-NEXT:    s_mov_b32 s6, 0
372; GFX6-NEXT:    s_mov_b32 s7, 0xf000
373; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
374; GFX6-NEXT:    v_mov_b32_e32 v1, 0
375; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
376; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
377; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
378; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
379; GFX6-NEXT:    s_mov_b32 s6, -1
380; GFX6-NEXT:    s_waitcnt vmcnt(0)
381; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
382; GFX6-NEXT:    v_max_f32_e32 v2, 0, v2
383; GFX6-NEXT:    v_min_f32_e32 v3, 1.0, v2
384; GFX6-NEXT:    buffer_store_dword v3, v[0:1], s[0:3], 0 addr64
385; GFX6-NEXT:    buffer_store_dword v2, off, s[4:7], 0
386; GFX6-NEXT:    s_waitcnt vmcnt(0)
387; GFX6-NEXT:    s_endpgm
388;
389; GFX8-LABEL: v_clamp_multi_use_max_f32:
390; GFX8:       ; %bb.0:
391; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
392; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
393; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
394; GFX8-NEXT:    v_mov_b32_e32 v1, s3
395; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
396; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
397; GFX8-NEXT:    flat_load_dword v3, v[0:1]
398; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
399; GFX8-NEXT:    v_mov_b32_e32 v1, s1
400; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
401; GFX8-NEXT:    s_waitcnt vmcnt(0)
402; GFX8-NEXT:    v_mul_f32_e32 v2, 1.0, v3
403; GFX8-NEXT:    v_max_f32_e32 v2, 0, v2
404; GFX8-NEXT:    v_min_f32_e32 v3, 1.0, v2
405; GFX8-NEXT:    flat_store_dword v[0:1], v3
406; GFX8-NEXT:    flat_store_dword v[0:1], v2
407; GFX8-NEXT:    s_waitcnt vmcnt(0)
408; GFX8-NEXT:    s_endpgm
409;
410; GFX9-LABEL: v_clamp_multi_use_max_f32:
411; GFX9:       ; %bb.0:
412; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
413; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
414; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
415; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
416; GFX9-NEXT:    s_waitcnt vmcnt(0)
417; GFX9-NEXT:    v_max_f32_e32 v1, v1, v1
418; GFX9-NEXT:    v_max_f32_e32 v1, 0, v1
419; GFX9-NEXT:    v_min_f32_e32 v2, 1.0, v1
420; GFX9-NEXT:    global_store_dword v0, v2, s[0:1]
421; GFX9-NEXT:    global_store_dword v[0:1], v1, off
422; GFX9-NEXT:    s_waitcnt vmcnt(0)
423; GFX9-NEXT:    s_endpgm
424;
425; GFX11-LABEL: v_clamp_multi_use_max_f32:
426; GFX11:       ; %bb.0:
427; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
428; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
429; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
430; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
431; GFX11-NEXT:    s_waitcnt vmcnt(0)
432; GFX11-NEXT:    v_max_f32_e32 v1, v1, v1
433; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
434; GFX11-NEXT:    v_max_f32_e32 v1, 0, v1
435; GFX11-NEXT:    v_min_f32_e32 v2, 1.0, v1
436; GFX11-NEXT:    global_store_b32 v0, v2, s[0:1]
437; GFX11-NEXT:    global_store_b32 v[0:1], v1, off dlc
438; GFX11-NEXT:    s_waitcnt_vscnt null, 0x0
439; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
440; GFX11-NEXT:    s_endpgm
441  %tid = call i32 @llvm.amdgcn.workitem.id.x()
442  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
443  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
444  %a = load float, float addrspace(1)* %gep0
445  %max = call float @llvm.maxnum.f32(float %a, float 0.0)
446  %med = call float @llvm.minnum.f32(float %max, float 1.0)
447
448  store float %med, float addrspace(1)* %out.gep
449  store volatile float %max, float addrspace(1)* undef
450  ret void
451}
452
453define amdgpu_kernel void @v_clamp_f16(half addrspace(1)* %out, half addrspace(1)* %aptr) #0 {
454; GFX6-LABEL: v_clamp_f16:
455; GFX6:       ; %bb.0:
456; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
457; GFX6-NEXT:    s_mov_b32 s7, 0xf000
458; GFX6-NEXT:    s_mov_b32 s6, 0
459; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
460; GFX6-NEXT:    v_mov_b32_e32 v1, 0
461; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
462; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
463; GFX6-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64
464; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
465; GFX6-NEXT:    s_waitcnt vmcnt(0)
466; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
467; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
468; GFX6-NEXT:    buffer_store_short v2, v[0:1], s[0:3], 0 addr64
469; GFX6-NEXT:    s_endpgm
470;
471; GFX8-LABEL: v_clamp_f16:
472; GFX8:       ; %bb.0:
473; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
474; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 1, v0
475; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
476; GFX8-NEXT:    v_mov_b32_e32 v1, s3
477; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
478; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
479; GFX8-NEXT:    flat_load_ushort v3, v[0:1]
480; GFX8-NEXT:    v_mov_b32_e32 v1, s1
481; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
482; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
483; GFX8-NEXT:    s_waitcnt vmcnt(0)
484; GFX8-NEXT:    v_max_f16_e64 v2, v3, v3 clamp
485; GFX8-NEXT:    flat_store_short v[0:1], v2
486; GFX8-NEXT:    s_endpgm
487;
488; GFX9-LABEL: v_clamp_f16:
489; GFX9:       ; %bb.0:
490; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
491; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
492; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
493; GFX9-NEXT:    global_load_ushort v1, v0, s[2:3]
494; GFX9-NEXT:    s_waitcnt vmcnt(0)
495; GFX9-NEXT:    v_max_f16_e64 v1, v1, v1 clamp
496; GFX9-NEXT:    global_store_short v0, v1, s[0:1]
497; GFX9-NEXT:    s_endpgm
498;
499; GFX11-LABEL: v_clamp_f16:
500; GFX11:       ; %bb.0:
501; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
502; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
503; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
504; GFX11-NEXT:    global_load_u16 v1, v0, s[2:3]
505; GFX11-NEXT:    s_waitcnt vmcnt(0)
506; GFX11-NEXT:    v_max_f16_e64 v1, v1, v1 clamp
507; GFX11-NEXT:    global_store_b16 v0, v1, s[0:1]
508; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
509; GFX11-NEXT:    s_endpgm
510  %tid = call i32 @llvm.amdgcn.workitem.id.x()
511  %gep0 = getelementptr half, half addrspace(1)* %aptr, i32 %tid
512  %out.gep = getelementptr half, half addrspace(1)* %out, i32 %tid
513  %a = load half, half addrspace(1)* %gep0
514  %max = call half @llvm.maxnum.f16(half %a, half 0.0)
515  %med = call half @llvm.minnum.f16(half %max, half 1.0)
516
517  store half %med, half addrspace(1)* %out.gep
518  ret void
519}
520
521define amdgpu_kernel void @v_clamp_neg_f16(half addrspace(1)* %out, half addrspace(1)* %aptr) #0 {
522; GFX6-LABEL: v_clamp_neg_f16:
523; GFX6:       ; %bb.0:
524; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
525; GFX6-NEXT:    s_mov_b32 s7, 0xf000
526; GFX6-NEXT:    s_mov_b32 s6, 0
527; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
528; GFX6-NEXT:    v_mov_b32_e32 v1, 0
529; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
530; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
531; GFX6-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64
532; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
533; GFX6-NEXT:    s_waitcnt vmcnt(0)
534; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, -v2 clamp
535; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
536; GFX6-NEXT:    buffer_store_short v2, v[0:1], s[0:3], 0 addr64
537; GFX6-NEXT:    s_endpgm
538;
539; GFX8-LABEL: v_clamp_neg_f16:
540; GFX8:       ; %bb.0:
541; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
542; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 1, v0
543; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
544; GFX8-NEXT:    v_mov_b32_e32 v1, s3
545; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
546; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
547; GFX8-NEXT:    flat_load_ushort v3, v[0:1]
548; GFX8-NEXT:    v_mov_b32_e32 v1, s1
549; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
550; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
551; GFX8-NEXT:    s_waitcnt vmcnt(0)
552; GFX8-NEXT:    v_max_f16_e64 v2, -v3, -v3 clamp
553; GFX8-NEXT:    flat_store_short v[0:1], v2
554; GFX8-NEXT:    s_endpgm
555;
556; GFX9-LABEL: v_clamp_neg_f16:
557; GFX9:       ; %bb.0:
558; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
559; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
560; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
561; GFX9-NEXT:    global_load_ushort v1, v0, s[2:3]
562; GFX9-NEXT:    s_waitcnt vmcnt(0)
563; GFX9-NEXT:    v_max_f16_e64 v1, -v1, -v1 clamp
564; GFX9-NEXT:    global_store_short v0, v1, s[0:1]
565; GFX9-NEXT:    s_endpgm
566;
567; GFX11-LABEL: v_clamp_neg_f16:
568; GFX11:       ; %bb.0:
569; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
570; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
571; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
572; GFX11-NEXT:    global_load_u16 v1, v0, s[2:3]
573; GFX11-NEXT:    s_waitcnt vmcnt(0)
574; GFX11-NEXT:    v_max_f16_e64 v1, -v1, -v1 clamp
575; GFX11-NEXT:    global_store_b16 v0, v1, s[0:1]
576; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
577; GFX11-NEXT:    s_endpgm
578  %tid = call i32 @llvm.amdgcn.workitem.id.x()
579  %gep0 = getelementptr half, half addrspace(1)* %aptr, i32 %tid
580  %out.gep = getelementptr half, half addrspace(1)* %out, i32 %tid
581  %a = load half, half addrspace(1)* %gep0
582  %fneg.a = fsub half -0.0, %a
583  %max = call half @llvm.maxnum.f16(half %fneg.a, half 0.0)
584  %med = call half @llvm.minnum.f16(half %max, half 1.0)
585
586  store half %med, half addrspace(1)* %out.gep
587  ret void
588}
589
590define amdgpu_kernel void @v_clamp_negabs_f16(half addrspace(1)* %out, half addrspace(1)* %aptr) #0 {
591; GFX6-LABEL: v_clamp_negabs_f16:
592; GFX6:       ; %bb.0:
593; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
594; GFX6-NEXT:    s_mov_b32 s7, 0xf000
595; GFX6-NEXT:    s_mov_b32 s6, 0
596; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
597; GFX6-NEXT:    v_mov_b32_e32 v1, 0
598; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
599; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
600; GFX6-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64
601; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
602; GFX6-NEXT:    s_waitcnt vmcnt(0)
603; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, -|v2| clamp
604; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
605; GFX6-NEXT:    buffer_store_short v2, v[0:1], s[0:3], 0 addr64
606; GFX6-NEXT:    s_endpgm
607;
608; GFX8-LABEL: v_clamp_negabs_f16:
609; GFX8:       ; %bb.0:
610; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
611; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 1, v0
612; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
613; GFX8-NEXT:    v_mov_b32_e32 v1, s3
614; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
615; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
616; GFX8-NEXT:    flat_load_ushort v3, v[0:1]
617; GFX8-NEXT:    v_mov_b32_e32 v1, s1
618; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
619; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
620; GFX8-NEXT:    s_waitcnt vmcnt(0)
621; GFX8-NEXT:    v_max_f16_e64 v2, -|v3|, -|v3| clamp
622; GFX8-NEXT:    flat_store_short v[0:1], v2
623; GFX8-NEXT:    s_endpgm
624;
625; GFX9-LABEL: v_clamp_negabs_f16:
626; GFX9:       ; %bb.0:
627; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
628; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
629; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
630; GFX9-NEXT:    global_load_ushort v1, v0, s[2:3]
631; GFX9-NEXT:    s_waitcnt vmcnt(0)
632; GFX9-NEXT:    v_max_f16_e64 v1, -|v1|, -|v1| clamp
633; GFX9-NEXT:    global_store_short v0, v1, s[0:1]
634; GFX9-NEXT:    s_endpgm
635;
636; GFX11-LABEL: v_clamp_negabs_f16:
637; GFX11:       ; %bb.0:
638; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
639; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 1, v0
640; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
641; GFX11-NEXT:    global_load_u16 v1, v0, s[2:3]
642; GFX11-NEXT:    s_waitcnt vmcnt(0)
643; GFX11-NEXT:    v_max_f16_e64 v1, -|v1|, -|v1| clamp
644; GFX11-NEXT:    global_store_b16 v0, v1, s[0:1]
645; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
646; GFX11-NEXT:    s_endpgm
647  %tid = call i32 @llvm.amdgcn.workitem.id.x()
648  %gep0 = getelementptr half, half addrspace(1)* %aptr, i32 %tid
649  %out.gep = getelementptr half, half addrspace(1)* %out, i32 %tid
650  %a = load half, half addrspace(1)* %gep0
651  %fabs.a = call half @llvm.fabs.f16(half %a)
652  %fneg.fabs.a = fsub half -0.0, %fabs.a
653
654  %max = call half @llvm.maxnum.f16(half %fneg.fabs.a, half 0.0)
655  %med = call half @llvm.minnum.f16(half %max, half 1.0)
656
657  store half %med, half addrspace(1)* %out.gep
658  ret void
659}
660
661define amdgpu_kernel void @v_clamp_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 {
662; GFX6-LABEL: v_clamp_f64:
663; GFX6:       ; %bb.0:
664; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
665; GFX6-NEXT:    s_mov_b32 s7, 0xf000
666; GFX6-NEXT:    s_mov_b32 s6, 0
667; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
668; GFX6-NEXT:    v_mov_b32_e32 v1, 0
669; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
670; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
671; GFX6-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
672; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
673; GFX6-NEXT:    s_waitcnt vmcnt(0)
674; GFX6-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3] clamp
675; GFX6-NEXT:    buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
676; GFX6-NEXT:    s_endpgm
677;
678; GFX8-LABEL: v_clamp_f64:
679; GFX8:       ; %bb.0:
680; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
681; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
682; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
683; GFX8-NEXT:    v_mov_b32_e32 v1, s3
684; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
685; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
686; GFX8-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
687; GFX8-NEXT:    v_mov_b32_e32 v3, s1
688; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
689; GFX8-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
690; GFX8-NEXT:    s_waitcnt vmcnt(0)
691; GFX8-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1] clamp
692; GFX8-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
693; GFX8-NEXT:    s_endpgm
694;
695; GFX9-LABEL: v_clamp_f64:
696; GFX9:       ; %bb.0:
697; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
698; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
699; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
700; GFX9-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
701; GFX9-NEXT:    s_waitcnt vmcnt(0)
702; GFX9-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1] clamp
703; GFX9-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
704; GFX9-NEXT:    s_endpgm
705;
706; GFX11-LABEL: v_clamp_f64:
707; GFX11:       ; %bb.0:
708; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
709; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
710; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
711; GFX11-NEXT:    global_load_b64 v[0:1], v2, s[2:3]
712; GFX11-NEXT:    s_waitcnt vmcnt(0)
713; GFX11-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1] clamp
714; GFX11-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
715; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
716; GFX11-NEXT:    s_endpgm
717  %tid = call i32 @llvm.amdgcn.workitem.id.x()
718  %gep0 = getelementptr double, double addrspace(1)* %aptr, i32 %tid
719  %out.gep = getelementptr double, double addrspace(1)* %out, i32 %tid
720  %a = load double, double addrspace(1)* %gep0
721  %max = call double @llvm.maxnum.f64(double %a, double 0.0)
722  %med = call double @llvm.minnum.f64(double %max, double 1.0)
723
724  store double %med, double addrspace(1)* %out.gep
725  ret void
726}
727
728define amdgpu_kernel void @v_clamp_neg_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 {
729; GFX6-LABEL: v_clamp_neg_f64:
730; GFX6:       ; %bb.0:
731; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
732; GFX6-NEXT:    s_mov_b32 s7, 0xf000
733; GFX6-NEXT:    s_mov_b32 s6, 0
734; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
735; GFX6-NEXT:    v_mov_b32_e32 v1, 0
736; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
737; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
738; GFX6-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
739; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
740; GFX6-NEXT:    s_waitcnt vmcnt(0)
741; GFX6-NEXT:    v_max_f64 v[2:3], -v[2:3], -v[2:3] clamp
742; GFX6-NEXT:    buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
743; GFX6-NEXT:    s_endpgm
744;
745; GFX8-LABEL: v_clamp_neg_f64:
746; GFX8:       ; %bb.0:
747; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
748; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
749; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
750; GFX8-NEXT:    v_mov_b32_e32 v1, s3
751; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
752; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
753; GFX8-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
754; GFX8-NEXT:    v_mov_b32_e32 v3, s1
755; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
756; GFX8-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
757; GFX8-NEXT:    s_waitcnt vmcnt(0)
758; GFX8-NEXT:    v_max_f64 v[0:1], -v[0:1], -v[0:1] clamp
759; GFX8-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
760; GFX8-NEXT:    s_endpgm
761;
762; GFX9-LABEL: v_clamp_neg_f64:
763; GFX9:       ; %bb.0:
764; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
765; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
766; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
767; GFX9-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
768; GFX9-NEXT:    s_waitcnt vmcnt(0)
769; GFX9-NEXT:    v_max_f64 v[0:1], -v[0:1], -v[0:1] clamp
770; GFX9-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
771; GFX9-NEXT:    s_endpgm
772;
773; GFX11-LABEL: v_clamp_neg_f64:
774; GFX11:       ; %bb.0:
775; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
776; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
777; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
778; GFX11-NEXT:    global_load_b64 v[0:1], v2, s[2:3]
779; GFX11-NEXT:    s_waitcnt vmcnt(0)
780; GFX11-NEXT:    v_max_f64 v[0:1], -v[0:1], -v[0:1] clamp
781; GFX11-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
782; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
783; GFX11-NEXT:    s_endpgm
784  %tid = call i32 @llvm.amdgcn.workitem.id.x()
785  %gep0 = getelementptr double, double addrspace(1)* %aptr, i32 %tid
786  %out.gep = getelementptr double, double addrspace(1)* %out, i32 %tid
787  %a = load double, double addrspace(1)* %gep0
788  %fneg.a = fsub double -0.0, %a
789  %max = call double @llvm.maxnum.f64(double %fneg.a, double 0.0)
790  %med = call double @llvm.minnum.f64(double %max, double 1.0)
791
792  store double %med, double addrspace(1)* %out.gep
793  ret void
794}
795
796define amdgpu_kernel void @v_clamp_negabs_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 {
797; GFX6-LABEL: v_clamp_negabs_f64:
798; GFX6:       ; %bb.0:
799; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
800; GFX6-NEXT:    s_mov_b32 s7, 0xf000
801; GFX6-NEXT:    s_mov_b32 s6, 0
802; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
803; GFX6-NEXT:    v_mov_b32_e32 v1, 0
804; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
805; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
806; GFX6-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
807; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
808; GFX6-NEXT:    s_waitcnt vmcnt(0)
809; GFX6-NEXT:    v_max_f64 v[2:3], -|v[2:3]|, -|v[2:3]| clamp
810; GFX6-NEXT:    buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
811; GFX6-NEXT:    s_endpgm
812;
813; GFX8-LABEL: v_clamp_negabs_f64:
814; GFX8:       ; %bb.0:
815; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
816; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
817; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
818; GFX8-NEXT:    v_mov_b32_e32 v1, s3
819; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
820; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
821; GFX8-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
822; GFX8-NEXT:    v_mov_b32_e32 v3, s1
823; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
824; GFX8-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
825; GFX8-NEXT:    s_waitcnt vmcnt(0)
826; GFX8-NEXT:    v_max_f64 v[0:1], -|v[0:1]|, -|v[0:1]| clamp
827; GFX8-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
828; GFX8-NEXT:    s_endpgm
829;
830; GFX9-LABEL: v_clamp_negabs_f64:
831; GFX9:       ; %bb.0:
832; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
833; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
834; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
835; GFX9-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
836; GFX9-NEXT:    s_waitcnt vmcnt(0)
837; GFX9-NEXT:    v_max_f64 v[0:1], -|v[0:1]|, -|v[0:1]| clamp
838; GFX9-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
839; GFX9-NEXT:    s_endpgm
840;
841; GFX11-LABEL: v_clamp_negabs_f64:
842; GFX11:       ; %bb.0:
843; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
844; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
845; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
846; GFX11-NEXT:    global_load_b64 v[0:1], v2, s[2:3]
847; GFX11-NEXT:    s_waitcnt vmcnt(0)
848; GFX11-NEXT:    v_max_f64 v[0:1], -|v[0:1]|, -|v[0:1]| clamp
849; GFX11-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
850; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
851; GFX11-NEXT:    s_endpgm
852  %tid = call i32 @llvm.amdgcn.workitem.id.x()
853  %gep0 = getelementptr double, double addrspace(1)* %aptr, i32 %tid
854  %out.gep = getelementptr double, double addrspace(1)* %out, i32 %tid
855  %a = load double, double addrspace(1)* %gep0
856  %fabs.a = call double @llvm.fabs.f64(double %a)
857  %fneg.fabs.a = fsub double -0.0, %fabs.a
858
859  %max = call double @llvm.maxnum.f64(double %fneg.fabs.a, double 0.0)
860  %med = call double @llvm.minnum.f64(double %max, double 1.0)
861
862  store double %med, double addrspace(1)* %out.gep
863  ret void
864}
865
866define amdgpu_kernel void @v_clamp_med3_aby_negzero_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
867; GFX6-LABEL: v_clamp_med3_aby_negzero_f32:
868; GFX6:       ; %bb.0:
869; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
870; GFX6-NEXT:    s_mov_b32 s7, 0xf000
871; GFX6-NEXT:    s_mov_b32 s6, 0
872; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
873; GFX6-NEXT:    v_mov_b32_e32 v1, 0
874; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
875; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
876; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
877; GFX6-NEXT:    s_brev_b32 s4, 1
878; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
879; GFX6-NEXT:    s_waitcnt vmcnt(0)
880; GFX6-NEXT:    v_med3_f32 v2, s4, 1.0, v2
881; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
882; GFX6-NEXT:    s_endpgm
883;
884; GFX8-LABEL: v_clamp_med3_aby_negzero_f32:
885; GFX8:       ; %bb.0:
886; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
887; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
888; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
889; GFX8-NEXT:    v_mov_b32_e32 v1, s3
890; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
891; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
892; GFX8-NEXT:    flat_load_dword v3, v[0:1]
893; GFX8-NEXT:    v_mov_b32_e32 v1, s1
894; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
895; GFX8-NEXT:    s_brev_b32 s0, 1
896; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
897; GFX8-NEXT:    s_waitcnt vmcnt(0)
898; GFX8-NEXT:    v_med3_f32 v2, s0, 1.0, v3
899; GFX8-NEXT:    flat_store_dword v[0:1], v2
900; GFX8-NEXT:    s_endpgm
901;
902; GFX9-LABEL: v_clamp_med3_aby_negzero_f32:
903; GFX9:       ; %bb.0:
904; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
905; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
906; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
907; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
908; GFX9-NEXT:    s_brev_b32 s2, 1
909; GFX9-NEXT:    s_waitcnt vmcnt(0)
910; GFX9-NEXT:    v_med3_f32 v1, s2, 1.0, v1
911; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
912; GFX9-NEXT:    s_endpgm
913;
914; GFX11-LABEL: v_clamp_med3_aby_negzero_f32:
915; GFX11:       ; %bb.0:
916; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
917; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
918; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
919; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
920; GFX11-NEXT:    s_waitcnt vmcnt(0)
921; GFX11-NEXT:    v_med3_f32 v1, 0x80000000, 1.0, v1
922; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
923; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
924; GFX11-NEXT:    s_endpgm
925  %tid = call i32 @llvm.amdgcn.workitem.id.x()
926  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
927  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
928  %a = load float, float addrspace(1)* %gep0
929  %med = call float @llvm.amdgcn.fmed3.f32(float -0.0, float 1.0, float %a)
930  store float %med, float addrspace(1)* %out.gep
931  ret void
932}
933
934define amdgpu_kernel void @v_clamp_med3_aby_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
935; GFX6-LABEL: v_clamp_med3_aby_f32:
936; GFX6:       ; %bb.0:
937; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
938; GFX6-NEXT:    s_mov_b32 s7, 0xf000
939; GFX6-NEXT:    s_mov_b32 s6, 0
940; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
941; GFX6-NEXT:    v_mov_b32_e32 v1, 0
942; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
943; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
944; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
945; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
946; GFX6-NEXT:    s_waitcnt vmcnt(0)
947; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
948; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
949; GFX6-NEXT:    s_endpgm
950;
951; GFX8-LABEL: v_clamp_med3_aby_f32:
952; GFX8:       ; %bb.0:
953; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
954; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
955; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
956; GFX8-NEXT:    v_mov_b32_e32 v1, s3
957; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
958; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
959; GFX8-NEXT:    flat_load_dword v3, v[0:1]
960; GFX8-NEXT:    v_mov_b32_e32 v1, s1
961; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
962; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
963; GFX8-NEXT:    s_waitcnt vmcnt(0)
964; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
965; GFX8-NEXT:    flat_store_dword v[0:1], v2
966; GFX8-NEXT:    s_endpgm
967;
968; GFX9-LABEL: v_clamp_med3_aby_f32:
969; GFX9:       ; %bb.0:
970; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
971; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
972; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
973; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
974; GFX9-NEXT:    s_waitcnt vmcnt(0)
975; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
976; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
977; GFX9-NEXT:    s_endpgm
978;
979; GFX11-LABEL: v_clamp_med3_aby_f32:
980; GFX11:       ; %bb.0:
981; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
982; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
983; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
984; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
985; GFX11-NEXT:    s_waitcnt vmcnt(0)
986; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
987; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
988; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
989; GFX11-NEXT:    s_endpgm
990  %tid = call i32 @llvm.amdgcn.workitem.id.x()
991  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
992  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
993  %a = load float, float addrspace(1)* %gep0
994  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float %a)
995  store float %med, float addrspace(1)* %out.gep
996  ret void
997}
998
999define amdgpu_kernel void @v_clamp_med3_bay_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
1000; GFX6-LABEL: v_clamp_med3_bay_f32:
1001; GFX6:       ; %bb.0:
1002; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1003; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1004; GFX6-NEXT:    s_mov_b32 s6, 0
1005; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1006; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1007; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1008; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1009; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1010; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1011; GFX6-NEXT:    s_waitcnt vmcnt(0)
1012; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1013; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1014; GFX6-NEXT:    s_endpgm
1015;
1016; GFX8-LABEL: v_clamp_med3_bay_f32:
1017; GFX8:       ; %bb.0:
1018; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1019; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1020; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1021; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1022; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1023; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1024; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1025; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1026; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1027; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1028; GFX8-NEXT:    s_waitcnt vmcnt(0)
1029; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1030; GFX8-NEXT:    flat_store_dword v[0:1], v2
1031; GFX8-NEXT:    s_endpgm
1032;
1033; GFX9-LABEL: v_clamp_med3_bay_f32:
1034; GFX9:       ; %bb.0:
1035; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1036; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1037; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1038; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1039; GFX9-NEXT:    s_waitcnt vmcnt(0)
1040; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1041; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1042; GFX9-NEXT:    s_endpgm
1043;
1044; GFX11-LABEL: v_clamp_med3_bay_f32:
1045; GFX11:       ; %bb.0:
1046; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1047; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1048; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1049; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1050; GFX11-NEXT:    s_waitcnt vmcnt(0)
1051; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1052; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1053; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1054; GFX11-NEXT:    s_endpgm
1055  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1056  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1057  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1058  %a = load float, float addrspace(1)* %gep0
1059  %med = call float @llvm.amdgcn.fmed3.f32(float 1.0, float 0.0, float %a)
1060  store float %med, float addrspace(1)* %out.gep
1061  ret void
1062}
1063
1064define amdgpu_kernel void @v_clamp_med3_yab_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
1065; GFX6-LABEL: v_clamp_med3_yab_f32:
1066; GFX6:       ; %bb.0:
1067; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1068; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1069; GFX6-NEXT:    s_mov_b32 s6, 0
1070; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1071; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1072; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1073; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1074; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1075; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1076; GFX6-NEXT:    s_waitcnt vmcnt(0)
1077; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1078; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1079; GFX6-NEXT:    s_endpgm
1080;
1081; GFX8-LABEL: v_clamp_med3_yab_f32:
1082; GFX8:       ; %bb.0:
1083; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1084; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1085; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1086; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1087; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1088; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1089; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1090; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1091; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1092; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1093; GFX8-NEXT:    s_waitcnt vmcnt(0)
1094; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1095; GFX8-NEXT:    flat_store_dword v[0:1], v2
1096; GFX8-NEXT:    s_endpgm
1097;
1098; GFX9-LABEL: v_clamp_med3_yab_f32:
1099; GFX9:       ; %bb.0:
1100; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1101; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1102; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1103; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1104; GFX9-NEXT:    s_waitcnt vmcnt(0)
1105; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1106; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1107; GFX9-NEXT:    s_endpgm
1108;
1109; GFX11-LABEL: v_clamp_med3_yab_f32:
1110; GFX11:       ; %bb.0:
1111; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1112; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1113; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1114; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1115; GFX11-NEXT:    s_waitcnt vmcnt(0)
1116; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1117; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1118; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1119; GFX11-NEXT:    s_endpgm
1120  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1121  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1122  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1123  %a = load float, float addrspace(1)* %gep0
1124  %med = call float @llvm.amdgcn.fmed3.f32(float %a, float 0.0, float 1.0)
1125  store float %med, float addrspace(1)* %out.gep
1126  ret void
1127}
1128
1129define amdgpu_kernel void @v_clamp_med3_yba_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
1130; GFX6-LABEL: v_clamp_med3_yba_f32:
1131; GFX6:       ; %bb.0:
1132; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1133; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1134; GFX6-NEXT:    s_mov_b32 s6, 0
1135; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1136; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1137; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1138; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1139; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1140; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1141; GFX6-NEXT:    s_waitcnt vmcnt(0)
1142; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1143; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1144; GFX6-NEXT:    s_endpgm
1145;
1146; GFX8-LABEL: v_clamp_med3_yba_f32:
1147; GFX8:       ; %bb.0:
1148; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1149; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1150; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1151; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1152; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1153; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1154; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1155; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1156; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1157; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1158; GFX8-NEXT:    s_waitcnt vmcnt(0)
1159; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1160; GFX8-NEXT:    flat_store_dword v[0:1], v2
1161; GFX8-NEXT:    s_endpgm
1162;
1163; GFX9-LABEL: v_clamp_med3_yba_f32:
1164; GFX9:       ; %bb.0:
1165; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1166; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1167; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1168; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1169; GFX9-NEXT:    s_waitcnt vmcnt(0)
1170; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1171; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1172; GFX9-NEXT:    s_endpgm
1173;
1174; GFX11-LABEL: v_clamp_med3_yba_f32:
1175; GFX11:       ; %bb.0:
1176; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1177; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1178; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1179; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1180; GFX11-NEXT:    s_waitcnt vmcnt(0)
1181; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1182; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1183; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1184; GFX11-NEXT:    s_endpgm
1185  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1186  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1187  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1188  %a = load float, float addrspace(1)* %gep0
1189  %med = call float @llvm.amdgcn.fmed3.f32(float %a, float 1.0, float 0.0)
1190  store float %med, float addrspace(1)* %out.gep
1191  ret void
1192}
1193
1194define amdgpu_kernel void @v_clamp_med3_ayb_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
1195; GFX6-LABEL: v_clamp_med3_ayb_f32:
1196; GFX6:       ; %bb.0:
1197; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1198; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1199; GFX6-NEXT:    s_mov_b32 s6, 0
1200; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1201; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1202; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1203; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1204; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1205; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1206; GFX6-NEXT:    s_waitcnt vmcnt(0)
1207; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1208; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1209; GFX6-NEXT:    s_endpgm
1210;
1211; GFX8-LABEL: v_clamp_med3_ayb_f32:
1212; GFX8:       ; %bb.0:
1213; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1214; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1215; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1216; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1217; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1218; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1219; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1220; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1221; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1222; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1223; GFX8-NEXT:    s_waitcnt vmcnt(0)
1224; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1225; GFX8-NEXT:    flat_store_dword v[0:1], v2
1226; GFX8-NEXT:    s_endpgm
1227;
1228; GFX9-LABEL: v_clamp_med3_ayb_f32:
1229; GFX9:       ; %bb.0:
1230; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1231; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1232; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1233; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1234; GFX9-NEXT:    s_waitcnt vmcnt(0)
1235; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1236; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1237; GFX9-NEXT:    s_endpgm
1238;
1239; GFX11-LABEL: v_clamp_med3_ayb_f32:
1240; GFX11:       ; %bb.0:
1241; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1242; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1243; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1244; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1245; GFX11-NEXT:    s_waitcnt vmcnt(0)
1246; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1247; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1248; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1249; GFX11-NEXT:    s_endpgm
1250  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1251  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1252  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1253  %a = load float, float addrspace(1)* %gep0
1254  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float %a, float 1.0)
1255  store float %med, float addrspace(1)* %out.gep
1256  ret void
1257}
1258
1259define amdgpu_kernel void @v_clamp_med3_bya_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 {
1260; GFX6-LABEL: v_clamp_med3_bya_f32:
1261; GFX6:       ; %bb.0:
1262; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1263; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1264; GFX6-NEXT:    s_mov_b32 s6, 0
1265; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1266; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1267; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1268; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1269; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1270; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1271; GFX6-NEXT:    s_waitcnt vmcnt(0)
1272; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1273; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1274; GFX6-NEXT:    s_endpgm
1275;
1276; GFX8-LABEL: v_clamp_med3_bya_f32:
1277; GFX8:       ; %bb.0:
1278; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1279; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1280; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1281; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1282; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1283; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1284; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1285; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1286; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1287; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1288; GFX8-NEXT:    s_waitcnt vmcnt(0)
1289; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1290; GFX8-NEXT:    flat_store_dword v[0:1], v2
1291; GFX8-NEXT:    s_endpgm
1292;
1293; GFX9-LABEL: v_clamp_med3_bya_f32:
1294; GFX9:       ; %bb.0:
1295; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1296; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1297; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1298; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1299; GFX9-NEXT:    s_waitcnt vmcnt(0)
1300; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1301; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1302; GFX9-NEXT:    s_endpgm
1303;
1304; GFX11-LABEL: v_clamp_med3_bya_f32:
1305; GFX11:       ; %bb.0:
1306; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1307; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1308; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1309; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1310; GFX11-NEXT:    s_waitcnt vmcnt(0)
1311; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1312; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1313; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1314; GFX11-NEXT:    s_endpgm
1315  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1316  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1317  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1318  %a = load float, float addrspace(1)* %gep0
1319  %med = call float @llvm.amdgcn.fmed3.f32(float 1.0, float %a, float 0.0)
1320  store float %med, float addrspace(1)* %out.gep
1321  ret void
1322}
1323
1324define amdgpu_kernel void @v_clamp_constants_to_one_f32(float addrspace(1)* %out) #0 {
1325; GFX6-LABEL: v_clamp_constants_to_one_f32:
1326; GFX6:       ; %bb.0:
1327; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1328; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1329; GFX6-NEXT:    s_mov_b32 s2, 0
1330; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1331; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1332; GFX6-NEXT:    v_mov_b32_e32 v2, 1.0
1333; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1334; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1335; GFX6-NEXT:    s_endpgm
1336;
1337; GFX8-LABEL: v_clamp_constants_to_one_f32:
1338; GFX8:       ; %bb.0:
1339; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1340; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1341; GFX8-NEXT:    v_mov_b32_e32 v2, 1.0
1342; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1343; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1344; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1345; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1346; GFX8-NEXT:    flat_store_dword v[0:1], v2
1347; GFX8-NEXT:    s_endpgm
1348;
1349; GFX9-LABEL: v_clamp_constants_to_one_f32:
1350; GFX9:       ; %bb.0:
1351; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1352; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1353; GFX9-NEXT:    v_mov_b32_e32 v1, 1.0
1354; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1355; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1356; GFX9-NEXT:    s_endpgm
1357;
1358; GFX11-LABEL: v_clamp_constants_to_one_f32:
1359; GFX11:       ; %bb.0:
1360; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1361; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1362; GFX11-NEXT:    v_mov_b32_e32 v1, 1.0
1363; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1364; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1365; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1366; GFX11-NEXT:    s_endpgm
1367  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1368  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1369  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float 4.0)
1370  store float %med, float addrspace(1)* %out.gep
1371  ret void
1372}
1373
1374define amdgpu_kernel void @v_clamp_constants_to_zero_f32(float addrspace(1)* %out) #0 {
1375; GFX6-LABEL: v_clamp_constants_to_zero_f32:
1376; GFX6:       ; %bb.0:
1377; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1378; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1379; GFX6-NEXT:    s_mov_b32 s2, 0
1380; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1381; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1382; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1383; GFX6-NEXT:    buffer_store_dword v1, v[0:1], s[0:3], 0 addr64
1384; GFX6-NEXT:    s_endpgm
1385;
1386; GFX8-LABEL: v_clamp_constants_to_zero_f32:
1387; GFX8:       ; %bb.0:
1388; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1389; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1390; GFX8-NEXT:    v_mov_b32_e32 v2, 0
1391; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1392; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1393; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1394; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1395; GFX8-NEXT:    flat_store_dword v[0:1], v2
1396; GFX8-NEXT:    s_endpgm
1397;
1398; GFX9-LABEL: v_clamp_constants_to_zero_f32:
1399; GFX9:       ; %bb.0:
1400; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1401; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1402; GFX9-NEXT:    v_mov_b32_e32 v1, 0
1403; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1404; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1405; GFX9-NEXT:    s_endpgm
1406;
1407; GFX11-LABEL: v_clamp_constants_to_zero_f32:
1408; GFX11:       ; %bb.0:
1409; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1410; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1411; GFX11-NEXT:    v_mov_b32_e32 v1, 0
1412; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1413; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1414; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1415; GFX11-NEXT:    s_endpgm
1416  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1417  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1418  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float -4.0)
1419  store float %med, float addrspace(1)* %out.gep
1420  ret void
1421}
1422
1423define amdgpu_kernel void @v_clamp_constant_preserve_f32(float addrspace(1)* %out) #0 {
1424; GFX6-LABEL: v_clamp_constant_preserve_f32:
1425; GFX6:       ; %bb.0:
1426; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1427; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1428; GFX6-NEXT:    s_mov_b32 s2, 0
1429; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1430; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1431; GFX6-NEXT:    v_mov_b32_e32 v2, 0.5
1432; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1433; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1434; GFX6-NEXT:    s_endpgm
1435;
1436; GFX8-LABEL: v_clamp_constant_preserve_f32:
1437; GFX8:       ; %bb.0:
1438; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1439; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1440; GFX8-NEXT:    v_mov_b32_e32 v2, 0.5
1441; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1442; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1443; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1444; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1445; GFX8-NEXT:    flat_store_dword v[0:1], v2
1446; GFX8-NEXT:    s_endpgm
1447;
1448; GFX9-LABEL: v_clamp_constant_preserve_f32:
1449; GFX9:       ; %bb.0:
1450; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1451; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1452; GFX9-NEXT:    v_mov_b32_e32 v1, 0.5
1453; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1454; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1455; GFX9-NEXT:    s_endpgm
1456;
1457; GFX11-LABEL: v_clamp_constant_preserve_f32:
1458; GFX11:       ; %bb.0:
1459; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1460; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1461; GFX11-NEXT:    v_mov_b32_e32 v1, 0.5
1462; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1463; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1464; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1465; GFX11-NEXT:    s_endpgm
1466  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1467  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1468  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float 0.5)
1469  store float %med, float addrspace(1)* %out.gep
1470  ret void
1471}
1472
1473define amdgpu_kernel void @v_clamp_constant_preserve_denorm_f32(float addrspace(1)* %out) #0 {
1474; GFX6-LABEL: v_clamp_constant_preserve_denorm_f32:
1475; GFX6:       ; %bb.0:
1476; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1477; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1478; GFX6-NEXT:    s_mov_b32 s2, 0
1479; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1480; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1481; GFX6-NEXT:    v_mov_b32_e32 v2, 0x7fffff
1482; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1483; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1484; GFX6-NEXT:    s_endpgm
1485;
1486; GFX8-LABEL: v_clamp_constant_preserve_denorm_f32:
1487; GFX8:       ; %bb.0:
1488; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1489; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1490; GFX8-NEXT:    v_mov_b32_e32 v2, 0x7fffff
1491; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1492; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1493; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1494; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1495; GFX8-NEXT:    flat_store_dword v[0:1], v2
1496; GFX8-NEXT:    s_endpgm
1497;
1498; GFX9-LABEL: v_clamp_constant_preserve_denorm_f32:
1499; GFX9:       ; %bb.0:
1500; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1501; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1502; GFX9-NEXT:    v_mov_b32_e32 v1, 0x7fffff
1503; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1504; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1505; GFX9-NEXT:    s_endpgm
1506;
1507; GFX11-LABEL: v_clamp_constant_preserve_denorm_f32:
1508; GFX11:       ; %bb.0:
1509; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1510; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1511; GFX11-NEXT:    v_mov_b32_e32 v1, 0x7fffff
1512; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1513; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1514; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1515; GFX11-NEXT:    s_endpgm
1516  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1517  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1518  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float bitcast (i32 8388607 to float))
1519  store float %med, float addrspace(1)* %out.gep
1520  ret void
1521}
1522
1523define amdgpu_kernel void @v_clamp_constant_qnan_f32(float addrspace(1)* %out) #0 {
1524; GFX6-LABEL: v_clamp_constant_qnan_f32:
1525; GFX6:       ; %bb.0:
1526; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1527; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1528; GFX6-NEXT:    s_mov_b32 s2, 0
1529; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1530; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1531; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1532; GFX6-NEXT:    buffer_store_dword v1, v[0:1], s[0:3], 0 addr64
1533; GFX6-NEXT:    s_endpgm
1534;
1535; GFX8-LABEL: v_clamp_constant_qnan_f32:
1536; GFX8:       ; %bb.0:
1537; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1538; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1539; GFX8-NEXT:    v_mov_b32_e32 v2, 0
1540; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1541; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1542; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1543; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1544; GFX8-NEXT:    flat_store_dword v[0:1], v2
1545; GFX8-NEXT:    s_endpgm
1546;
1547; GFX9-LABEL: v_clamp_constant_qnan_f32:
1548; GFX9:       ; %bb.0:
1549; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1550; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1551; GFX9-NEXT:    v_mov_b32_e32 v1, 0
1552; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1553; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1554; GFX9-NEXT:    s_endpgm
1555;
1556; GFX11-LABEL: v_clamp_constant_qnan_f32:
1557; GFX11:       ; %bb.0:
1558; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1559; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1560; GFX11-NEXT:    v_mov_b32_e32 v1, 0
1561; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1562; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1563; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1564; GFX11-NEXT:    s_endpgm
1565  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1566  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1567  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float 0x7FF8000000000000)
1568  store float %med, float addrspace(1)* %out.gep
1569  ret void
1570}
1571
1572define amdgpu_kernel void @v_clamp_constant_snan_f32(float addrspace(1)* %out) #0 {
1573; GFX6-LABEL: v_clamp_constant_snan_f32:
1574; GFX6:       ; %bb.0:
1575; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
1576; GFX6-NEXT:    s_mov_b32 s3, 0xf000
1577; GFX6-NEXT:    s_mov_b32 s2, 0
1578; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1579; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1580; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1581; GFX6-NEXT:    buffer_store_dword v1, v[0:1], s[0:3], 0 addr64
1582; GFX6-NEXT:    s_endpgm
1583;
1584; GFX8-LABEL: v_clamp_constant_snan_f32:
1585; GFX8:       ; %bb.0:
1586; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1587; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1588; GFX8-NEXT:    v_mov_b32_e32 v2, 0
1589; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1590; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1591; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
1592; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1593; GFX8-NEXT:    flat_store_dword v[0:1], v2
1594; GFX8-NEXT:    s_endpgm
1595;
1596; GFX9-LABEL: v_clamp_constant_snan_f32:
1597; GFX9:       ; %bb.0:
1598; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
1599; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1600; GFX9-NEXT:    v_mov_b32_e32 v1, 0
1601; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1602; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1603; GFX9-NEXT:    s_endpgm
1604;
1605; GFX11-LABEL: v_clamp_constant_snan_f32:
1606; GFX11:       ; %bb.0:
1607; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
1608; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1609; GFX11-NEXT:    v_mov_b32_e32 v1, 0
1610; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1611; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1612; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1613; GFX11-NEXT:    s_endpgm
1614  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1615  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1616  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float bitcast (i32 2139095041 to float))
1617  store float %med, float addrspace(1)* %out.gep
1618  ret void
1619}
1620
1621; ---------------------------------------------------------------------
1622; Test non-default behaviors enabling snans and disabling dx10_clamp
1623; ---------------------------------------------------------------------
1624
1625define amdgpu_kernel void @v_clamp_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
1626; GFX6-LABEL: v_clamp_f32_no_dx10_clamp:
1627; GFX6:       ; %bb.0:
1628; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1629; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1630; GFX6-NEXT:    s_mov_b32 s6, 0
1631; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1632; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1633; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1634; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1635; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1636; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1637; GFX6-NEXT:    s_waitcnt vmcnt(0)
1638; GFX6-NEXT:    v_add_f32_e32 v2, 0.5, v2
1639; GFX6-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1640; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1641; GFX6-NEXT:    s_endpgm
1642;
1643; GFX8-LABEL: v_clamp_f32_no_dx10_clamp:
1644; GFX8:       ; %bb.0:
1645; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1646; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1647; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1648; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1649; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1650; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1651; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1652; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1653; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1654; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1655; GFX8-NEXT:    s_waitcnt vmcnt(0)
1656; GFX8-NEXT:    v_add_f32_e32 v2, 0.5, v3
1657; GFX8-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1658; GFX8-NEXT:    flat_store_dword v[0:1], v2
1659; GFX8-NEXT:    s_endpgm
1660;
1661; GFX9-LABEL: v_clamp_f32_no_dx10_clamp:
1662; GFX9:       ; %bb.0:
1663; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1664; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1665; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1666; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1667; GFX9-NEXT:    s_waitcnt vmcnt(0)
1668; GFX9-NEXT:    v_add_f32_e32 v1, 0.5, v1
1669; GFX9-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1670; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1671; GFX9-NEXT:    s_endpgm
1672;
1673; GFX11-LABEL: v_clamp_f32_no_dx10_clamp:
1674; GFX11:       ; %bb.0:
1675; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1676; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1677; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1678; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1679; GFX11-NEXT:    s_waitcnt vmcnt(0)
1680; GFX11-NEXT:    v_add_f32_e32 v1, 0.5, v1
1681; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
1682; GFX11-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1683; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1684; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1685; GFX11-NEXT:    s_endpgm
1686  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1687  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1688  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1689  %a = load float, float addrspace(1)* %gep0
1690  %a.nnan = fadd nnan float %a, 0.5
1691  %max = call float @llvm.maxnum.f32(float %a.nnan, float 0.0)
1692  %med = call float @llvm.minnum.f32(float %max, float 1.0)
1693
1694  store float %med, float addrspace(1)* %out.gep
1695  ret void
1696}
1697
1698define amdgpu_kernel void @v_clamp_f32_snan_dx10clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #3 {
1699; GFX6-LABEL: v_clamp_f32_snan_dx10clamp:
1700; GFX6:       ; %bb.0:
1701; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1702; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1703; GFX6-NEXT:    s_mov_b32 s6, 0
1704; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1705; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1706; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1707; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1708; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1709; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1710; GFX6-NEXT:    s_waitcnt vmcnt(0)
1711; GFX6-NEXT:    v_add_f32_e64 v2, v2, 0.5 clamp
1712; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1713; GFX6-NEXT:    s_endpgm
1714;
1715; GFX8-LABEL: v_clamp_f32_snan_dx10clamp:
1716; GFX8:       ; %bb.0:
1717; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1718; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1719; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1720; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1721; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1722; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1723; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1724; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1725; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1726; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1727; GFX8-NEXT:    s_waitcnt vmcnt(0)
1728; GFX8-NEXT:    v_add_f32_e64 v2, v3, 0.5 clamp
1729; GFX8-NEXT:    flat_store_dword v[0:1], v2
1730; GFX8-NEXT:    s_endpgm
1731;
1732; GFX9-LABEL: v_clamp_f32_snan_dx10clamp:
1733; GFX9:       ; %bb.0:
1734; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1735; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1736; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1737; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1738; GFX9-NEXT:    s_waitcnt vmcnt(0)
1739; GFX9-NEXT:    v_add_f32_e64 v1, v1, 0.5 clamp
1740; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1741; GFX9-NEXT:    s_endpgm
1742;
1743; GFX11-LABEL: v_clamp_f32_snan_dx10clamp:
1744; GFX11:       ; %bb.0:
1745; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1746; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1747; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1748; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1749; GFX11-NEXT:    s_waitcnt vmcnt(0)
1750; GFX11-NEXT:    v_add_f32_e64 v1, v1, 0.5 clamp
1751; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1752; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1753; GFX11-NEXT:    s_endpgm
1754  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1755  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1756  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1757  %a = load float, float addrspace(1)* %gep0
1758  %add = fadd float %a, 0.5
1759  %max = call float @llvm.maxnum.f32(float %add, float 0.0)
1760  %med = call float @llvm.minnum.f32(float %max, float 1.0)
1761
1762  store float %med, float addrspace(1)* %out.gep
1763  ret void
1764}
1765
1766define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #4 {
1767; GFX6-LABEL: v_clamp_f32_snan_no_dx10clamp:
1768; GFX6:       ; %bb.0:
1769; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1770; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1771; GFX6-NEXT:    s_mov_b32 s6, 0
1772; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1773; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1774; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1775; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1776; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1777; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1778; GFX6-NEXT:    s_waitcnt vmcnt(0)
1779; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
1780; GFX6-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1781; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1782; GFX6-NEXT:    s_endpgm
1783;
1784; GFX8-LABEL: v_clamp_f32_snan_no_dx10clamp:
1785; GFX8:       ; %bb.0:
1786; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1787; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1788; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1789; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1790; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1791; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1792; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1793; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1794; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1795; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1796; GFX8-NEXT:    s_waitcnt vmcnt(0)
1797; GFX8-NEXT:    v_mul_f32_e32 v2, 1.0, v3
1798; GFX8-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1799; GFX8-NEXT:    flat_store_dword v[0:1], v2
1800; GFX8-NEXT:    s_endpgm
1801;
1802; GFX9-LABEL: v_clamp_f32_snan_no_dx10clamp:
1803; GFX9:       ; %bb.0:
1804; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1805; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1806; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1807; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1808; GFX9-NEXT:    s_waitcnt vmcnt(0)
1809; GFX9-NEXT:    v_max_f32_e32 v1, v1, v1
1810; GFX9-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1811; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1812; GFX9-NEXT:    s_endpgm
1813;
1814; GFX11-LABEL: v_clamp_f32_snan_no_dx10clamp:
1815; GFX11:       ; %bb.0:
1816; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1817; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1818; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1819; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1820; GFX11-NEXT:    s_waitcnt vmcnt(0)
1821; GFX11-NEXT:    v_max_f32_e32 v1, v1, v1
1822; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
1823; GFX11-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1824; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1825; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1826; GFX11-NEXT:    s_endpgm
1827  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1828  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1829  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1830  %a = load float, float addrspace(1)* %gep0
1831  %max = call float @llvm.maxnum.f32(float %a, float 0.0)
1832  %med = call float @llvm.minnum.f32(float %max, float 1.0)
1833
1834  store float %med, float addrspace(1)* %out.gep
1835  ret void
1836}
1837
1838define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp_nnan_src(float addrspace(1)* %out, float addrspace(1)* %aptr) #4 {
1839; GFX6-LABEL: v_clamp_f32_snan_no_dx10clamp_nnan_src:
1840; GFX6:       ; %bb.0:
1841; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1842; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1843; GFX6-NEXT:    s_mov_b32 s6, 0
1844; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1845; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1846; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1847; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1848; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1849; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1850; GFX6-NEXT:    s_waitcnt vmcnt(0)
1851; GFX6-NEXT:    v_add_f32_e32 v2, 1.0, v2
1852; GFX6-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1853; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1854; GFX6-NEXT:    s_endpgm
1855;
1856; GFX8-LABEL: v_clamp_f32_snan_no_dx10clamp_nnan_src:
1857; GFX8:       ; %bb.0:
1858; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1859; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1860; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1861; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1862; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1863; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1864; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1865; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1866; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1867; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1868; GFX8-NEXT:    s_waitcnt vmcnt(0)
1869; GFX8-NEXT:    v_add_f32_e32 v2, 1.0, v3
1870; GFX8-NEXT:    v_med3_f32 v2, v2, 0, 1.0
1871; GFX8-NEXT:    flat_store_dword v[0:1], v2
1872; GFX8-NEXT:    s_endpgm
1873;
1874; GFX9-LABEL: v_clamp_f32_snan_no_dx10clamp_nnan_src:
1875; GFX9:       ; %bb.0:
1876; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1877; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1878; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1879; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1880; GFX9-NEXT:    s_waitcnt vmcnt(0)
1881; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
1882; GFX9-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1883; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1884; GFX9-NEXT:    s_endpgm
1885;
1886; GFX11-LABEL: v_clamp_f32_snan_no_dx10clamp_nnan_src:
1887; GFX11:       ; %bb.0:
1888; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1889; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1890; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1891; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1892; GFX11-NEXT:    s_waitcnt vmcnt(0)
1893; GFX11-NEXT:    v_add_f32_e32 v1, 1.0, v1
1894; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
1895; GFX11-NEXT:    v_med3_f32 v1, v1, 0, 1.0
1896; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1897; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1898; GFX11-NEXT:    s_endpgm
1899  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1900  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1901  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1902  %a = load float, float addrspace(1)* %gep0
1903  %add  = fadd nnan float %a, 1.0
1904  %max = call float @llvm.maxnum.f32(float %add, float 0.0)
1905  %med = call float @llvm.minnum.f32(float %max, float 1.0)
1906
1907  store float %med, float addrspace(1)* %out.gep
1908  ret void
1909}
1910
1911define amdgpu_kernel void @v_clamp_med3_aby_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
1912; GFX6-LABEL: v_clamp_med3_aby_f32_no_dx10_clamp:
1913; GFX6:       ; %bb.0:
1914; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1915; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1916; GFX6-NEXT:    s_mov_b32 s6, 0
1917; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1918; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1919; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1920; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1921; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1922; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1923; GFX6-NEXT:    s_waitcnt vmcnt(0)
1924; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1925; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1926; GFX6-NEXT:    s_endpgm
1927;
1928; GFX8-LABEL: v_clamp_med3_aby_f32_no_dx10_clamp:
1929; GFX8:       ; %bb.0:
1930; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1931; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1932; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1933; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1934; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
1935; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1936; GFX8-NEXT:    flat_load_dword v3, v[0:1]
1937; GFX8-NEXT:    v_mov_b32_e32 v1, s1
1938; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
1939; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
1940; GFX8-NEXT:    s_waitcnt vmcnt(0)
1941; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
1942; GFX8-NEXT:    flat_store_dword v[0:1], v2
1943; GFX8-NEXT:    s_endpgm
1944;
1945; GFX9-LABEL: v_clamp_med3_aby_f32_no_dx10_clamp:
1946; GFX9:       ; %bb.0:
1947; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1948; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1949; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1950; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
1951; GFX9-NEXT:    s_waitcnt vmcnt(0)
1952; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1953; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
1954; GFX9-NEXT:    s_endpgm
1955;
1956; GFX11-LABEL: v_clamp_med3_aby_f32_no_dx10_clamp:
1957; GFX11:       ; %bb.0:
1958; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
1959; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1960; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
1961; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
1962; GFX11-NEXT:    s_waitcnt vmcnt(0)
1963; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
1964; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
1965; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1966; GFX11-NEXT:    s_endpgm
1967  %tid = call i32 @llvm.amdgcn.workitem.id.x()
1968  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
1969  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
1970  %a = load float, float addrspace(1)* %gep0
1971  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float %a)
1972  store float %med, float addrspace(1)* %out.gep
1973  ret void
1974}
1975
1976define amdgpu_kernel void @v_clamp_med3_bay_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
1977; GFX6-LABEL: v_clamp_med3_bay_f32_no_dx10_clamp:
1978; GFX6:       ; %bb.0:
1979; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1980; GFX6-NEXT:    s_mov_b32 s7, 0xf000
1981; GFX6-NEXT:    s_mov_b32 s6, 0
1982; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
1983; GFX6-NEXT:    v_mov_b32_e32 v1, 0
1984; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1985; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
1986; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
1987; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
1988; GFX6-NEXT:    s_waitcnt vmcnt(0)
1989; GFX6-NEXT:    v_max_f32_e64 v2, v2, v2 clamp
1990; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
1991; GFX6-NEXT:    s_endpgm
1992;
1993; GFX8-LABEL: v_clamp_med3_bay_f32_no_dx10_clamp:
1994; GFX8:       ; %bb.0:
1995; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1996; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
1997; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
1998; GFX8-NEXT:    v_mov_b32_e32 v1, s3
1999; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2000; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2001; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2002; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2003; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2004; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2005; GFX8-NEXT:    s_waitcnt vmcnt(0)
2006; GFX8-NEXT:    v_max_f32_e64 v2, v3, v3 clamp
2007; GFX8-NEXT:    flat_store_dword v[0:1], v2
2008; GFX8-NEXT:    s_endpgm
2009;
2010; GFX9-LABEL: v_clamp_med3_bay_f32_no_dx10_clamp:
2011; GFX9:       ; %bb.0:
2012; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2013; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2014; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2015; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2016; GFX9-NEXT:    s_waitcnt vmcnt(0)
2017; GFX9-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
2018; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2019; GFX9-NEXT:    s_endpgm
2020;
2021; GFX11-LABEL: v_clamp_med3_bay_f32_no_dx10_clamp:
2022; GFX11:       ; %bb.0:
2023; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2024; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2025; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2026; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2027; GFX11-NEXT:    s_waitcnt vmcnt(0)
2028; GFX11-NEXT:    v_max_f32_e64 v1, v1, v1 clamp
2029; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2030; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2031; GFX11-NEXT:    s_endpgm
2032  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2033  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
2034  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2035  %a = load float, float addrspace(1)* %gep0
2036  %med = call float @llvm.amdgcn.fmed3.f32(float 1.0, float 0.0, float %a)
2037  store float %med, float addrspace(1)* %out.gep
2038  ret void
2039}
2040
2041define amdgpu_kernel void @v_clamp_med3_yab_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
2042; GFX6-LABEL: v_clamp_med3_yab_f32_no_dx10_clamp:
2043; GFX6:       ; %bb.0:
2044; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2045; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2046; GFX6-NEXT:    s_mov_b32 s6, 0
2047; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2048; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2049; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2050; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2051; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2052; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2053; GFX6-NEXT:    s_waitcnt vmcnt(0)
2054; GFX6-NEXT:    v_med3_f32 v2, v2, 0, 1.0
2055; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2056; GFX6-NEXT:    s_endpgm
2057;
2058; GFX8-LABEL: v_clamp_med3_yab_f32_no_dx10_clamp:
2059; GFX8:       ; %bb.0:
2060; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2061; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2062; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2063; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2064; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2065; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2066; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2067; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2068; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2069; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2070; GFX8-NEXT:    s_waitcnt vmcnt(0)
2071; GFX8-NEXT:    v_med3_f32 v2, v3, 0, 1.0
2072; GFX8-NEXT:    flat_store_dword v[0:1], v2
2073; GFX8-NEXT:    s_endpgm
2074;
2075; GFX9-LABEL: v_clamp_med3_yab_f32_no_dx10_clamp:
2076; GFX9:       ; %bb.0:
2077; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2078; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2079; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2080; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2081; GFX9-NEXT:    s_waitcnt vmcnt(0)
2082; GFX9-NEXT:    v_med3_f32 v1, v1, 0, 1.0
2083; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2084; GFX9-NEXT:    s_endpgm
2085;
2086; GFX11-LABEL: v_clamp_med3_yab_f32_no_dx10_clamp:
2087; GFX11:       ; %bb.0:
2088; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2089; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2090; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2091; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2092; GFX11-NEXT:    s_waitcnt vmcnt(0)
2093; GFX11-NEXT:    v_med3_f32 v1, v1, 0, 1.0
2094; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2095; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2096; GFX11-NEXT:    s_endpgm
2097  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2098  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
2099  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2100  %a = load float, float addrspace(1)* %gep0
2101  %med = call float @llvm.amdgcn.fmed3.f32(float %a, float 0.0, float 1.0)
2102  store float %med, float addrspace(1)* %out.gep
2103  ret void
2104}
2105
2106define amdgpu_kernel void @v_clamp_med3_yba_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
2107; GFX6-LABEL: v_clamp_med3_yba_f32_no_dx10_clamp:
2108; GFX6:       ; %bb.0:
2109; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2110; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2111; GFX6-NEXT:    s_mov_b32 s6, 0
2112; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2113; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2114; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2115; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2116; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2117; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2118; GFX6-NEXT:    s_waitcnt vmcnt(0)
2119; GFX6-NEXT:    v_med3_f32 v2, v2, 1.0, 0
2120; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2121; GFX6-NEXT:    s_endpgm
2122;
2123; GFX8-LABEL: v_clamp_med3_yba_f32_no_dx10_clamp:
2124; GFX8:       ; %bb.0:
2125; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2126; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2127; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2128; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2129; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2130; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2131; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2132; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2133; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2134; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2135; GFX8-NEXT:    s_waitcnt vmcnt(0)
2136; GFX8-NEXT:    v_med3_f32 v2, v3, 1.0, 0
2137; GFX8-NEXT:    flat_store_dword v[0:1], v2
2138; GFX8-NEXT:    s_endpgm
2139;
2140; GFX9-LABEL: v_clamp_med3_yba_f32_no_dx10_clamp:
2141; GFX9:       ; %bb.0:
2142; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2143; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2144; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2145; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2146; GFX9-NEXT:    s_waitcnt vmcnt(0)
2147; GFX9-NEXT:    v_med3_f32 v1, v1, 1.0, 0
2148; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2149; GFX9-NEXT:    s_endpgm
2150;
2151; GFX11-LABEL: v_clamp_med3_yba_f32_no_dx10_clamp:
2152; GFX11:       ; %bb.0:
2153; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2154; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2155; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2156; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2157; GFX11-NEXT:    s_waitcnt vmcnt(0)
2158; GFX11-NEXT:    v_med3_f32 v1, v1, 1.0, 0
2159; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2160; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2161; GFX11-NEXT:    s_endpgm
2162  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2163  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
2164  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2165  %a = load float, float addrspace(1)* %gep0
2166  %med = call float @llvm.amdgcn.fmed3.f32(float %a, float 1.0, float 0.0)
2167  store float %med, float addrspace(1)* %out.gep
2168  ret void
2169}
2170
2171define amdgpu_kernel void @v_clamp_med3_ayb_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
2172; GFX6-LABEL: v_clamp_med3_ayb_f32_no_dx10_clamp:
2173; GFX6:       ; %bb.0:
2174; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2175; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2176; GFX6-NEXT:    s_mov_b32 s6, 0
2177; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2178; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2179; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2180; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2181; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2182; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2183; GFX6-NEXT:    s_waitcnt vmcnt(0)
2184; GFX6-NEXT:    v_med3_f32 v2, 0, v2, 1.0
2185; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2186; GFX6-NEXT:    s_endpgm
2187;
2188; GFX8-LABEL: v_clamp_med3_ayb_f32_no_dx10_clamp:
2189; GFX8:       ; %bb.0:
2190; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2191; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2192; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2193; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2194; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2195; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2196; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2197; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2198; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2199; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2200; GFX8-NEXT:    s_waitcnt vmcnt(0)
2201; GFX8-NEXT:    v_med3_f32 v2, 0, v3, 1.0
2202; GFX8-NEXT:    flat_store_dword v[0:1], v2
2203; GFX8-NEXT:    s_endpgm
2204;
2205; GFX9-LABEL: v_clamp_med3_ayb_f32_no_dx10_clamp:
2206; GFX9:       ; %bb.0:
2207; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2208; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2209; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2210; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2211; GFX9-NEXT:    s_waitcnt vmcnt(0)
2212; GFX9-NEXT:    v_med3_f32 v1, 0, v1, 1.0
2213; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2214; GFX9-NEXT:    s_endpgm
2215;
2216; GFX11-LABEL: v_clamp_med3_ayb_f32_no_dx10_clamp:
2217; GFX11:       ; %bb.0:
2218; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2219; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2220; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2221; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2222; GFX11-NEXT:    s_waitcnt vmcnt(0)
2223; GFX11-NEXT:    v_med3_f32 v1, 0, v1, 1.0
2224; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2225; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2226; GFX11-NEXT:    s_endpgm
2227  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2228  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
2229  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2230  %a = load float, float addrspace(1)* %gep0
2231  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float %a, float 1.0)
2232  store float %med, float addrspace(1)* %out.gep
2233  ret void
2234}
2235
2236define amdgpu_kernel void @v_clamp_med3_bya_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
2237; GFX6-LABEL: v_clamp_med3_bya_f32_no_dx10_clamp:
2238; GFX6:       ; %bb.0:
2239; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2240; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2241; GFX6-NEXT:    s_mov_b32 s6, 0
2242; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2243; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2244; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2245; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2246; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2247; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2248; GFX6-NEXT:    s_waitcnt vmcnt(0)
2249; GFX6-NEXT:    v_med3_f32 v2, 1.0, v2, 0
2250; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2251; GFX6-NEXT:    s_endpgm
2252;
2253; GFX8-LABEL: v_clamp_med3_bya_f32_no_dx10_clamp:
2254; GFX8:       ; %bb.0:
2255; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2256; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2257; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2258; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2259; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2260; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2261; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2262; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2263; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2264; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2265; GFX8-NEXT:    s_waitcnt vmcnt(0)
2266; GFX8-NEXT:    v_med3_f32 v2, 1.0, v3, 0
2267; GFX8-NEXT:    flat_store_dword v[0:1], v2
2268; GFX8-NEXT:    s_endpgm
2269;
2270; GFX9-LABEL: v_clamp_med3_bya_f32_no_dx10_clamp:
2271; GFX9:       ; %bb.0:
2272; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2273; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2274; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2275; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2276; GFX9-NEXT:    s_waitcnt vmcnt(0)
2277; GFX9-NEXT:    v_med3_f32 v1, 1.0, v1, 0
2278; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2279; GFX9-NEXT:    s_endpgm
2280;
2281; GFX11-LABEL: v_clamp_med3_bya_f32_no_dx10_clamp:
2282; GFX11:       ; %bb.0:
2283; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2284; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2285; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2286; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2287; GFX11-NEXT:    s_waitcnt vmcnt(0)
2288; GFX11-NEXT:    v_med3_f32 v1, 1.0, v1, 0
2289; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2290; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2291; GFX11-NEXT:    s_endpgm
2292  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2293  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
2294  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2295  %a = load float, float addrspace(1)* %gep0
2296  %med = call float @llvm.amdgcn.fmed3.f32(float 1.0, float %a, float 0.0)
2297  store float %med, float addrspace(1)* %out.gep
2298  ret void
2299}
2300
2301define amdgpu_kernel void @v_clamp_constant_qnan_f32_no_dx10_clamp(float addrspace(1)* %out) #2 {
2302; GFX6-LABEL: v_clamp_constant_qnan_f32_no_dx10_clamp:
2303; GFX6:       ; %bb.0:
2304; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
2305; GFX6-NEXT:    s_mov_b32 s3, 0xf000
2306; GFX6-NEXT:    s_mov_b32 s2, 0
2307; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2308; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2309; GFX6-NEXT:    v_mov_b32_e32 v2, 0x7fc00000
2310; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2311; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2312; GFX6-NEXT:    s_endpgm
2313;
2314; GFX8-LABEL: v_clamp_constant_qnan_f32_no_dx10_clamp:
2315; GFX8:       ; %bb.0:
2316; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
2317; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2318; GFX8-NEXT:    v_mov_b32_e32 v2, 0x7fc00000
2319; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2320; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2321; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
2322; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2323; GFX8-NEXT:    flat_store_dword v[0:1], v2
2324; GFX8-NEXT:    s_endpgm
2325;
2326; GFX9-LABEL: v_clamp_constant_qnan_f32_no_dx10_clamp:
2327; GFX9:       ; %bb.0:
2328; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
2329; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2330; GFX9-NEXT:    v_mov_b32_e32 v1, 0x7fc00000
2331; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2332; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2333; GFX9-NEXT:    s_endpgm
2334;
2335; GFX11-LABEL: v_clamp_constant_qnan_f32_no_dx10_clamp:
2336; GFX11:       ; %bb.0:
2337; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
2338; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2339; GFX11-NEXT:    v_mov_b32_e32 v1, 0x7fc00000
2340; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2341; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2342; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2343; GFX11-NEXT:    s_endpgm
2344  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2345  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2346  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float 0x7FF8000000000000)
2347  store float %med, float addrspace(1)* %out.gep
2348  ret void
2349}
2350
2351define amdgpu_kernel void @v_clamp_constant_snan_f32_no_dx10_clamp(float addrspace(1)* %out) #2 {
2352; GFX6-LABEL: v_clamp_constant_snan_f32_no_dx10_clamp:
2353; GFX6:       ; %bb.0:
2354; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
2355; GFX6-NEXT:    s_mov_b32 s3, 0xf000
2356; GFX6-NEXT:    s_mov_b32 s2, 0
2357; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2358; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2359; GFX6-NEXT:    v_mov_b32_e32 v2, 0x7f800001
2360; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2361; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2362; GFX6-NEXT:    s_endpgm
2363;
2364; GFX8-LABEL: v_clamp_constant_snan_f32_no_dx10_clamp:
2365; GFX8:       ; %bb.0:
2366; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
2367; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2368; GFX8-NEXT:    v_mov_b32_e32 v2, 0x7f800001
2369; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2370; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2371; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
2372; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2373; GFX8-NEXT:    flat_store_dword v[0:1], v2
2374; GFX8-NEXT:    s_endpgm
2375;
2376; GFX9-LABEL: v_clamp_constant_snan_f32_no_dx10_clamp:
2377; GFX9:       ; %bb.0:
2378; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
2379; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2380; GFX9-NEXT:    v_mov_b32_e32 v1, 0x7f800001
2381; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2382; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2383; GFX9-NEXT:    s_endpgm
2384;
2385; GFX11-LABEL: v_clamp_constant_snan_f32_no_dx10_clamp:
2386; GFX11:       ; %bb.0:
2387; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
2388; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2389; GFX11-NEXT:    v_mov_b32_e32 v1, 0x7f800001
2390; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2391; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2392; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2393; GFX11-NEXT:    s_endpgm
2394  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2395  %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
2396  %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float bitcast (i32 2139095041 to float))
2397  store float %med, float addrspace(1)* %out.gep
2398  ret void
2399}
2400
2401define amdgpu_kernel void @v_clamp_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2402; GFX6-LABEL: v_clamp_v2f16:
2403; GFX6:       ; %bb.0:
2404; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2405; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2406; GFX6-NEXT:    s_mov_b32 s6, 0
2407; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2408; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2409; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2410; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2411; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2412; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2413; GFX6-NEXT:    s_waitcnt vmcnt(0)
2414; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2415; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
2416; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
2417; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2418; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2419; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2420; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2421; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2422; GFX6-NEXT:    s_endpgm
2423;
2424; GFX8-LABEL: v_clamp_v2f16:
2425; GFX8:       ; %bb.0:
2426; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2427; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2428; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2429; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2430; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2431; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2432; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2433; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2434; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2435; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2436; GFX8-NEXT:    s_waitcnt vmcnt(0)
2437; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2438; GFX8-NEXT:    v_max_f16_e64 v3, v3, v3 clamp
2439; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
2440; GFX8-NEXT:    flat_store_dword v[0:1], v2
2441; GFX8-NEXT:    s_endpgm
2442;
2443; GFX9-LABEL: v_clamp_v2f16:
2444; GFX9:       ; %bb.0:
2445; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2446; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2447; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2448; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2449; GFX9-NEXT:    s_waitcnt vmcnt(0)
2450; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
2451; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2452; GFX9-NEXT:    s_endpgm
2453;
2454; GFX11-LABEL: v_clamp_v2f16:
2455; GFX11:       ; %bb.0:
2456; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2457; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2458; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2459; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2460; GFX11-NEXT:    s_waitcnt vmcnt(0)
2461; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
2462; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2463; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2464; GFX11-NEXT:    s_endpgm
2465  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2466  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2467  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2468  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2469  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> zeroinitializer)
2470  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
2471
2472  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2473  ret void
2474}
2475
2476define amdgpu_kernel void @v_clamp_v2f16_undef_elt(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2477; GFX6-LABEL: v_clamp_v2f16_undef_elt:
2478; GFX6:       ; %bb.0:
2479; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2480; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2481; GFX6-NEXT:    s_mov_b32 s6, 0
2482; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2483; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2484; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2485; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2486; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2487; GFX6-NEXT:    s_mov_b32 s2, 0x7fc00000
2488; GFX6-NEXT:    s_waitcnt vmcnt(0)
2489; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v2
2490; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 16, v2
2491; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
2492; GFX6-NEXT:    v_mul_f32_e32 v3, 1.0, v3
2493; GFX6-NEXT:    v_max_f32_e32 v3, 0x7fc00000, v3
2494; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
2495; GFX6-NEXT:    v_med3_f32 v2, v2, 0, s2
2496; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2497; GFX6-NEXT:    v_min_f32_e32 v3, 1.0, v3
2498; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2499; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2500; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
2501; GFX6-NEXT:    v_or_b32_e32 v2, v3, v2
2502; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2503; GFX6-NEXT:    s_endpgm
2504;
2505; GFX8-LABEL: v_clamp_v2f16_undef_elt:
2506; GFX8:       ; %bb.0:
2507; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2508; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2509; GFX8-NEXT:    v_mov_b32_e32 v4, 0x7e00
2510; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2511; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2512; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2513; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2514; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2515; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2516; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2517; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2518; GFX8-NEXT:    s_waitcnt vmcnt(0)
2519; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2520; GFX8-NEXT:    v_max_f16_e32 v3, v3, v3
2521; GFX8-NEXT:    v_max_f16_e32 v2, 0, v2
2522; GFX8-NEXT:    v_max_f16_e32 v3, 0x7e00, v3
2523; GFX8-NEXT:    v_min_f16_e32 v3, 1.0, v3
2524; GFX8-NEXT:    v_min_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
2525; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
2526; GFX8-NEXT:    flat_store_dword v[0:1], v2
2527; GFX8-NEXT:    s_endpgm
2528;
2529; GFX9-LABEL: v_clamp_v2f16_undef_elt:
2530; GFX9:       ; %bb.0:
2531; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2532; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2533; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2534; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2535; GFX9-NEXT:    s_waitcnt vmcnt(0)
2536; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
2537; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2538; GFX9-NEXT:    s_endpgm
2539;
2540; GFX11-LABEL: v_clamp_v2f16_undef_elt:
2541; GFX11:       ; %bb.0:
2542; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2543; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2544; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2545; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2546; GFX11-NEXT:    s_waitcnt vmcnt(0)
2547; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
2548; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2549; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2550; GFX11-NEXT:    s_endpgm
2551  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2552  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2553  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2554  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2555  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half undef, half 0.0>)
2556  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half undef>)
2557
2558  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2559  ret void
2560}
2561
2562define amdgpu_kernel void @v_clamp_v2f16_not_zero(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2563; GFX6-LABEL: v_clamp_v2f16_not_zero:
2564; GFX6:       ; %bb.0:
2565; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2566; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2567; GFX6-NEXT:    s_mov_b32 s6, 0
2568; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2569; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2570; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2571; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2572; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2573; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2574; GFX6-NEXT:    s_waitcnt vmcnt(0)
2575; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v2
2576; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 16, v2
2577; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
2578; GFX6-NEXT:    v_mul_f32_e32 v3, 1.0, v3
2579; GFX6-NEXT:    v_max_f32_e32 v3, 2.0, v3
2580; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2581; GFX6-NEXT:    v_min_f32_e32 v3, 1.0, v3
2582; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2583; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
2584; GFX6-NEXT:    v_or_b32_e32 v2, v3, v2
2585; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2586; GFX6-NEXT:    s_endpgm
2587;
2588; GFX8-LABEL: v_clamp_v2f16_not_zero:
2589; GFX8:       ; %bb.0:
2590; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2591; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2592; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2593; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2594; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2595; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2596; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2597; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2598; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2599; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2600; GFX8-NEXT:    s_waitcnt vmcnt(0)
2601; GFX8-NEXT:    v_max_f16_e32 v2, v3, v3
2602; GFX8-NEXT:    v_max_f16_e32 v2, 2.0, v2
2603; GFX8-NEXT:    v_max_f16_sdwa v3, v3, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2604; GFX8-NEXT:    v_min_f16_e32 v2, 1.0, v2
2605; GFX8-NEXT:    v_or_b32_e32 v2, v2, v3
2606; GFX8-NEXT:    flat_store_dword v[0:1], v2
2607; GFX8-NEXT:    s_endpgm
2608;
2609; GFX9-LABEL: v_clamp_v2f16_not_zero:
2610; GFX9:       ; %bb.0:
2611; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2612; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2613; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2614; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2615; GFX9-NEXT:    s_waitcnt vmcnt(0)
2616; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1
2617; GFX9-NEXT:    v_pk_max_f16 v1, v1, 2.0
2618; GFX9-NEXT:    v_pk_min_f16 v1, v1, 1.0 op_sel_hi:[1,0]
2619; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2620; GFX9-NEXT:    s_endpgm
2621;
2622; GFX11-LABEL: v_clamp_v2f16_not_zero:
2623; GFX11:       ; %bb.0:
2624; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2625; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2626; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2627; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2628; GFX11-NEXT:    s_waitcnt vmcnt(0)
2629; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1
2630; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2631; GFX11-NEXT:    v_pk_max_f16 v1, v1, 2.0
2632; GFX11-NEXT:    v_pk_min_f16 v1, v1, 1.0 op_sel_hi:[1,0]
2633; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2634; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2635; GFX11-NEXT:    s_endpgm
2636  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2637  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2638  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2639  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2640  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half 2.0, half 0.0>)
2641  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
2642
2643  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2644  ret void
2645}
2646
2647define amdgpu_kernel void @v_clamp_v2f16_not_one(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2648; GFX6-LABEL: v_clamp_v2f16_not_one:
2649; GFX6:       ; %bb.0:
2650; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2651; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2652; GFX6-NEXT:    s_mov_b32 s6, 0
2653; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2654; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2655; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2656; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2657; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2658; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2659; GFX6-NEXT:    s_waitcnt vmcnt(0)
2660; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2661; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
2662; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
2663; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
2664; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2665; GFX6-NEXT:    v_med3_f32 v2, v2, 0, 0
2666; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2667; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2668; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2669; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2670; GFX6-NEXT:    s_endpgm
2671;
2672; GFX8-LABEL: v_clamp_v2f16_not_one:
2673; GFX8:       ; %bb.0:
2674; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2675; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2676; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2677; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2678; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2679; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2680; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2681; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2682; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2683; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2684; GFX8-NEXT:    s_waitcnt vmcnt(0)
2685; GFX8-NEXT:    v_max_f16_e32 v2, v3, v3
2686; GFX8-NEXT:    v_max_f16_e32 v2, 0, v2
2687; GFX8-NEXT:    v_max_f16_sdwa v3, v3, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2688; GFX8-NEXT:    v_min_f16_e32 v2, 0, v2
2689; GFX8-NEXT:    v_or_b32_e32 v2, v2, v3
2690; GFX8-NEXT:    flat_store_dword v[0:1], v2
2691; GFX8-NEXT:    s_endpgm
2692;
2693; GFX9-LABEL: v_clamp_v2f16_not_one:
2694; GFX9:       ; %bb.0:
2695; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2696; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2697; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2698; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2699; GFX9-NEXT:    s_waitcnt vmcnt(0)
2700; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1
2701; GFX9-NEXT:    v_pk_max_f16 v1, v1, 0
2702; GFX9-NEXT:    v_pk_min_f16 v1, v1, 1.0 op_sel:[0,1] op_sel_hi:[1,0]
2703; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2704; GFX9-NEXT:    s_endpgm
2705;
2706; GFX11-LABEL: v_clamp_v2f16_not_one:
2707; GFX11:       ; %bb.0:
2708; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2709; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2710; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2711; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2712; GFX11-NEXT:    s_waitcnt vmcnt(0)
2713; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1
2714; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2715; GFX11-NEXT:    v_pk_max_f16 v1, v1, 0
2716; GFX11-NEXT:    v_pk_min_f16 v1, v1, 1.0 op_sel:[0,1] op_sel_hi:[1,0]
2717; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2718; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2719; GFX11-NEXT:    s_endpgm
2720  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2721  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2722  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2723  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2724  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half 0.0, half 0.0>)
2725  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 0.0, half 1.0>)
2726
2727  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2728  ret void
2729}
2730
2731define amdgpu_kernel void @v_clamp_neg_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2732; GFX6-LABEL: v_clamp_neg_v2f16:
2733; GFX6:       ; %bb.0:
2734; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2735; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2736; GFX6-NEXT:    s_mov_b32 s6, 0
2737; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2738; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2739; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2740; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2741; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2742; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2743; GFX6-NEXT:    s_waitcnt vmcnt(0)
2744; GFX6-NEXT:    v_xor_b32_e32 v2, 0x80008000, v2
2745; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2746; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
2747; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
2748; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2749; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2750; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2751; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2752; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2753; GFX6-NEXT:    s_endpgm
2754;
2755; GFX8-LABEL: v_clamp_neg_v2f16:
2756; GFX8:       ; %bb.0:
2757; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2758; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2759; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2760; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2761; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2762; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2763; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2764; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2765; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2766; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2767; GFX8-NEXT:    s_waitcnt vmcnt(0)
2768; GFX8-NEXT:    v_max_f16_sdwa v2, -v3, -v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2769; GFX8-NEXT:    v_max_f16_e64 v3, -v3, -v3 clamp
2770; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
2771; GFX8-NEXT:    flat_store_dword v[0:1], v2
2772; GFX8-NEXT:    s_endpgm
2773;
2774; GFX9-LABEL: v_clamp_neg_v2f16:
2775; GFX9:       ; %bb.0:
2776; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2777; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2778; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2779; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2780; GFX9-NEXT:    s_waitcnt vmcnt(0)
2781; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] neg_hi:[1,1] clamp
2782; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2783; GFX9-NEXT:    s_endpgm
2784;
2785; GFX11-LABEL: v_clamp_neg_v2f16:
2786; GFX11:       ; %bb.0:
2787; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2788; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2789; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2790; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2791; GFX11-NEXT:    s_waitcnt vmcnt(0)
2792; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] neg_hi:[1,1] clamp
2793; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2794; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2795; GFX11-NEXT:    s_endpgm
2796  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2797  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2798  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2799  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2800  %fneg.a = fsub <2 x half> <half -0.0, half -0.0>, %a
2801  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %fneg.a, <2 x half> zeroinitializer)
2802  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
2803
2804  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2805  ret void
2806}
2807
2808define amdgpu_kernel void @v_clamp_negabs_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2809; GFX6-LABEL: v_clamp_negabs_v2f16:
2810; GFX6:       ; %bb.0:
2811; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2812; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2813; GFX6-NEXT:    s_mov_b32 s6, 0
2814; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2815; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2816; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2817; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2818; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2819; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2820; GFX6-NEXT:    s_waitcnt vmcnt(0)
2821; GFX6-NEXT:    v_or_b32_e32 v2, 0x80008000, v2
2822; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2823; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
2824; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
2825; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2826; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2827; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2828; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2829; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2830; GFX6-NEXT:    s_endpgm
2831;
2832; GFX8-LABEL: v_clamp_negabs_v2f16:
2833; GFX8:       ; %bb.0:
2834; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2835; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2836; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2837; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2838; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2839; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2840; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2841; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2842; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2843; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2844; GFX8-NEXT:    s_waitcnt vmcnt(0)
2845; GFX8-NEXT:    v_max_f16_sdwa v2, -|v3|, -|v3| clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2846; GFX8-NEXT:    v_max_f16_e64 v3, -|v3|, -|v3| clamp
2847; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
2848; GFX8-NEXT:    flat_store_dword v[0:1], v2
2849; GFX8-NEXT:    s_endpgm
2850;
2851; GFX9-LABEL: v_clamp_negabs_v2f16:
2852; GFX9:       ; %bb.0:
2853; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2854; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2855; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2856; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2857; GFX9-NEXT:    s_waitcnt vmcnt(0)
2858; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v1
2859; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] neg_hi:[1,1] clamp
2860; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2861; GFX9-NEXT:    s_endpgm
2862;
2863; GFX11-LABEL: v_clamp_negabs_v2f16:
2864; GFX11:       ; %bb.0:
2865; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2866; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2867; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2868; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2869; GFX11-NEXT:    s_waitcnt vmcnt(0)
2870; GFX11-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v1
2871; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2872; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] neg_hi:[1,1] clamp
2873; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2874; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2875; GFX11-NEXT:    s_endpgm
2876  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2877  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2878  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2879  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2880  %fabs.a = call <2 x half> @llvm.fabs.v2f16(<2 x half> %a)
2881  %fneg.fabs.a = fsub <2 x half> <half -0.0, half -0.0>, %fabs.a
2882
2883  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %fneg.fabs.a, <2 x half> zeroinitializer)
2884  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
2885
2886  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2887  ret void
2888}
2889
2890define amdgpu_kernel void @v_clamp_neglo_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2891; GFX6-LABEL: v_clamp_neglo_v2f16:
2892; GFX6:       ; %bb.0:
2893; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2894; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2895; GFX6-NEXT:    s_mov_b32 s6, 0
2896; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2897; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2898; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2899; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2900; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2901; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2902; GFX6-NEXT:    s_waitcnt vmcnt(0)
2903; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2904; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
2905; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v2
2906; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, -v2 clamp
2907; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2908; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2909; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2910; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2911; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2912; GFX6-NEXT:    s_endpgm
2913;
2914; GFX8-LABEL: v_clamp_neglo_v2f16:
2915; GFX8:       ; %bb.0:
2916; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2917; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2918; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2919; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2920; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2921; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2922; GFX8-NEXT:    flat_load_dword v3, v[0:1]
2923; GFX8-NEXT:    v_mov_b32_e32 v1, s1
2924; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
2925; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
2926; GFX8-NEXT:    s_waitcnt vmcnt(0)
2927; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
2928; GFX8-NEXT:    v_max_f16_e64 v3, -v3, -v3 clamp
2929; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
2930; GFX8-NEXT:    flat_store_dword v[0:1], v2
2931; GFX8-NEXT:    s_endpgm
2932;
2933; GFX9-LABEL: v_clamp_neglo_v2f16:
2934; GFX9:       ; %bb.0:
2935; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2936; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2937; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2938; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
2939; GFX9-NEXT:    s_waitcnt vmcnt(0)
2940; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] clamp
2941; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
2942; GFX9-NEXT:    s_endpgm
2943;
2944; GFX11-LABEL: v_clamp_neglo_v2f16:
2945; GFX11:       ; %bb.0:
2946; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
2947; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2948; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
2949; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
2950; GFX11-NEXT:    s_waitcnt vmcnt(0)
2951; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 neg_lo:[1,1] clamp
2952; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
2953; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2954; GFX11-NEXT:    s_endpgm
2955  %tid = call i32 @llvm.amdgcn.workitem.id.x()
2956  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
2957  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
2958  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
2959  %lo = extractelement <2 x half> %a, i32 0
2960  %neg.lo = fsub half -0.0, %lo
2961  %neg.lo.vec = insertelement <2 x half> %a, half %neg.lo, i32 0
2962  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.lo.vec, <2 x half> zeroinitializer)
2963  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
2964
2965  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
2966  ret void
2967}
2968
2969define amdgpu_kernel void @v_clamp_neghi_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
2970; GFX6-LABEL: v_clamp_neghi_v2f16:
2971; GFX6:       ; %bb.0:
2972; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2973; GFX6-NEXT:    s_mov_b32 s7, 0xf000
2974; GFX6-NEXT:    s_mov_b32 s6, 0
2975; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
2976; GFX6-NEXT:    v_mov_b32_e32 v1, 0
2977; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
2978; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
2979; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
2980; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
2981; GFX6-NEXT:    s_waitcnt vmcnt(0)
2982; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
2983; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, -v3 clamp
2984; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
2985; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
2986; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
2987; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
2988; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
2989; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
2990; GFX6-NEXT:    s_endpgm
2991;
2992; GFX8-LABEL: v_clamp_neghi_v2f16:
2993; GFX8:       ; %bb.0:
2994; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2995; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
2996; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
2997; GFX8-NEXT:    v_mov_b32_e32 v1, s3
2998; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
2999; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3000; GFX8-NEXT:    flat_load_dword v3, v[0:1]
3001; GFX8-NEXT:    v_mov_b32_e32 v1, s1
3002; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
3003; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3004; GFX8-NEXT:    s_waitcnt vmcnt(0)
3005; GFX8-NEXT:    v_max_f16_sdwa v2, -v3, -v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
3006; GFX8-NEXT:    v_max_f16_e64 v3, v3, v3 clamp
3007; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
3008; GFX8-NEXT:    flat_store_dword v[0:1], v2
3009; GFX8-NEXT:    s_endpgm
3010;
3011; GFX9-LABEL: v_clamp_neghi_v2f16:
3012; GFX9:       ; %bb.0:
3013; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3014; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3015; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3016; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
3017; GFX9-NEXT:    s_waitcnt vmcnt(0)
3018; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 neg_hi:[1,1] clamp
3019; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
3020; GFX9-NEXT:    s_endpgm
3021;
3022; GFX11-LABEL: v_clamp_neghi_v2f16:
3023; GFX11:       ; %bb.0:
3024; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
3025; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3026; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3027; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
3028; GFX11-NEXT:    s_waitcnt vmcnt(0)
3029; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 neg_hi:[1,1] clamp
3030; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
3031; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3032; GFX11-NEXT:    s_endpgm
3033  %tid = call i32 @llvm.amdgcn.workitem.id.x()
3034  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
3035  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
3036  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
3037  %hi = extractelement <2 x half> %a, i32 1
3038  %neg.hi = fsub half -0.0, %hi
3039  %neg.hi.vec = insertelement <2 x half> %a, half %neg.hi, i32 1
3040  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.hi.vec, <2 x half> zeroinitializer)
3041  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
3042
3043  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
3044  ret void
3045}
3046
3047define amdgpu_kernel void @v_clamp_v2f16_shuffle(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
3048; GFX6-LABEL: v_clamp_v2f16_shuffle:
3049; GFX6:       ; %bb.0:
3050; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
3051; GFX6-NEXT:    s_mov_b32 s7, 0xf000
3052; GFX6-NEXT:    s_mov_b32 s6, 0
3053; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3054; GFX6-NEXT:    v_mov_b32_e32 v1, 0
3055; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
3056; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
3057; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
3058; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
3059; GFX6-NEXT:    s_waitcnt vmcnt(0)
3060; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
3061; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp
3062; GFX6-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp
3063; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
3064; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
3065; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
3066; GFX6-NEXT:    v_or_b32_e32 v2, v3, v2
3067; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
3068; GFX6-NEXT:    s_endpgm
3069;
3070; GFX8-LABEL: v_clamp_v2f16_shuffle:
3071; GFX8:       ; %bb.0:
3072; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3073; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
3074; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
3075; GFX8-NEXT:    v_mov_b32_e32 v1, s3
3076; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
3077; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3078; GFX8-NEXT:    flat_load_dword v3, v[0:1]
3079; GFX8-NEXT:    v_mov_b32_e32 v1, s1
3080; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
3081; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3082; GFX8-NEXT:    s_waitcnt vmcnt(0)
3083; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3084; GFX8-NEXT:    v_max_f16_sdwa v3, v3, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
3085; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
3086; GFX8-NEXT:    flat_store_dword v[0:1], v2
3087; GFX8-NEXT:    s_endpgm
3088;
3089; GFX9-LABEL: v_clamp_v2f16_shuffle:
3090; GFX9:       ; %bb.0:
3091; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3092; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3093; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3094; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
3095; GFX9-NEXT:    s_waitcnt vmcnt(0)
3096; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 op_sel:[1,1] op_sel_hi:[0,0] clamp
3097; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
3098; GFX9-NEXT:    s_endpgm
3099;
3100; GFX11-LABEL: v_clamp_v2f16_shuffle:
3101; GFX11:       ; %bb.0:
3102; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
3103; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3104; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3105; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
3106; GFX11-NEXT:    s_waitcnt vmcnt(0)
3107; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 op_sel:[1,1] op_sel_hi:[0,0] clamp
3108; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
3109; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3110; GFX11-NEXT:    s_endpgm
3111  %tid = call i32 @llvm.amdgcn.workitem.id.x()
3112  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
3113  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
3114  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
3115  %shuf = shufflevector <2 x half> %a, <2 x half> undef, <2 x i32> <i32 1, i32 0>
3116  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %shuf, <2 x half> zeroinitializer)
3117  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
3118
3119  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
3120  ret void
3121}
3122
3123define amdgpu_kernel void @v_clamp_v2f16_undef_limit_elts0(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
3124; GFX6-LABEL: v_clamp_v2f16_undef_limit_elts0:
3125; GFX6:       ; %bb.0:
3126; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
3127; GFX6-NEXT:    s_mov_b32 s7, 0xf000
3128; GFX6-NEXT:    s_mov_b32 s6, 0
3129; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3130; GFX6-NEXT:    v_mov_b32_e32 v1, 0
3131; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
3132; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
3133; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
3134; GFX6-NEXT:    s_mov_b32 s2, 0x7fc00000
3135; GFX6-NEXT:    s_waitcnt vmcnt(0)
3136; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
3137; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
3138; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
3139; GFX6-NEXT:    v_mul_f32_e32 v3, 1.0, v3
3140; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
3141; GFX6-NEXT:    v_med3_f32 v3, v3, s2, 1.0
3142; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
3143; GFX6-NEXT:    v_med3_f32 v2, v2, 0, s2
3144; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
3145; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
3146; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
3147; GFX6-NEXT:    v_or_b32_e32 v2, v2, v3
3148; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
3149; GFX6-NEXT:    s_endpgm
3150;
3151; GFX8-LABEL: v_clamp_v2f16_undef_limit_elts0:
3152; GFX8:       ; %bb.0:
3153; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3154; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
3155; GFX8-NEXT:    v_mov_b32_e32 v4, 0x3c00
3156; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
3157; GFX8-NEXT:    v_mov_b32_e32 v1, s3
3158; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
3159; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3160; GFX8-NEXT:    flat_load_dword v3, v[0:1]
3161; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
3162; GFX8-NEXT:    v_mov_b32_e32 v1, s1
3163; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3164; GFX8-NEXT:    s_waitcnt vmcnt(0)
3165; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
3166; GFX8-NEXT:    v_max_f16_e32 v3, v3, v3
3167; GFX8-NEXT:    v_max_f16_e32 v2, 0x7e00, v2
3168; GFX8-NEXT:    v_max_f16_e32 v3, 0, v3
3169; GFX8-NEXT:    v_min_f16_e32 v3, 0x7e00, v3
3170; GFX8-NEXT:    v_min_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3171; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
3172; GFX8-NEXT:    flat_store_dword v[0:1], v2
3173; GFX8-NEXT:    s_endpgm
3174;
3175; GFX9-LABEL: v_clamp_v2f16_undef_limit_elts0:
3176; GFX9:       ; %bb.0:
3177; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3178; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3179; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3180; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
3181; GFX9-NEXT:    s_waitcnt vmcnt(0)
3182; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
3183; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
3184; GFX9-NEXT:    s_endpgm
3185;
3186; GFX11-LABEL: v_clamp_v2f16_undef_limit_elts0:
3187; GFX11:       ; %bb.0:
3188; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
3189; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3190; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3191; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
3192; GFX11-NEXT:    s_waitcnt vmcnt(0)
3193; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
3194; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
3195; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3196; GFX11-NEXT:    s_endpgm
3197  %tid = call i32 @llvm.amdgcn.workitem.id.x()
3198  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
3199  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
3200  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
3201  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half 0.0, half undef>)
3202  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half undef, half 1.0>)
3203
3204  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
3205  ret void
3206}
3207
3208define amdgpu_kernel void @v_clamp_v2f16_undef_limit_elts1(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
3209; GFX6-LABEL: v_clamp_v2f16_undef_limit_elts1:
3210; GFX6:       ; %bb.0:
3211; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
3212; GFX6-NEXT:    s_mov_b32 s7, 0xf000
3213; GFX6-NEXT:    s_mov_b32 s6, 0
3214; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3215; GFX6-NEXT:    v_mov_b32_e32 v1, 0
3216; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
3217; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]
3218; GFX6-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
3219; GFX6-NEXT:    s_mov_b32 s2, 0x7fc00000
3220; GFX6-NEXT:    s_waitcnt vmcnt(0)
3221; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v2
3222; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 16, v2
3223; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
3224; GFX6-NEXT:    v_mul_f32_e32 v3, 1.0, v3
3225; GFX6-NEXT:    v_max_f32_e32 v3, 0x7fc00000, v3
3226; GFX6-NEXT:    v_mul_f32_e32 v2, 1.0, v2
3227; GFX6-NEXT:    v_med3_f32 v2, v2, 0, s2
3228; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
3229; GFX6-NEXT:    v_min_f32_e32 v3, 1.0, v3
3230; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
3231; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]
3232; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
3233; GFX6-NEXT:    v_or_b32_e32 v2, v3, v2
3234; GFX6-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
3235; GFX6-NEXT:    s_endpgm
3236;
3237; GFX8-LABEL: v_clamp_v2f16_undef_limit_elts1:
3238; GFX8:       ; %bb.0:
3239; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3240; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
3241; GFX8-NEXT:    v_mov_b32_e32 v4, 0x7e00
3242; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
3243; GFX8-NEXT:    v_mov_b32_e32 v1, s3
3244; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
3245; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3246; GFX8-NEXT:    flat_load_dword v3, v[0:1]
3247; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
3248; GFX8-NEXT:    v_mov_b32_e32 v1, s1
3249; GFX8-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
3250; GFX8-NEXT:    s_waitcnt vmcnt(0)
3251; GFX8-NEXT:    v_max_f16_sdwa v2, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
3252; GFX8-NEXT:    v_max_f16_e32 v3, v3, v3
3253; GFX8-NEXT:    v_max_f16_e32 v2, 0, v2
3254; GFX8-NEXT:    v_max_f16_e32 v3, 0x7e00, v3
3255; GFX8-NEXT:    v_min_f16_e32 v3, 1.0, v3
3256; GFX8-NEXT:    v_min_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3257; GFX8-NEXT:    v_or_b32_e32 v2, v3, v2
3258; GFX8-NEXT:    flat_store_dword v[0:1], v2
3259; GFX8-NEXT:    s_endpgm
3260;
3261; GFX9-LABEL: v_clamp_v2f16_undef_limit_elts1:
3262; GFX9:       ; %bb.0:
3263; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3264; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3265; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3266; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
3267; GFX9-NEXT:    s_waitcnt vmcnt(0)
3268; GFX9-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
3269; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
3270; GFX9-NEXT:    s_endpgm
3271;
3272; GFX11-LABEL: v_clamp_v2f16_undef_limit_elts1:
3273; GFX11:       ; %bb.0:
3274; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
3275; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
3276; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3277; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
3278; GFX11-NEXT:    s_waitcnt vmcnt(0)
3279; GFX11-NEXT:    v_pk_max_f16 v1, v1, v1 clamp
3280; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
3281; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3282; GFX11-NEXT:    s_endpgm
3283  %tid = call i32 @llvm.amdgcn.workitem.id.x()
3284  %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
3285  %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid
3286  %a = load <2 x half>, <2 x half> addrspace(1)* %gep0
3287  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half undef, half 0.0>)
3288  %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half undef>)
3289
3290  store <2 x half> %med, <2 x half> addrspace(1)* %out.gep
3291  ret void
3292}
3293
3294define amdgpu_kernel void @v_clamp_diff_source_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0
3295; GFX6-LABEL: v_clamp_diff_source_f32:
3296; GFX6:       ; %bb.0:
3297; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
3298; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
3299; GFX6-NEXT:    s_load_dwordx2 s[4:5], s[2:3], 0x0
3300; GFX6-NEXT:    s_load_dword s2, s[2:3], 0x2
3301; GFX6-NEXT:    s_mov_b32 s3, 0xf000
3302; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
3303; GFX6-NEXT:    v_mov_b32_e32 v0, s5
3304; GFX6-NEXT:    v_mov_b32_e32 v1, s2
3305; GFX6-NEXT:    v_add_f32_e32 v0, s4, v0
3306; GFX6-NEXT:    v_add_f32_e32 v1, s4, v1
3307; GFX6-NEXT:    v_max_f32_e64 v0, v0, v1 clamp
3308; GFX6-NEXT:    s_mov_b32 s2, -1
3309; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0 offset:12
3310; GFX6-NEXT:    s_endpgm
3311;
3312; GFX8-LABEL: v_clamp_diff_source_f32:
3313; GFX8:       ; %bb.0:
3314; GFX8-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3315; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
3316; GFX8-NEXT:    s_load_dwordx2 s[4:5], s[2:3], 0x0
3317; GFX8-NEXT:    s_load_dword s2, s[2:3], 0x8
3318; GFX8-NEXT:    s_add_u32 s0, s0, 12
3319; GFX8-NEXT:    s_addc_u32 s1, s1, 0
3320; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
3321; GFX8-NEXT:    v_mov_b32_e32 v0, s5
3322; GFX8-NEXT:    v_mov_b32_e32 v1, s2
3323; GFX8-NEXT:    v_add_f32_e32 v0, s4, v0
3324; GFX8-NEXT:    v_add_f32_e32 v1, s4, v1
3325; GFX8-NEXT:    v_max_f32_e64 v2, v0, v1 clamp
3326; GFX8-NEXT:    v_mov_b32_e32 v0, s0
3327; GFX8-NEXT:    v_mov_b32_e32 v1, s1
3328; GFX8-NEXT:    flat_store_dword v[0:1], v2
3329; GFX8-NEXT:    s_endpgm
3330;
3331; GFX9-LABEL: v_clamp_diff_source_f32:
3332; GFX9:       ; %bb.0:
3333; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
3334; GFX9-NEXT:    v_mov_b32_e32 v0, 0
3335; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3336; GFX9-NEXT:    s_load_dwordx2 s[4:5], s[2:3], 0x0
3337; GFX9-NEXT:    s_load_dword s6, s[2:3], 0x8
3338; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
3339; GFX9-NEXT:    v_mov_b32_e32 v1, s5
3340; GFX9-NEXT:    v_mov_b32_e32 v2, s6
3341; GFX9-NEXT:    v_add_f32_e32 v1, s4, v1
3342; GFX9-NEXT:    v_add_f32_e32 v2, s4, v2
3343; GFX9-NEXT:    v_max_f32_e64 v1, v1, v2 clamp
3344; GFX9-NEXT:    global_store_dword v0, v1, s[0:1] offset:12
3345; GFX9-NEXT:    s_endpgm
3346;
3347; GFX11-LABEL: v_clamp_diff_source_f32:
3348; GFX11:       ; %bb.0:
3349; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
3350; GFX11-NEXT:    v_mov_b32_e32 v2, 0
3351; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3352; GFX11-NEXT:    s_clause 0x1
3353; GFX11-NEXT:    s_load_b64 s[4:5], s[2:3], 0x0
3354; GFX11-NEXT:    s_load_b32 s2, s[2:3], 0x8
3355; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
3356; GFX11-NEXT:    v_add_f32_e64 v0, s4, s5
3357; GFX11-NEXT:    v_add_f32_e64 v1, s4, s2
3358; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3359; GFX11-NEXT:    v_max_f32_e64 v0, v0, v1 clamp
3360; GFX11-NEXT:    global_store_b32 v2, v0, s[0:1] offset:12
3361; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3362; GFX11-NEXT:    s_endpgm
3363{
3364  %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 0
3365  %gep1 = getelementptr float, float addrspace(1)* %aptr, i32 1
3366  %gep2 = getelementptr float, float addrspace(1)* %aptr, i32 2
3367  %l0 = load float, float addrspace(1)* %gep0
3368  %l1 = load float, float addrspace(1)* %gep1
3369  %l2 = load float, float addrspace(1)* %gep2
3370  %a = fadd nsz float %l0, %l1
3371  %b = fadd nsz float %l0, %l2
3372  %res = call nsz float @llvm.maxnum.f32(float %a, float %b)
3373  %max = call nsz float @llvm.maxnum.f32(float %res, float 0.0)
3374  %min = call nsz float @llvm.minnum.f32(float %max, float 1.0)
3375  %out.gep = getelementptr float, float addrspace(1)* %out, i32 3
3376  store float %min, float addrspace(1)* %out.gep
3377  ret void
3378}
3379
3380declare i32 @llvm.amdgcn.workitem.id.x() #1
3381declare float @llvm.fabs.f32(float) #1
3382declare float @llvm.minnum.f32(float, float) #1
3383declare float @llvm.maxnum.f32(float, float) #1
3384declare float @llvm.amdgcn.fmed3.f32(float, float, float) #1
3385declare double @llvm.fabs.f64(double) #1
3386declare double @llvm.minnum.f64(double, double) #1
3387declare double @llvm.maxnum.f64(double, double) #1
3388declare half @llvm.fabs.f16(half) #1
3389declare half @llvm.minnum.f16(half, half) #1
3390declare half @llvm.maxnum.f16(half, half) #1
3391declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
3392declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>) #1
3393declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>) #1
3394
3395attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
3396attributes #1 = { nounwind readnone }
3397attributes #2 = { nounwind "amdgpu-dx10-clamp"="false" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-nans-fp-math"="false" }
3398attributes #3 = { nounwind "amdgpu-dx10-clamp"="true" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-nans-fp-math"="false" }
3399attributes #4 = { nounwind "amdgpu-dx10-clamp"="false" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-nans-fp-math"="false" }
3400