1; RUN: opt -S -mtriple=amdgcn-- -amdgpu-codegenprepare %s | FileCheck %s 2; RUN: opt -S -amdgpu-codegenprepare %s | FileCheck -check-prefix=NOOP %s 3; Make sure this doesn't crash with no triple 4 5; NOOP-LABEL: @noop_fdiv_fpmath( 6; NOOP: %md.25ulp = fdiv float %a, %b, !fpmath !0 7define amdgpu_kernel void @noop_fdiv_fpmath(float addrspace(1)* %out, float %a, float %b) #3 { 8 %md.25ulp = fdiv float %a, %b, !fpmath !0 9 store volatile float %md.25ulp, float addrspace(1)* %out 10 ret void 11} 12 13; CHECK-LABEL: @fdiv_fpmath( 14; CHECK: %no.md = fdiv float %a, %b{{$}} 15; CHECK: %md.half.ulp = fdiv float %a, %b, !fpmath !1 16; CHECK: %md.1ulp = fdiv float %a, %b, !fpmath !2 17; CHECK: %md.25ulp = call float @llvm.amdgcn.fdiv.fast(float %a, float %b), !fpmath !0 18; CHECK: %md.3ulp = call float @llvm.amdgcn.fdiv.fast(float %a, float %b), !fpmath !3 19; CHECK: %[[FAST_RCP:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %b) 20; CHECK: %fast.md.25ulp = fmul fast float %a, %[[FAST_RCP]], !fpmath !0 21; CHECK: %[[ARCP_RCP:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %b) 22; CHECK: arcp.md.25ulp = fmul arcp float %a, %[[ARCP_RCP]], !fpmath !0 23define amdgpu_kernel void @fdiv_fpmath(float addrspace(1)* %out, float %a, float %b) #1 { 24 %no.md = fdiv float %a, %b 25 store volatile float %no.md, float addrspace(1)* %out 26 27 %md.half.ulp = fdiv float %a, %b, !fpmath !1 28 store volatile float %md.half.ulp, float addrspace(1)* %out 29 30 %md.1ulp = fdiv float %a, %b, !fpmath !2 31 store volatile float %md.1ulp, float addrspace(1)* %out 32 33 %md.25ulp = fdiv float %a, %b, !fpmath !0 34 store volatile float %md.25ulp, float addrspace(1)* %out 35 36 %md.3ulp = fdiv float %a, %b, !fpmath !3 37 store volatile float %md.3ulp, float addrspace(1)* %out 38 39 %fast.md.25ulp = fdiv fast float %a, %b, !fpmath !0 40 store volatile float %fast.md.25ulp, float addrspace(1)* %out 41 42 %arcp.md.25ulp = fdiv arcp float %a, %b, !fpmath !0 43 store volatile float %arcp.md.25ulp, float addrspace(1)* %out 44 45 ret void 46} 47 48; CHECK-LABEL: @rcp_fdiv_fpmath( 49; CHECK: %no.md = fdiv float 1.000000e+00, %x{{$}} 50; CHECK: %md.25ulp = call float @llvm.amdgcn.rcp.f32(float %x) 51; CHECK: %md.half.ulp = fdiv float 1.000000e+00, %x, !fpmath !1 52; CHECK: %arcp.no.md = fdiv arcp float 1.000000e+00, %x 53; CHECK: %arcp.25ulp = call arcp float @llvm.amdgcn.rcp.f32(float %x) 54; CHECK: %fast.no.md = call fast float @llvm.amdgcn.rcp.f32(float %x) 55; CHECK: %fast.25ulp = call fast float @llvm.amdgcn.rcp.f32(float %x) 56define amdgpu_kernel void @rcp_fdiv_fpmath(float addrspace(1)* %out, float %x) #1 { 57 %no.md = fdiv float 1.0, %x 58 store volatile float %no.md, float addrspace(1)* %out 59 60 %md.25ulp = fdiv float 1.0, %x, !fpmath !0 61 store volatile float %md.25ulp, float addrspace(1)* %out 62 63 %md.half.ulp = fdiv float 1.0, %x, !fpmath !1 64 store volatile float %md.half.ulp, float addrspace(1)* %out 65 66 %arcp.no.md = fdiv arcp float 1.0, %x 67 store volatile float %arcp.no.md, float addrspace(1)* %out 68 69 %arcp.25ulp = fdiv arcp float 1.0, %x, !fpmath !0 70 store volatile float %arcp.25ulp, float addrspace(1)* %out 71 72 %fast.no.md = fdiv fast float 1.0, %x 73 store volatile float %fast.no.md, float addrspace(1)* %out 74 75 %fast.25ulp = fdiv fast float 1.0, %x, !fpmath !0 76 store volatile float %fast.25ulp, float addrspace(1)* %out 77 78 ret void 79} 80 81; CHECK-LABEL: @rcp_fdiv_arcp_denormal( 82; CHECK: %arcp.low.accuracy = call arcp float @llvm.amdgcn.fdiv.fast(float 1.000000e+00, float %x), !fpmath !0 83; CHECK: %arcp.high.accuracy = fdiv arcp float 1.000000e+00, %x, !fpmath !2 84; CHECK: %arcp.low.afn = call arcp afn float @llvm.amdgcn.rcp.f32(float %x) 85; CHECK: %arcp.high.afn = call arcp afn float @llvm.amdgcn.rcp.f32(float %x) 86define amdgpu_kernel void @rcp_fdiv_arcp_denormal(float addrspace(1)* %out, float %x) #2 { 87 88 %arcp.low.accuracy = fdiv arcp float 1.0, %x, !fpmath !0 89 store volatile float %arcp.low.accuracy, float addrspace(1)* %out 90 91 %arcp.high.accuracy = fdiv arcp float 1.0, %x, !fpmath !2 92 store volatile float %arcp.high.accuracy, float addrspace(1)* %out 93 94 %arcp.low.afn = fdiv arcp afn float 1.0, %x, !fpmath !0 95 store volatile float %arcp.low.afn, float addrspace(1)* %out 96 97 %arcp.high.afn = fdiv arcp afn float 1.0, %x, !fpmath !2 98 store volatile float %arcp.high.afn, float addrspace(1)* %out 99 100 ret void 101} 102 103; CHECK-LABEL: @fdiv_fpmath_vector( 104; CHECK: %[[NO_A0:[0-9]+]] = extractelement <2 x float> %a, i64 0 105; CHECK: %[[NO_B0:[0-9]+]] = extractelement <2 x float> %b, i64 0 106; CHECK: %[[NO_FDIV0:[0-9]+]] = fdiv float %[[NO_A0]], %[[NO_B0]] 107; CHECK: %[[NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[NO_FDIV0]], i64 0 108; CHECK: %[[NO_A1:[0-9]+]] = extractelement <2 x float> %a, i64 1 109; CHECK: %[[NO_B1:[0-9]+]] = extractelement <2 x float> %b, i64 1 110; CHECK: %[[NO_FDIV1:[0-9]+]] = fdiv float %[[NO_A1]], %[[NO_B1]] 111; CHECK: %no.md = insertelement <2 x float> %[[NO_INS0]], float %[[NO_FDIV1]], i64 1 112; CHECK: store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 113 114; CHECK: %[[HALF_A0:[0-9]+]] = extractelement <2 x float> %a, i64 0 115; CHECK: %[[HALF_B0:[0-9]+]] = extractelement <2 x float> %b, i64 0 116; CHECK: %[[HALF_FDIV0:[0-9]+]] = fdiv float %[[HALF_A0]], %[[HALF_B0]], !fpmath !1 117; CHECK: %[[HALF_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[HALF_FDIV0]], i64 0 118; CHECK: %[[HALF_A1:[0-9]+]] = extractelement <2 x float> %a, i64 1 119; CHECK: %[[HALF_B1:[0-9]+]] = extractelement <2 x float> %b, i64 1 120; CHECK: %[[HALF_FDIV1:[0-9]+]] = fdiv float %[[HALF_A1]], %[[HALF_B1]], !fpmath !1 121; CHECK: %md.half.ulp = insertelement <2 x float> %[[HALF_INS0]], float %[[HALF_FDIV1]], i64 1 122; CHECK: store volatile <2 x float> %md.half.ulp, <2 x float> addrspace(1)* %out 123 124; CHECK: %[[ONE_A0:[0-9]+]] = extractelement <2 x float> %a, i64 0 125; CHECK: %[[ONE_B0:[0-9]+]] = extractelement <2 x float> %b, i64 0 126; CHECK: %[[ONE_FDIV0:[0-9]+]] = fdiv float %[[ONE_A0]], %[[ONE_B0]], !fpmath !2 127; CHECK: %[[ONE_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ONE_FDIV0]], i64 0 128; CHECK: %[[ONE_A1:[0-9]+]] = extractelement <2 x float> %a, i64 1 129; CHECK: %[[ONE_B1:[0-9]+]] = extractelement <2 x float> %b, i64 1 130; CHECK: %[[ONE_FDIV1:[0-9]+]] = fdiv float %[[ONE_A1]], %[[ONE_B1]], !fpmath !2 131; CHECK: %md.1ulp = insertelement <2 x float> %[[ONE_INS0]], float %[[ONE_FDIV1]], i64 1 132; CHECK: store volatile <2 x float> %md.1ulp, <2 x float> addrspace(1)* %out 133 134; CHECK: %[[A0:[0-9]+]] = extractelement <2 x float> %a, i64 0 135; CHECK: %[[B0:[0-9]+]] = extractelement <2 x float> %b, i64 0 136; CHECK: %[[FDIV0:[0-9]+]] = call float @llvm.amdgcn.fdiv.fast(float %[[A0]], float %[[B0]]), !fpmath !0 137; CHECK: %[[INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FDIV0]], i64 0 138; CHECK: %[[A1:[0-9]+]] = extractelement <2 x float> %a, i64 1 139; CHECK: %[[B1:[0-9]+]] = extractelement <2 x float> %b, i64 1 140; CHECK: %[[FDIV1:[0-9]+]] = call float @llvm.amdgcn.fdiv.fast(float %[[A1]], float %[[B1]]), !fpmath !0 141; CHECK: %md.25ulp = insertelement <2 x float> %[[INS0]], float %[[FDIV1]], i64 1 142define amdgpu_kernel void @fdiv_fpmath_vector(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) #1 { 143 %no.md = fdiv <2 x float> %a, %b 144 store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 145 146 %md.half.ulp = fdiv <2 x float> %a, %b, !fpmath !1 147 store volatile <2 x float> %md.half.ulp, <2 x float> addrspace(1)* %out 148 149 %md.1ulp = fdiv <2 x float> %a, %b, !fpmath !2 150 store volatile <2 x float> %md.1ulp, <2 x float> addrspace(1)* %out 151 152 %md.25ulp = fdiv <2 x float> %a, %b, !fpmath !0 153 store volatile <2 x float> %md.25ulp, <2 x float> addrspace(1)* %out 154 155 ret void 156} 157 158; CHECK-LABEL: @rcp_fdiv_fpmath_vector( 159; CHECK: %[[NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 160; CHECK: %[[NO_FDIV0:[0-9]+]] = fdiv float 1.000000e+00, %[[NO0]] 161; CHECK: %[[NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[NO_FDIV0]], i64 0 162; CHECK: %[[NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 163; CHECK: %[[NO_FDIV1:[0-9]+]] = fdiv float 1.000000e+00, %[[NO1]] 164; CHECK: %no.md = insertelement <2 x float> %[[NO_INS0]], float %[[NO_FDIV1]], i64 1 165; CHECK: store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 166 167; CHECK: %[[HALF0:[0-9]+]] = extractelement <2 x float> %x, i64 0 168; CHECK: %[[HALF_FDIV0:[0-9]+]] = fdiv float 1.000000e+00, %[[HALF0]], !fpmath !1 169; CHECK: %[[HALF_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[HALF_FDIV0]], i64 0 170; CHECK: %[[HALF1:[0-9]+]] = extractelement <2 x float> %x, i64 1 171; CHECK: %[[HALF_FDIV1:[0-9]+]] = fdiv float 1.000000e+00, %[[HALF1]], !fpmath !1 172; CHECK: %md.half.ulp = insertelement <2 x float> %[[HALF_INS0]], float %[[HALF_FDIV1]], i64 1 173; CHECK: store volatile <2 x float> %md.half.ulp, <2 x float> addrspace(1)* %out 174 175; CHECK: %[[ARCP_NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 176; CHECK: %[[ARCP_NO_FDIV0:[0-9]+]] = fdiv arcp float 1.000000e+00, %[[ARCP_NO0]] 177; CHECK: %[[ARCP_NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ARCP_NO_FDIV0]], i64 0 178; CHECK: %[[ARCP_NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 179; CHECK: %[[ARCP_NO_FDIV1:[0-9]+]] = fdiv arcp float 1.000000e+00, %[[ARCP_NO1]] 180; CHECK: %arcp.no.md = insertelement <2 x float> %[[ARCP_NO_INS0]], float %[[ARCP_NO_FDIV1]], i64 1 181; CHECK: store volatile <2 x float> %arcp.no.md, <2 x float> addrspace(1)* %out 182 183; CHECK: %[[FAST_NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 184; CHECK: %[[FAST_NO_RCP0:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_NO0]]) 185; CHECK: %[[FAST_NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FAST_NO_RCP0]], i64 0 186; CHECK: %[[FAST_NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 187; CHECK: %[[FAST_NO_RCP1:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_NO1]]) 188; CHECK: %fast.no.md = insertelement <2 x float> %[[FAST_NO_INS0]], float %[[FAST_NO_RCP1]], i64 1 189; CHECK: store volatile <2 x float> %fast.no.md, <2 x float> addrspace(1)* %out 190 191; CHECK: %[[ARCP_250:[0-9]+]] = extractelement <2 x float> %x, i64 0 192; CHECK: %[[ARCP_25_RCP0:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_250]]) 193; CHECK: %[[ARCP_25_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ARCP_25_RCP0]], i64 0 194; CHECK: %[[ARCP_251:[0-9]+]] = extractelement <2 x float> %x, i64 1 195; CHECK: %[[ARCP_25_RCP1:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_251]]) 196; CHECK: %arcp.25ulp = insertelement <2 x float> %[[ARCP_25_INS0]], float %[[ARCP_25_RCP1]], i64 1 197; CHECK: store volatile <2 x float> %arcp.25ulp, <2 x float> addrspace(1)* %out 198 199; CHECK: %[[FAST_250:[0-9]+]] = extractelement <2 x float> %x, i64 0 200; CHECK: %[[FAST_25_RCP0:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_250]]) 201; CHECK: %[[FAST_25_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FAST_25_RCP0]], i64 0 202; CHECK: %[[FAST_251:[0-9]+]] = extractelement <2 x float> %x, i64 1 203; CHECK: %[[FAST_25_RCP1:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_251]]) 204; CHECK: %fast.25ulp = insertelement <2 x float> %[[FAST_25_INS0]], float %[[FAST_25_RCP1]], i64 1 205; CHECK: store volatile <2 x float> %fast.25ulp, <2 x float> addrspace(1)* %out 206define amdgpu_kernel void @rcp_fdiv_fpmath_vector(<2 x float> addrspace(1)* %out, <2 x float> %x) #1 { 207 %no.md = fdiv <2 x float> <float 1.0, float 1.0>, %x 208 store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 209 210 %md.half.ulp = fdiv <2 x float> <float 1.0, float 1.0>, %x, !fpmath !1 211 store volatile <2 x float> %md.half.ulp, <2 x float> addrspace(1)* %out 212 213 %arcp.no.md = fdiv arcp <2 x float> <float 1.0, float 1.0>, %x 214 store volatile <2 x float> %arcp.no.md, <2 x float> addrspace(1)* %out 215 216 %fast.no.md = fdiv fast <2 x float> <float 1.0, float 1.0>, %x 217 store volatile <2 x float> %fast.no.md, <2 x float> addrspace(1)* %out 218 219 %arcp.25ulp = fdiv arcp <2 x float> <float 1.0, float 1.0>, %x, !fpmath !0 220 store volatile <2 x float> %arcp.25ulp, <2 x float> addrspace(1)* %out 221 222 %fast.25ulp = fdiv fast <2 x float> <float 1.0, float 1.0>, %x, !fpmath !0 223 store volatile <2 x float> %fast.25ulp, <2 x float> addrspace(1)* %out 224 225 ret void 226} 227 228; CHECK-LABEL: @rcp_fdiv_fpmath_vector_nonsplat( 229; CHECK: %[[NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 230; CHECK: %[[NO_FDIV0:[0-9]+]] = fdiv float 1.000000e+00, %[[NO0]] 231; CHECK: %[[NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[NO_FDIV0]], i64 0 232; CHECK: %[[NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 233; CHECK: %[[NO_FDIV1:[0-9]+]] = fdiv float 2.000000e+00, %[[NO1]] 234; CHECK: %no.md = insertelement <2 x float> %[[NO_INS0]], float %[[NO_FDIV1]], i64 1 235; CHECK: store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 236 237; CHECK: %[[ARCP_NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 238; CHECK: %[[ARCP_NO_FDIV0:[0-9]+]] = fdiv arcp float 1.000000e+00, %[[ARCP_NO0]] 239; CHECK: %[[ARCP_NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ARCP_NO_FDIV0]], i64 0 240; CHECK: %[[ARCP_NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 241; CHECK: %[[ARCP_NO_FDIV1:[0-9]+]] = fdiv arcp float 2.000000e+00, %[[ARCP_NO1]] 242; CHECK: %arcp.no.md = insertelement <2 x float> %[[ARCP_NO_INS0]], float %[[ARCP_NO_FDIV1]], i64 1 243; CHECK: store volatile <2 x float> %arcp.no.md, <2 x float> addrspace(1)* %out 244 245; CHECK: %[[FAST_NO0:[0-9]+]] = extractelement <2 x float> %x, i64 0 246; CHECK: %[[FAST_NO_RCP0:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_NO0]]) 247; CHECK: %[[FAST_NO_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FAST_NO_RCP0]], i64 0 248; CHECK: %[[FAST_NO1:[0-9]+]] = extractelement <2 x float> %x, i64 1 249; CHECK: %[[FAST_NO_RCP1:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_NO1]]) 250; CHECK: %[[FAST_NO_MUL1:[0-9]+]] = fmul fast float 2.000000e+00, %[[FAST_NO_RCP1]] 251; CHECK: %fast.no.md = insertelement <2 x float> %[[FAST_NO_INS0]], float %[[FAST_NO_MUL1]], i64 1 252; CHECK: store volatile <2 x float> %fast.no.md, <2 x float> addrspace(1)* %out 253 254; CHECK: %[[ARCP_250:[0-9]+]] = extractelement <2 x float> %x, i64 0 255; CHECK: %[[ARCP_25_RCP0:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_250]]) 256; CHECK: %[[ARCP_25_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ARCP_25_RCP0]], i64 0 257; CHECK: %[[ARCP_251:[0-9]+]] = extractelement <2 x float> %x, i64 1 258; CHECK: %[[ARCP_25_RCP1:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_251]]) 259; CHECK: %[[ARCP_25_MUL1:[0-9]+]] = fmul arcp float 2.000000e+00, %[[ARCP_25_RCP1]] 260; CHECK: %arcp.25ulp = insertelement <2 x float> %[[ARCP_25_INS0]], float %[[ARCP_25_MUL1]], i64 1 261; CHECK: store volatile <2 x float> %arcp.25ulp, <2 x float> addrspace(1)* %out 262 263; CHECK: %[[FAST_250:[0-9]+]] = extractelement <2 x float> %x, i64 0 264; CHECK: %[[FAST_25_RCP0:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_250]]) 265; CHECK: %[[FAST_25_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FAST_25_RCP0]], i64 0 266; CHECK: %[[FAST_251:[0-9]+]] = extractelement <2 x float> %x, i64 1 267; CHECK: %[[FAST_25_RCP1:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_251]]) 268; CHECK: %[[FAST_25_MUL1:[0-9]+]] = fmul fast float 2.000000e+00, %[[FAST_25_RCP1]] 269; CHECK: %fast.25ulp = insertelement <2 x float> %[[FAST_25_INS0]], float %[[FAST_25_MUL1]], i64 1 270; CHECK: store volatile <2 x float> %fast.25ulp, <2 x float> addrspace(1)* %out 271define amdgpu_kernel void @rcp_fdiv_fpmath_vector_nonsplat(<2 x float> addrspace(1)* %out, <2 x float> %x) #1 { 272 %no.md = fdiv <2 x float> <float 1.0, float 2.0>, %x 273 store volatile <2 x float> %no.md, <2 x float> addrspace(1)* %out 274 275 %arcp.no.md = fdiv arcp <2 x float> <float 1.0, float 2.0>, %x 276 store volatile <2 x float> %arcp.no.md, <2 x float> addrspace(1)* %out 277 278 %fast.no.md = fdiv fast <2 x float> <float 1.0, float 2.0>, %x 279 store volatile <2 x float> %fast.no.md, <2 x float> addrspace(1)* %out 280 281 %arcp.25ulp = fdiv arcp <2 x float> <float 1.0, float 2.0>, %x, !fpmath !0 282 store volatile <2 x float> %arcp.25ulp, <2 x float> addrspace(1)* %out 283 284 %fast.25ulp = fdiv fast <2 x float> <float 1.0, float 2.0>, %x, !fpmath !0 285 store volatile <2 x float> %fast.25ulp, <2 x float> addrspace(1)* %out 286 287 ret void 288} 289 290; CHECK-LABEL: @rcp_fdiv_fpmath_vector_partial_constant( 291; CHECK: %[[ARCP_A0:[0-9]+]] = extractelement <2 x float> %x.insert, i64 0 292; CHECK: %[[ARCP_B0:[0-9]+]] = extractelement <2 x float> %y, i64 0 293; CHECK: %[[ARCP_RCP0:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_B0]]) 294; CHECK: %[[ARCP_MUL0:[0-9]+]] = fmul arcp float %[[ARCP_A0]], %[[ARCP_RCP0]], !fpmath !0 295; CHECK: %[[ARCP_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[ARCP_MUL0]], i64 0 296; CHECK: %[[ARCP_A1:[0-9]+]] = extractelement <2 x float> %x.insert, i64 1 297; CHECK: %[[ARCP_B1:[0-9]+]] = extractelement <2 x float> %y, i64 1 298; CHECK: %[[ARCP_RCP1:[0-9]+]] = call arcp float @llvm.amdgcn.rcp.f32(float %[[ARCP_B1]]) 299; CHECK: %[[ARCP_MUL1:[0-9]+]] = fmul arcp float %[[ARCP_A1]], %[[ARCP_RCP1]], !fpmath !0 300; CHECK: %arcp.25ulp = insertelement <2 x float> %[[ARCP_INS0]], float %[[ARCP_MUL1]], i64 1 301; CHECK: store volatile <2 x float> %arcp.25ulp 302 303; CHECK: %[[FAST_A0:[0-9]+]] = extractelement <2 x float> %x.insert, i64 0 304; CHECK: %[[FAST_B0:[0-9]+]] = extractelement <2 x float> %y, i64 0 305; CHECK: %[[FAST_RCP0:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_B0]]) 306; CHECK: %[[FAST_MUL0:[0-9]+]] = fmul fast float %[[FAST_A0]], %[[FAST_RCP0]], !fpmath !0 307; CHECK: %[[FAST_INS0:[0-9]+]] = insertelement <2 x float> undef, float %[[FAST_MUL0]], i64 0 308; CHECK: %[[FAST_A1:[0-9]+]] = extractelement <2 x float> %x.insert, i64 1 309; CHECK: %[[FAST_B1:[0-9]+]] = extractelement <2 x float> %y, i64 1 310; CHECK: %[[FAST_RCP1:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %[[FAST_B1]]) 311; CHECK: %[[FAST_MUL1:[0-9]+]] = fmul fast float %[[FAST_A1]], %[[FAST_RCP1]], !fpmath !0 312; CHECK: %fast.25ulp = insertelement <2 x float> %[[FAST_INS0]], float %[[FAST_MUL1]], i64 1 313; CHECK: store volatile <2 x float> %fast.25ulp 314define amdgpu_kernel void @rcp_fdiv_fpmath_vector_partial_constant(<2 x float> addrspace(1)* %out, <2 x float> %x, <2 x float> %y) #1 { 315 %x.insert = insertelement <2 x float> %x, float 1.0, i32 0 316 317 %arcp.25ulp = fdiv arcp <2 x float> %x.insert, %y, !fpmath !0 318 store volatile <2 x float> %arcp.25ulp, <2 x float> addrspace(1)* %out 319 320 %fast.25ulp = fdiv fast <2 x float> %x.insert, %y, !fpmath !0 321 store volatile <2 x float> %fast.25ulp, <2 x float> addrspace(1)* %out 322 323 ret void 324} 325 326; CHECK-LABEL: @fdiv_fpmath_f32_denormals( 327; CHECK: %no.md = fdiv float %a, %b{{$}} 328; CHECK: %md.half.ulp = fdiv float %a, %b, !fpmath !1 329; CHECK: %md.1ulp = fdiv float %a, %b, !fpmath !2 330; CHECK: %md.25ulp = fdiv float %a, %b, !fpmath !0 331; CHECK: %md.3ulp = fdiv float %a, %b, !fpmath !3 332; CHECK: %[[RCP_FAST:[0-9]+]] = call fast float @llvm.amdgcn.rcp.f32(float %b) 333; CHECK: %fast.md.25ulp = fmul fast float %a, %[[RCP_FAST]], !fpmath !0 334; CHECK: %arcp.md.25ulp = fdiv arcp float %a, %b, !fpmath !0 335define amdgpu_kernel void @fdiv_fpmath_f32_denormals(float addrspace(1)* %out, float %a, float %b) #2 { 336 %no.md = fdiv float %a, %b 337 store volatile float %no.md, float addrspace(1)* %out 338 339 %md.half.ulp = fdiv float %a, %b, !fpmath !1 340 store volatile float %md.half.ulp, float addrspace(1)* %out 341 342 %md.1ulp = fdiv float %a, %b, !fpmath !2 343 store volatile float %md.1ulp, float addrspace(1)* %out 344 345 %md.25ulp = fdiv float %a, %b, !fpmath !0 346 store volatile float %md.25ulp, float addrspace(1)* %out 347 348 %md.3ulp = fdiv float %a, %b, !fpmath !3 349 store volatile float %md.3ulp, float addrspace(1)* %out 350 351 %fast.md.25ulp = fdiv fast float %a, %b, !fpmath !0 352 store volatile float %fast.md.25ulp, float addrspace(1)* %out 353 354 %arcp.md.25ulp = fdiv arcp float %a, %b, !fpmath !0 355 store volatile float %arcp.md.25ulp, float addrspace(1)* %out 356 357 ret void 358} 359 360attributes #0 = { nounwind optnone noinline } 361attributes #1 = { nounwind } 362attributes #2 = { nounwind "target-features"="+fp32-denormals" } 363 364; CHECK: !0 = !{float 2.500000e+00} 365; CHECK: !1 = !{float 5.000000e-01} 366; CHECK: !2 = !{float 1.000000e+00} 367; CHECK: !3 = !{float 3.000000e+00} 368 369!0 = !{float 2.500000e+00} 370!1 = !{float 5.000000e-01} 371!2 = !{float 1.000000e+00} 372!3 = !{float 3.000000e+00} 373