1; RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX90A %s
2; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX908 %s
3
4; GCN-LABEL: {{^}}func_empty:
5; GCN-NOT: buffer_
6; GCN-NOT: v_accvgpr
7; GCN:     s_setpc_b64
8define void @func_empty() #0 {
9  ret void
10}
11
12; GCN-LABEL: {{^}}func_areg_4:
13; GCN-NOT: buffer_
14; GCN-NOT: v_accvgpr
15; GCN: use agpr3
16; GCN-NOT: buffer_
17; GCN-NOT: v_accvgpr
18; GCN: s_setpc_b64
19define void @func_areg_4() #0 {
20  call void asm sideeffect "; use agpr3", "~{a3}" ()
21  ret void
22}
23
24; GCN-LABEL: {{^}}func_areg_32:
25; GCN-NOT: buffer_
26; GCN-NOT: v_accvgpr
27; GCN: use agpr31
28; GCN-NOT: buffer_
29; GCN-NOT: v_accvgpr
30; GCN: s_setpc_b64
31define void @func_areg_32() #0 {
32  call void asm sideeffect "; use agpr31", "~{a31}" ()
33  ret void
34}
35
36; GCN-LABEL: {{^}}func_areg_33:
37; GCN-NOT: a32
38; GFX90A: buffer_store_dword a32, off, s[0:3], s32 ; 4-byte Folded Spill
39; GCN-NOT: a32
40; GCN:        use agpr32
41; GCN-NOT: a32
42; GFX90A: buffer_load_dword a32, off, s[0:3], s32 ; 4-byte Folded Reload
43; GCN-NOT: a32
44; GCN:        s_setpc_b64
45define void @func_areg_33() #0 {
46  call void asm sideeffect "; use agpr32", "~{a32}" ()
47  ret void
48}
49
50; GCN-LABEL: {{^}}func_areg_64:
51; GFX908-NOT: buffer_
52; GCN-NOT:    v_accvgpr
53; GFX90A:     buffer_store_dword a63,
54; GCN:        use agpr63
55; GFX90A:     buffer_load_dword a63,
56; GCN-NOT:    v_accvgpr
57; GCN:        s_setpc_b64
58define void @func_areg_64() #0 {
59  call void asm sideeffect "; use agpr63", "~{a63}" ()
60  ret void
61}
62
63; GCN-LABEL: {{^}}func_areg_31_63:
64; GFX908-NOT: buffer_
65; GCN-NOT:    v_accvgpr
66; GFX90A:     buffer_store_dword a63,
67; GCN:        use agpr31, agpr63
68; GFX90A:     buffer_load_dword a63,
69; GCN-NOT:    buffer_
70; GCN-NOT:    v_accvgpr
71; GCN:        s_setpc_b64
72define void @func_areg_31_63() #0 {
73  call void asm sideeffect "; use agpr31, agpr63", "~{a31},~{a63}" ()
74  ret void
75}
76
77declare void @func_unknown() #0
78
79; GCN-LABEL: {{^}}test_call_empty:
80; GCN-NOT:         buffer_
81; GCN-NOT:         v_accvgpr
82; GCN:             def a[0:31]
83; GFX908-COUNT-8:  v_accvgpr_read_b32
84; GFX90A-NOT:      v_accvgpr
85; GCN-NOT:         buffer_
86; GCN:             s_swappc_b64
87; GCN-NOT:         buffer_
88; GFX90A-NOT:      v_accvgpr
89; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
90; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
91; GCN:             s_endpgm
92define amdgpu_kernel void @test_call_empty() #0 {
93bb:
94  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
95  call void @func_empty()
96  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
97  ret void
98}
99
100; GCN-LABEL: {{^}}test_call_areg4:
101; GCN-NOT:         buffer_
102; GCN-NOT:         v_accvgpr
103; GFX908:          def a[0:31]
104; GFX90A:          def a[4:35]
105; GFX908-COUNT-8:  v_accvgpr_read_b32
106; GFX90A-NOT:      v_accvgpr
107; GCN-NOT:         buffer_
108; GCN:             s_swappc_b64
109; GCN-NOT:         buffer_
110; GFX90A-NOT:      v_accvgpr
111; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
112; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
113; GCN:             s_endpgm
114define amdgpu_kernel void @test_call_areg4() #0 {
115bb:
116  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
117  call void @func_areg_4()
118  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
119  ret void
120}
121
122; GCN-LABEL: {{^}}test_call_areg32:
123; GCN-NOT:         buffer_
124; GCN-NOT:         v_accvgpr
125; GFX908:          def a[0:31]
126; GFX90A:          def a[32:63]
127; GFX908-COUNT-8:  v_accvgpr_read_b32
128; GFX90A-NOT:      v_accvgpr
129; GCN-NOT:         buffer_
130; GCN:             s_swappc_b64
131; GCN-NOT:         buffer_
132; GFX90A-NOT:      v_accvgpr
133; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
134; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
135; GCN:             s_endpgm
136define amdgpu_kernel void @test_call_areg32() #0 {
137bb:
138  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
139  call void @func_areg_32()
140  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
141  ret void
142}
143
144; GCN-LABEL: {{^}}test_call_areg64:
145; GCN-NOT:         buffer_
146; GCN-NOT:         v_accvgpr
147; GCN:             def a[0:31]
148; GFX908-COUNT-8:  v_accvgpr_read_b32
149; GFX90A-NOT:      v_accvgpr
150; GCN-NOT:         buffer_
151; GCN:             s_swappc_b64
152; GCN-NOT:         buffer_
153; GFX90A-NOT:      v_accvgpr
154; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
155; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
156; GCN:             s_endpgm
157define amdgpu_kernel void @test_call_areg64() #0 {
158bb:
159  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
160  call void @func_areg_64()
161  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
162  ret void
163}
164
165; GCN-LABEL: {{^}}test_call_areg31_63:
166; GCN-NOT:         buffer_
167; GCN-NOT:         v_accvgpr
168; GFX908:          def a[0:31]
169; GFX90A:          def a[32:63]
170; GFX908-COUNT-8:  v_accvgpr_read_b32
171; GFX90A-NOT:      v_accvgpr
172; GCN-NOT:         buffer_
173; GCN:             s_swappc_b64
174; GCN-NOT:         buffer_
175; GFX90A-NOT:      v_accvgpr
176; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
177; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
178; GCN:             s_endpgm
179define amdgpu_kernel void @test_call_areg31_63() #0 {
180bb:
181  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
182  call void @func_areg_31_63()
183  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
184  ret void
185}
186
187; GCN-LABEL: {{^}}test_call_unknown:
188; GCN-NOT:         buffer_
189; GCN-NOT:         v_accvgpr
190; GFX908:          def a[0:31]
191; GFX90A:          def a[32:63]
192; GFX908-COUNT-8:  v_accvgpr_read_b32
193; GFX90A-NOT:      v_accvgpr
194; GCN-NOT:         buffer_
195; GCN:             s_swappc_b64
196; GCN-NOT:         buffer_
197; GFX90A-NOT:      v_accvgpr
198; GFX908-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], v[{{[0-9:]+}}]
199; GFX90A-COUNT-8:  global_store_dwordx4 v[{{[0-9:]+}}], a[{{[0-9:]+}}]
200; GCN:             s_endpgm
201define amdgpu_kernel void @test_call_unknown() #0 {
202bb:
203  %reg = call <32 x float> asm sideeffect "; def $0", "=a"()
204  call void @func_unknown()
205  store volatile <32 x float> %reg, <32 x float> addrspace(1)* undef
206  ret void
207}
208
209attributes #0 = { nounwind noinline "amdgpu-flat-work-group-size"="1,512" }
210