1; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 2 3; FIXME: Need to handle non-uniform case for function below (load without gep). 4; GCN-LABEL: {{^}}v_test_add_i16: 5; VI: flat_load_ushort [[A:v[0-9]+]] 6; VI: flat_load_ushort [[B:v[0-9]+]] 7; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] 8; VI-NEXT: buffer_store_short [[ADD]] 9define void @v_test_add_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { 10 %tid = call i32 @llvm.amdgcn.workitem.id.x() 11 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid 12 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 13 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid 14 %a = load volatile i16, i16 addrspace(1)* %gep.in0 15 %b = load volatile i16, i16 addrspace(1)* %gep.in1 16 %add = add i16 %a, %b 17 store i16 %add, i16 addrspace(1)* %out 18 ret void 19} 20 21; FIXME: Need to handle non-uniform case for function below (load without gep). 22; GCN-LABEL: {{^}}v_test_add_i16_constant: 23; VI: flat_load_ushort [[A:v[0-9]+]] 24; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x7b, [[A]] 25; VI-NEXT: buffer_store_short [[ADD]] 26define void @v_test_add_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 { 27 %tid = call i32 @llvm.amdgcn.workitem.id.x() 28 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid 29 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 30 %a = load volatile i16, i16 addrspace(1)* %gep.in0 31 %add = add i16 %a, 123 32 store i16 %add, i16 addrspace(1)* %out 33 ret void 34} 35 36; FIXME: Need to handle non-uniform case for function below (load without gep). 37; GCN-LABEL: {{^}}v_test_add_i16_neg_constant: 38; VI: flat_load_ushort [[A:v[0-9]+]] 39; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xfffffcb3, [[A]] 40; VI-NEXT: buffer_store_short [[ADD]] 41define void @v_test_add_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 { 42 %tid = call i32 @llvm.amdgcn.workitem.id.x() 43 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid 44 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 45 %a = load volatile i16, i16 addrspace(1)* %gep.in0 46 %add = add i16 %a, -845 47 store i16 %add, i16 addrspace(1)* %out 48 ret void 49} 50 51; FIXME: Need to handle non-uniform case for function below (load without gep). 52; GCN-LABEL: {{^}}v_test_add_i16_inline_neg1: 53; VI: flat_load_ushort [[A:v[0-9]+]] 54; VI: v_add_u16_e32 [[ADD:v[0-9]+]], -1, [[A]] 55; VI-NEXT: buffer_store_short [[ADD]] 56define void @v_test_add_i16_inline_neg1(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 { 57 %tid = call i32 @llvm.amdgcn.workitem.id.x() 58 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid 59 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 60 %a = load volatile i16, i16 addrspace(1)* %gep.in0 61 %add = add i16 %a, -1 62 store i16 %add, i16 addrspace(1)* %out 63 ret void 64} 65 66; FIXME: Need to handle non-uniform case for function below (load without gep). 67; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i32: 68; VI: flat_load_ushort [[A:v[0-9]+]] 69; VI: flat_load_ushort [[B:v[0-9]+]] 70; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] 71; VI-NEXT: buffer_store_dword [[ADD]] 72define void @v_test_add_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { 73 %tid = call i32 @llvm.amdgcn.workitem.id.x() 74 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid 75 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 76 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid 77 %a = load volatile i16, i16 addrspace(1)* %gep.in0 78 %b = load volatile i16, i16 addrspace(1)* %gep.in1 79 %add = add i16 %a, %b 80 %ext = zext i16 %add to i32 81 store i32 %ext, i32 addrspace(1)* %out 82 ret void 83} 84 85; FIXME: Need to handle non-uniform case for function below (load without gep). 86; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i64: 87; VI: flat_load_ushort [[A:v[0-9]+]] 88; VI: flat_load_ushort [[B:v[0-9]+]] 89; VI-DAG: v_add_u16_e32 v[[ADD:[0-9]+]], [[B]], [[A]] 90; VI-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0 91; VI: buffer_store_dwordx2 v{{\[}}[[ADD]]:[[VZERO]]{{\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}} 92define void @v_test_add_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { 93 %tid = call i32 @llvm.amdgcn.workitem.id.x() 94 %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid 95 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 96 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid 97 %a = load volatile i16, i16 addrspace(1)* %gep.in0 98 %b = load volatile i16, i16 addrspace(1)* %gep.in1 99 %add = add i16 %a, %b 100 %ext = zext i16 %add to i64 101 store i64 %ext, i64 addrspace(1)* %out 102 ret void 103} 104 105; FIXME: Need to handle non-uniform case for function below (load without gep). 106; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32: 107; VI: flat_load_ushort [[A:v[0-9]+]] 108; VI: flat_load_ushort [[B:v[0-9]+]] 109; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] 110; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16 111; VI-NEXT: buffer_store_dword [[SEXT]] 112define void @v_test_add_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { 113 %tid = call i32 @llvm.amdgcn.workitem.id.x() 114 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid 115 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 116 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid 117 %a = load i16, i16 addrspace(1)* %gep.in0 118 %b = load i16, i16 addrspace(1)* %gep.in1 119 %add = add i16 %a, %b 120 %ext = sext i16 %add to i32 121 store i32 %ext, i32 addrspace(1)* %out 122 ret void 123} 124 125; FIXME: Need to handle non-uniform case for function below (load without gep). 126; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64: 127; VI: flat_load_ushort [[A:v[0-9]+]] 128; VI: flat_load_ushort [[B:v[0-9]+]] 129; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] 130; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16 131; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]] 132; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 133define void @v_test_add_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { 134 %tid = call i32 @llvm.amdgcn.workitem.id.x() 135 %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid 136 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid 137 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid 138 %a = load i16, i16 addrspace(1)* %gep.in0 139 %b = load i16, i16 addrspace(1)* %gep.in1 140 %add = add i16 %a, %b 141 %ext = sext i16 %add to i64 142 store i64 %ext, i64 addrspace(1)* %out 143 ret void 144} 145 146declare i32 @llvm.amdgcn.workitem.id.x() #0 147 148attributes #0 = { nounwind readnone } 149attributes #1 = { nounwind } 150