1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX9 %s
3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -verify-machineinstrs < %s | FileCheck --check-prefix=GFX7 %s
4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX10 %s
5
6; FIXME:
7; XUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -verify-machineinstrs < %s | FileCheck --check-prefix=GFX6 %s
8
9define <3 x i32> @load_lds_v3i32(<3 x i32> addrspace(3)* %ptr) {
10; GFX9-LABEL: load_lds_v3i32:
11; GFX9:       ; %bb.0:
12; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13; GFX9-NEXT:    ds_read_b96 v[0:2], v0
14; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
15; GFX9-NEXT:    s_setpc_b64 s[30:31]
16;
17; GFX7-LABEL: load_lds_v3i32:
18; GFX7:       ; %bb.0:
19; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
20; GFX7-NEXT:    s_mov_b32 m0, -1
21; GFX7-NEXT:    ds_read_b96 v[0:2], v0
22; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
23; GFX7-NEXT:    s_setpc_b64 s[30:31]
24;
25; GFX10-LABEL: load_lds_v3i32:
26; GFX10:       ; %bb.0:
27; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
28; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
29; GFX10-NEXT:    ds_read_b96 v[0:2], v0
30; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
31; GFX10-NEXT:    s_setpc_b64 s[30:31]
32  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr
33  ret <3 x i32> %load
34}
35
36define <3 x i32> @load_lds_v3i32_align1(<3 x i32> addrspace(3)* %ptr) {
37; GFX9-LABEL: load_lds_v3i32_align1:
38; GFX9:       ; %bb.0:
39; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
40; GFX9-NEXT:    v_mov_b32_e32 v2, v0
41; GFX9-NEXT:    ds_read_u8 v0, v0
42; GFX9-NEXT:    ds_read_u8 v1, v2 offset:1
43; GFX9-NEXT:    ds_read_u8 v4, v2 offset:2
44; GFX9-NEXT:    ds_read_u8 v5, v2 offset:3
45; GFX9-NEXT:    ds_read_u8 v6, v2 offset:4
46; GFX9-NEXT:    ds_read_u8 v7, v2 offset:5
47; GFX9-NEXT:    ds_read_u8 v8, v2 offset:6
48; GFX9-NEXT:    ds_read_u8 v9, v2 offset:7
49; GFX9-NEXT:    s_mov_b32 s5, 8
50; GFX9-NEXT:    s_movk_i32 s4, 0xff
51; GFX9-NEXT:    s_waitcnt lgkmcnt(6)
52; GFX9-NEXT:    v_lshlrev_b32_sdwa v1, s5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
53; GFX9-NEXT:    v_and_or_b32 v0, v0, s4, v1
54; GFX9-NEXT:    s_waitcnt lgkmcnt(5)
55; GFX9-NEXT:    v_and_b32_e32 v1, s4, v4
56; GFX9-NEXT:    s_waitcnt lgkmcnt(4)
57; GFX9-NEXT:    v_and_b32_e32 v4, s4, v5
58; GFX9-NEXT:    v_mov_b32_e32 v3, 0xff
59; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
60; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 24, v4
61; GFX9-NEXT:    v_or3_b32 v0, v0, v1, v4
62; GFX9-NEXT:    s_waitcnt lgkmcnt(2)
63; GFX9-NEXT:    v_lshlrev_b32_sdwa v1, s5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
64; GFX9-NEXT:    s_waitcnt lgkmcnt(1)
65; GFX9-NEXT:    v_and_b32_e32 v4, v8, v3
66; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
67; GFX9-NEXT:    v_and_b32_e32 v5, v9, v3
68; GFX9-NEXT:    v_and_or_b32 v1, v6, s4, v1
69; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
70; GFX9-NEXT:    v_lshlrev_b32_e32 v5, 24, v5
71; GFX9-NEXT:    v_or3_b32 v1, v1, v4, v5
72; GFX9-NEXT:    ds_read_u8 v4, v2 offset:8
73; GFX9-NEXT:    ds_read_u8 v5, v2 offset:9
74; GFX9-NEXT:    ds_read_u8 v6, v2 offset:10
75; GFX9-NEXT:    ds_read_u8 v2, v2 offset:11
76; GFX9-NEXT:    v_mov_b32_e32 v7, 8
77; GFX9-NEXT:    s_waitcnt lgkmcnt(2)
78; GFX9-NEXT:    v_lshlrev_b32_sdwa v5, v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
79; GFX9-NEXT:    v_and_or_b32 v4, v4, v3, v5
80; GFX9-NEXT:    s_waitcnt lgkmcnt(1)
81; GFX9-NEXT:    v_and_b32_e32 v5, v6, v3
82; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
83; GFX9-NEXT:    v_and_b32_e32 v2, v2, v3
84; GFX9-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
85; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 24, v2
86; GFX9-NEXT:    v_or3_b32 v2, v4, v5, v2
87; GFX9-NEXT:    s_setpc_b64 s[30:31]
88;
89; GFX7-LABEL: load_lds_v3i32_align1:
90; GFX7:       ; %bb.0:
91; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
92; GFX7-NEXT:    s_mov_b32 m0, -1
93; GFX7-NEXT:    v_mov_b32_e32 v2, v0
94; GFX7-NEXT:    s_movk_i32 s4, 0xff
95; GFX7-NEXT:    ds_read_u8 v0, v0
96; GFX7-NEXT:    ds_read_u8 v1, v2 offset:1
97; GFX7-NEXT:    ds_read_u8 v4, v2 offset:2
98; GFX7-NEXT:    ds_read_u8 v5, v2 offset:3
99; GFX7-NEXT:    ds_read_u8 v6, v2 offset:4
100; GFX7-NEXT:    ds_read_u8 v7, v2 offset:5
101; GFX7-NEXT:    ds_read_u8 v8, v2 offset:6
102; GFX7-NEXT:    ds_read_u8 v9, v2 offset:7
103; GFX7-NEXT:    s_waitcnt lgkmcnt(6)
104; GFX7-NEXT:    v_and_b32_e32 v1, s4, v1
105; GFX7-NEXT:    v_and_b32_e32 v0, s4, v0
106; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 8, v1
107; GFX7-NEXT:    v_or_b32_e32 v0, v0, v1
108; GFX7-NEXT:    s_waitcnt lgkmcnt(5)
109; GFX7-NEXT:    v_and_b32_e32 v1, s4, v4
110; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
111; GFX7-NEXT:    v_mov_b32_e32 v3, 0xff
112; GFX7-NEXT:    v_or_b32_e32 v0, v0, v1
113; GFX7-NEXT:    s_waitcnt lgkmcnt(4)
114; GFX7-NEXT:    v_and_b32_e32 v1, s4, v5
115; GFX7-NEXT:    s_waitcnt lgkmcnt(2)
116; GFX7-NEXT:    v_and_b32_e32 v4, v7, v3
117; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 24, v1
118; GFX7-NEXT:    v_or_b32_e32 v0, v0, v1
119; GFX7-NEXT:    v_and_b32_e32 v1, s4, v6
120; GFX7-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
121; GFX7-NEXT:    v_or_b32_e32 v1, v1, v4
122; GFX7-NEXT:    s_waitcnt lgkmcnt(1)
123; GFX7-NEXT:    v_and_b32_e32 v4, v8, v3
124; GFX7-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
125; GFX7-NEXT:    v_or_b32_e32 v1, v1, v4
126; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
127; GFX7-NEXT:    v_and_b32_e32 v4, v9, v3
128; GFX7-NEXT:    v_lshlrev_b32_e32 v4, 24, v4
129; GFX7-NEXT:    v_or_b32_e32 v1, v1, v4
130; GFX7-NEXT:    ds_read_u8 v4, v2 offset:8
131; GFX7-NEXT:    ds_read_u8 v5, v2 offset:9
132; GFX7-NEXT:    ds_read_u8 v6, v2 offset:10
133; GFX7-NEXT:    ds_read_u8 v2, v2 offset:11
134; GFX7-NEXT:    s_waitcnt lgkmcnt(3)
135; GFX7-NEXT:    v_and_b32_e32 v4, v4, v3
136; GFX7-NEXT:    s_waitcnt lgkmcnt(2)
137; GFX7-NEXT:    v_and_b32_e32 v5, v5, v3
138; GFX7-NEXT:    v_lshlrev_b32_e32 v5, 8, v5
139; GFX7-NEXT:    v_or_b32_e32 v4, v4, v5
140; GFX7-NEXT:    s_waitcnt lgkmcnt(1)
141; GFX7-NEXT:    v_and_b32_e32 v5, v6, v3
142; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
143; GFX7-NEXT:    v_and_b32_e32 v2, v2, v3
144; GFX7-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
145; GFX7-NEXT:    v_or_b32_e32 v4, v4, v5
146; GFX7-NEXT:    v_lshlrev_b32_e32 v2, 24, v2
147; GFX7-NEXT:    v_or_b32_e32 v2, v4, v2
148; GFX7-NEXT:    s_setpc_b64 s[30:31]
149;
150; GFX10-LABEL: load_lds_v3i32_align1:
151; GFX10:       ; %bb.0:
152; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
153; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
154; GFX10-NEXT:    ds_read_u8 v1, v0 offset:1
155; GFX10-NEXT:    ds_read_u8 v2, v0 offset:2
156; GFX10-NEXT:    ds_read_u8 v3, v0 offset:3
157; GFX10-NEXT:    ds_read_u8 v4, v0 offset:5
158; GFX10-NEXT:    ds_read_u8 v5, v0 offset:6
159; GFX10-NEXT:    ds_read_u8 v6, v0 offset:7
160; GFX10-NEXT:    ds_read_u8 v7, v0 offset:9
161; GFX10-NEXT:    ds_read_u8 v8, v0 offset:10
162; GFX10-NEXT:    ds_read_u8 v9, v0 offset:11
163; GFX10-NEXT:    ds_read_u8 v10, v0
164; GFX10-NEXT:    ds_read_u8 v11, v0 offset:4
165; GFX10-NEXT:    ds_read_u8 v0, v0 offset:8
166; GFX10-NEXT:    v_mov_b32_e32 v12, 0xff
167; GFX10-NEXT:    v_mov_b32_e32 v13, 8
168; GFX10-NEXT:    s_movk_i32 s4, 0xff
169; GFX10-NEXT:    s_mov_b32 s5, 8
170; GFX10-NEXT:    s_waitcnt lgkmcnt(11)
171; GFX10-NEXT:    v_lshlrev_b32_sdwa v1, s5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
172; GFX10-NEXT:    s_waitcnt lgkmcnt(10)
173; GFX10-NEXT:    v_and_b32_e32 v2, s4, v2
174; GFX10-NEXT:    s_waitcnt lgkmcnt(9)
175; GFX10-NEXT:    v_and_b32_e32 v3, s4, v3
176; GFX10-NEXT:    s_waitcnt lgkmcnt(8)
177; GFX10-NEXT:    v_lshlrev_b32_sdwa v4, s5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
178; GFX10-NEXT:    s_waitcnt lgkmcnt(7)
179; GFX10-NEXT:    v_and_b32_e32 v5, v5, v12
180; GFX10-NEXT:    s_waitcnt lgkmcnt(6)
181; GFX10-NEXT:    v_and_b32_e32 v6, v6, v12
182; GFX10-NEXT:    s_waitcnt lgkmcnt(5)
183; GFX10-NEXT:    v_lshlrev_b32_sdwa v7, v13, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
184; GFX10-NEXT:    s_waitcnt lgkmcnt(4)
185; GFX10-NEXT:    v_and_b32_e32 v8, v8, v12
186; GFX10-NEXT:    s_waitcnt lgkmcnt(3)
187; GFX10-NEXT:    v_and_b32_e32 v9, v9, v12
188; GFX10-NEXT:    s_waitcnt lgkmcnt(2)
189; GFX10-NEXT:    v_and_or_b32 v1, v10, s4, v1
190; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
191; GFX10-NEXT:    v_lshlrev_b32_e32 v3, 24, v3
192; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
193; GFX10-NEXT:    v_and_or_b32 v7, v0, v12, v7
194; GFX10-NEXT:    v_and_or_b32 v4, v11, s4, v4
195; GFX10-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
196; GFX10-NEXT:    v_lshlrev_b32_e32 v6, 24, v6
197; GFX10-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
198; GFX10-NEXT:    v_lshlrev_b32_e32 v9, 24, v9
199; GFX10-NEXT:    v_or3_b32 v0, v1, v2, v3
200; GFX10-NEXT:    v_or3_b32 v1, v4, v5, v6
201; GFX10-NEXT:    v_or3_b32 v2, v7, v8, v9
202; GFX10-NEXT:    s_setpc_b64 s[30:31]
203  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr, align 1
204  ret <3 x i32> %load
205}
206
207define <3 x i32> @load_lds_v3i32_align2(<3 x i32> addrspace(3)* %ptr) {
208; GFX9-LABEL: load_lds_v3i32_align2:
209; GFX9:       ; %bb.0:
210; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
211; GFX9-NEXT:    ds_read_u16 v1, v0
212; GFX9-NEXT:    ds_read_u16 v2, v0 offset:2
213; GFX9-NEXT:    ds_read_u16 v3, v0 offset:4
214; GFX9-NEXT:    ds_read_u16 v4, v0 offset:6
215; GFX9-NEXT:    ds_read_u16 v5, v0 offset:8
216; GFX9-NEXT:    ds_read_u16 v6, v0 offset:10
217; GFX9-NEXT:    s_mov_b32 s4, 0xffff
218; GFX9-NEXT:    s_waitcnt lgkmcnt(4)
219; GFX9-NEXT:    v_and_b32_e32 v0, s4, v2
220; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
221; GFX9-NEXT:    v_and_or_b32 v0, v1, s4, v0
222; GFX9-NEXT:    s_waitcnt lgkmcnt(2)
223; GFX9-NEXT:    v_and_b32_e32 v1, s4, v4
224; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
225; GFX9-NEXT:    v_and_b32_e32 v2, s4, v6
226; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
227; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
228; GFX9-NEXT:    v_and_or_b32 v1, v3, s4, v1
229; GFX9-NEXT:    v_and_or_b32 v2, v5, s4, v2
230; GFX9-NEXT:    s_setpc_b64 s[30:31]
231;
232; GFX7-LABEL: load_lds_v3i32_align2:
233; GFX7:       ; %bb.0:
234; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
235; GFX7-NEXT:    s_mov_b32 m0, -1
236; GFX7-NEXT:    ds_read_u16 v1, v0
237; GFX7-NEXT:    ds_read_u16 v2, v0 offset:2
238; GFX7-NEXT:    ds_read_u16 v3, v0 offset:4
239; GFX7-NEXT:    ds_read_u16 v4, v0 offset:6
240; GFX7-NEXT:    ds_read_u16 v5, v0 offset:8
241; GFX7-NEXT:    ds_read_u16 v6, v0 offset:10
242; GFX7-NEXT:    s_mov_b32 s4, 0xffff
243; GFX7-NEXT:    s_waitcnt lgkmcnt(5)
244; GFX7-NEXT:    v_and_b32_e32 v0, s4, v1
245; GFX7-NEXT:    s_waitcnt lgkmcnt(4)
246; GFX7-NEXT:    v_and_b32_e32 v1, s4, v2
247; GFX7-NEXT:    s_waitcnt lgkmcnt(2)
248; GFX7-NEXT:    v_and_b32_e32 v2, s4, v4
249; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
250; GFX7-NEXT:    v_or_b32_e32 v0, v0, v1
251; GFX7-NEXT:    v_and_b32_e32 v1, s4, v3
252; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
253; GFX7-NEXT:    v_and_b32_e32 v3, s4, v6
254; GFX7-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
255; GFX7-NEXT:    v_or_b32_e32 v1, v1, v2
256; GFX7-NEXT:    v_and_b32_e32 v2, s4, v5
257; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
258; GFX7-NEXT:    v_or_b32_e32 v2, v2, v3
259; GFX7-NEXT:    s_setpc_b64 s[30:31]
260;
261; GFX10-LABEL: load_lds_v3i32_align2:
262; GFX10:       ; %bb.0:
263; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
264; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
265; GFX10-NEXT:    ds_read_u16 v1, v0 offset:2
266; GFX10-NEXT:    ds_read_u16 v2, v0 offset:6
267; GFX10-NEXT:    ds_read_u16 v3, v0 offset:10
268; GFX10-NEXT:    ds_read_u16 v4, v0
269; GFX10-NEXT:    ds_read_u16 v5, v0 offset:4
270; GFX10-NEXT:    ds_read_u16 v6, v0 offset:8
271; GFX10-NEXT:    s_mov_b32 s4, 0xffff
272; GFX10-NEXT:    s_waitcnt lgkmcnt(5)
273; GFX10-NEXT:    v_and_b32_e32 v0, s4, v1
274; GFX10-NEXT:    s_waitcnt lgkmcnt(4)
275; GFX10-NEXT:    v_and_b32_e32 v1, s4, v2
276; GFX10-NEXT:    s_waitcnt lgkmcnt(3)
277; GFX10-NEXT:    v_and_b32_e32 v2, s4, v3
278; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
279; GFX10-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
280; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
281; GFX10-NEXT:    s_waitcnt lgkmcnt(2)
282; GFX10-NEXT:    v_and_or_b32 v0, v4, s4, v0
283; GFX10-NEXT:    s_waitcnt lgkmcnt(1)
284; GFX10-NEXT:    v_and_or_b32 v1, v5, s4, v1
285; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
286; GFX10-NEXT:    v_and_or_b32 v2, v6, s4, v2
287; GFX10-NEXT:    s_setpc_b64 s[30:31]
288  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr, align 2
289  ret <3 x i32> %load
290}
291
292define <3 x i32> @load_lds_v3i32_align4(<3 x i32> addrspace(3)* %ptr) {
293; GFX9-LABEL: load_lds_v3i32_align4:
294; GFX9:       ; %bb.0:
295; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
296; GFX9-NEXT:    v_mov_b32_e32 v2, v0
297; GFX9-NEXT:    ds_read2_b32 v[0:1], v0 offset1:1
298; GFX9-NEXT:    ds_read_b32 v2, v2 offset:8
299; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
300; GFX9-NEXT:    s_setpc_b64 s[30:31]
301;
302; GFX7-LABEL: load_lds_v3i32_align4:
303; GFX7:       ; %bb.0:
304; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
305; GFX7-NEXT:    v_mov_b32_e32 v2, v0
306; GFX7-NEXT:    s_mov_b32 m0, -1
307; GFX7-NEXT:    ds_read2_b32 v[0:1], v0 offset1:1
308; GFX7-NEXT:    ds_read_b32 v2, v2 offset:8
309; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
310; GFX7-NEXT:    s_setpc_b64 s[30:31]
311;
312; GFX10-LABEL: load_lds_v3i32_align4:
313; GFX10:       ; %bb.0:
314; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
315; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
316; GFX10-NEXT:    v_mov_b32_e32 v2, v0
317; GFX10-NEXT:    ds_read2_b32 v[0:1], v0 offset1:1
318; GFX10-NEXT:    ds_read_b32 v2, v2 offset:8
319; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
320; GFX10-NEXT:    s_setpc_b64 s[30:31]
321  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr, align 4
322  ret <3 x i32> %load
323}
324
325define <3 x i32> @load_lds_v3i32_align8(<3 x i32> addrspace(3)* %ptr) {
326; GFX9-LABEL: load_lds_v3i32_align8:
327; GFX9:       ; %bb.0:
328; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
329; GFX9-NEXT:    v_mov_b32_e32 v2, v0
330; GFX9-NEXT:    ds_read_b64 v[0:1], v0
331; GFX9-NEXT:    ds_read_b32 v2, v2 offset:8
332; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
333; GFX9-NEXT:    s_setpc_b64 s[30:31]
334;
335; GFX7-LABEL: load_lds_v3i32_align8:
336; GFX7:       ; %bb.0:
337; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
338; GFX7-NEXT:    v_mov_b32_e32 v2, v0
339; GFX7-NEXT:    s_mov_b32 m0, -1
340; GFX7-NEXT:    ds_read_b64 v[0:1], v0
341; GFX7-NEXT:    ds_read_b32 v2, v2 offset:8
342; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
343; GFX7-NEXT:    s_setpc_b64 s[30:31]
344;
345; GFX10-LABEL: load_lds_v3i32_align8:
346; GFX10:       ; %bb.0:
347; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
348; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
349; GFX10-NEXT:    v_mov_b32_e32 v2, v0
350; GFX10-NEXT:    ds_read_b64 v[0:1], v0
351; GFX10-NEXT:    ds_read_b32 v2, v2 offset:8
352; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
353; GFX10-NEXT:    s_setpc_b64 s[30:31]
354  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr, align 8
355  ret <3 x i32> %load
356}
357
358define <3 x i32> @load_lds_v3i32_align16(<3 x i32> addrspace(3)* %ptr) {
359; GFX9-LABEL: load_lds_v3i32_align16:
360; GFX9:       ; %bb.0:
361; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
362; GFX9-NEXT:    ds_read_b96 v[0:2], v0
363; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
364; GFX9-NEXT:    s_setpc_b64 s[30:31]
365;
366; GFX7-LABEL: load_lds_v3i32_align16:
367; GFX7:       ; %bb.0:
368; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
369; GFX7-NEXT:    s_mov_b32 m0, -1
370; GFX7-NEXT:    ds_read_b96 v[0:2], v0
371; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
372; GFX7-NEXT:    s_setpc_b64 s[30:31]
373;
374; GFX10-LABEL: load_lds_v3i32_align16:
375; GFX10:       ; %bb.0:
376; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
377; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
378; GFX10-NEXT:    ds_read_b96 v[0:2], v0
379; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
380; GFX10-NEXT:    s_setpc_b64 s[30:31]
381  %load = load <3 x i32>, <3 x i32> addrspace(3)* %ptr, align 16
382  ret <3 x i32> %load
383}
384