1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
4
5define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {
6; GFX6-LABEL: load_3d_v4f32_xyzw:
7; GFX6:       ; %bb.0:
8; GFX6-NEXT:    s_mov_b32 s0, s2
9; GFX6-NEXT:    s_mov_b32 s1, s3
10; GFX6-NEXT:    s_mov_b32 s2, s4
11; GFX6-NEXT:    s_mov_b32 s3, s5
12; GFX6-NEXT:    s_mov_b32 s4, s6
13; GFX6-NEXT:    s_mov_b32 s5, s7
14; GFX6-NEXT:    s_mov_b32 s6, s8
15; GFX6-NEXT:    s_mov_b32 s7, s9
16; GFX6-NEXT:    image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm
17; GFX6-NEXT:    s_waitcnt vmcnt(0)
18; GFX6-NEXT:    ; return to shader part epilog
19;
20; GFX10-LABEL: load_3d_v4f32_xyzw:
21; GFX10:       ; %bb.0:
22; GFX10-NEXT:    s_mov_b32 s0, s2
23; GFX10-NEXT:    s_mov_b32 s1, s3
24; GFX10-NEXT:    s_mov_b32 s2, s4
25; GFX10-NEXT:    s_mov_b32 s3, s5
26; GFX10-NEXT:    s_mov_b32 s4, s6
27; GFX10-NEXT:    s_mov_b32 s5, s7
28; GFX10-NEXT:    s_mov_b32 s6, s8
29; GFX10-NEXT:    s_mov_b32 s7, s9
30; GFX10-NEXT:    image_load v[0:3], v[0:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm
31; GFX10-NEXT:    s_waitcnt vmcnt(0)
32; GFX10-NEXT:    ; return to shader part epilog
33  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)
34  ret <4 x float> %v
35}
36
37define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i32 %s, i32 %t, i32 %r) {
38; GFX6-LABEL: load_3d_v4f32_xyzw_tfe:
39; GFX6:       ; %bb.0:
40; GFX6-NEXT:    v_mov_b32_e32 v5, v0
41; GFX6-NEXT:    v_mov_b32_e32 v0, 0
42; GFX6-NEXT:    s_mov_b32 s0, s2
43; GFX6-NEXT:    s_mov_b32 s1, s3
44; GFX6-NEXT:    s_mov_b32 s2, s4
45; GFX6-NEXT:    s_mov_b32 s3, s5
46; GFX6-NEXT:    s_mov_b32 s4, s6
47; GFX6-NEXT:    s_mov_b32 s5, s7
48; GFX6-NEXT:    s_mov_b32 s6, s8
49; GFX6-NEXT:    s_mov_b32 s7, s9
50; GFX6-NEXT:    v_mov_b32_e32 v6, v1
51; GFX6-NEXT:    v_mov_b32_e32 v7, v2
52; GFX6-NEXT:    v_mov_b32_e32 v1, v0
53; GFX6-NEXT:    v_mov_b32_e32 v2, v0
54; GFX6-NEXT:    v_mov_b32_e32 v3, v0
55; GFX6-NEXT:    v_mov_b32_e32 v4, v0
56; GFX6-NEXT:    image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe
57; GFX6-NEXT:    s_mov_b32 s8, s10
58; GFX6-NEXT:    s_mov_b32 s9, s11
59; GFX6-NEXT:    s_mov_b32 s10, -1
60; GFX6-NEXT:    s_mov_b32 s11, 0xf000
61; GFX6-NEXT:    s_waitcnt vmcnt(0)
62; GFX6-NEXT:    buffer_store_dword v4, off, s[8:11], 0
63; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
64; GFX6-NEXT:    ; return to shader part epilog
65;
66; GFX10-LABEL: load_3d_v4f32_xyzw_tfe:
67; GFX10:       ; %bb.0:
68; GFX10-NEXT:    v_mov_b32_e32 v8, 0
69; GFX10-NEXT:    v_mov_b32_e32 v5, v0
70; GFX10-NEXT:    v_mov_b32_e32 v6, v1
71; GFX10-NEXT:    v_mov_b32_e32 v7, v2
72; GFX10-NEXT:    s_mov_b32 s0, s2
73; GFX10-NEXT:    v_mov_b32_e32 v9, v8
74; GFX10-NEXT:    v_mov_b32_e32 v10, v8
75; GFX10-NEXT:    v_mov_b32_e32 v11, v8
76; GFX10-NEXT:    v_mov_b32_e32 v12, v8
77; GFX10-NEXT:    v_mov_b32_e32 v0, v8
78; GFX10-NEXT:    s_mov_b32 s1, s3
79; GFX10-NEXT:    s_mov_b32 s2, s4
80; GFX10-NEXT:    s_mov_b32 s3, s5
81; GFX10-NEXT:    s_mov_b32 s4, s6
82; GFX10-NEXT:    s_mov_b32 s5, s7
83; GFX10-NEXT:    s_mov_b32 s6, s8
84; GFX10-NEXT:    s_mov_b32 s7, s9
85; GFX10-NEXT:    v_mov_b32_e32 v1, v9
86; GFX10-NEXT:    v_mov_b32_e32 v2, v10
87; GFX10-NEXT:    v_mov_b32_e32 v3, v11
88; GFX10-NEXT:    v_mov_b32_e32 v4, v12
89; GFX10-NEXT:    image_load v[0:4], v[5:7], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm tfe
90; GFX10-NEXT:    s_waitcnt vmcnt(0)
91; GFX10-NEXT:    global_store_dword v8, v4, s[10:11]
92; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
93; GFX10-NEXT:    ; return to shader part epilog
94  %v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 1, i32 0)
95  %v.vec = extractvalue { <4 x float>, i32 } %v, 0
96  %v.err = extractvalue { <4 x float>, i32 } %v, 1
97  store i32 %v.err, i32 addrspace(1)* %out, align 4
98  ret <4 x float> %v.vec
99}
100
101define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i32 %s, i32 %t, i32 %r) {
102; GFX6-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
103; GFX6:       ; %bb.0:
104; GFX6-NEXT:    v_mov_b32_e32 v5, v0
105; GFX6-NEXT:    v_mov_b32_e32 v0, 0
106; GFX6-NEXT:    s_mov_b32 s0, s2
107; GFX6-NEXT:    s_mov_b32 s1, s3
108; GFX6-NEXT:    s_mov_b32 s2, s4
109; GFX6-NEXT:    s_mov_b32 s3, s5
110; GFX6-NEXT:    s_mov_b32 s4, s6
111; GFX6-NEXT:    s_mov_b32 s5, s7
112; GFX6-NEXT:    s_mov_b32 s6, s8
113; GFX6-NEXT:    s_mov_b32 s7, s9
114; GFX6-NEXT:    v_mov_b32_e32 v6, v1
115; GFX6-NEXT:    v_mov_b32_e32 v7, v2
116; GFX6-NEXT:    v_mov_b32_e32 v1, v0
117; GFX6-NEXT:    v_mov_b32_e32 v2, v0
118; GFX6-NEXT:    v_mov_b32_e32 v3, v0
119; GFX6-NEXT:    v_mov_b32_e32 v4, v0
120; GFX6-NEXT:    image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe lwe
121; GFX6-NEXT:    s_mov_b32 s8, s10
122; GFX6-NEXT:    s_mov_b32 s9, s11
123; GFX6-NEXT:    s_mov_b32 s10, -1
124; GFX6-NEXT:    s_mov_b32 s11, 0xf000
125; GFX6-NEXT:    s_waitcnt vmcnt(0)
126; GFX6-NEXT:    buffer_store_dword v4, off, s[8:11], 0
127; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
128; GFX6-NEXT:    ; return to shader part epilog
129;
130; GFX10-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
131; GFX10:       ; %bb.0:
132; GFX10-NEXT:    v_mov_b32_e32 v8, 0
133; GFX10-NEXT:    v_mov_b32_e32 v5, v0
134; GFX10-NEXT:    v_mov_b32_e32 v6, v1
135; GFX10-NEXT:    v_mov_b32_e32 v7, v2
136; GFX10-NEXT:    s_mov_b32 s0, s2
137; GFX10-NEXT:    v_mov_b32_e32 v9, v8
138; GFX10-NEXT:    v_mov_b32_e32 v10, v8
139; GFX10-NEXT:    v_mov_b32_e32 v11, v8
140; GFX10-NEXT:    v_mov_b32_e32 v12, v8
141; GFX10-NEXT:    v_mov_b32_e32 v0, v8
142; GFX10-NEXT:    s_mov_b32 s1, s3
143; GFX10-NEXT:    s_mov_b32 s2, s4
144; GFX10-NEXT:    s_mov_b32 s3, s5
145; GFX10-NEXT:    s_mov_b32 s4, s6
146; GFX10-NEXT:    s_mov_b32 s5, s7
147; GFX10-NEXT:    s_mov_b32 s6, s8
148; GFX10-NEXT:    s_mov_b32 s7, s9
149; GFX10-NEXT:    v_mov_b32_e32 v1, v9
150; GFX10-NEXT:    v_mov_b32_e32 v2, v10
151; GFX10-NEXT:    v_mov_b32_e32 v3, v11
152; GFX10-NEXT:    v_mov_b32_e32 v4, v12
153; GFX10-NEXT:    image_load v[0:4], v[5:7], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm tfe lwe
154; GFX10-NEXT:    s_waitcnt vmcnt(0)
155; GFX10-NEXT:    global_store_dword v8, v4, s[10:11]
156; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
157; GFX10-NEXT:    ; return to shader part epilog
158  %v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 3, i32 0)
159  %v.vec = extractvalue { <4 x float>, i32 } %v, 0
160  %v.err = extractvalue { <4 x float>, i32 } %v, 1
161  store i32 %v.err, i32 addrspace(1)* %out, align 4
162  ret <4 x float> %v.vec
163}
164
165declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 immarg, i32, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0
166declare { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 immarg, i32, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0
167
168attributes #0 = { nounwind readonly }
169