1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs -o - %s | FileCheck %s
3; FIXME: pre-VI should have same ABI without legal i16 operations.
4
5define void @void_func_empty_arg({} %arg0, i32 %arg1) #0 {
6  ; CHECK-LABEL: name: void_func_empty_arg
7  ; CHECK: bb.1 (%ir-block.0):
8  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
9  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
10  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
11  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
12  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
13  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
14  ; CHECK:   S_SETPC_B64_return [[COPY2]]
15  store i32 %arg1, i32 addrspace(1)* undef
16  ret void
17}
18
19define void @void_func_empty_array([0 x i8] %arg0, i32 %arg1) #0 {
20  ; CHECK-LABEL: name: void_func_empty_array
21  ; CHECK: bb.1 (%ir-block.0):
22  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
23  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
24  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
25  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
26  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
27  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
28  ; CHECK:   S_SETPC_B64_return [[COPY2]]
29  store i32 %arg1, i32 addrspace(1)* undef
30  ret void
31}
32
33define void @void_func_i1(i1 %arg0) #0 {
34  ; CHECK-LABEL: name: void_func_i1
35  ; CHECK: bb.1 (%ir-block.0):
36  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
37  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
38  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
39  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
40  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
41  ; CHECK:   G_STORE [[TRUNC]](s1), [[DEF]](p1) :: (store 1 into `i1 addrspace(1)* undef`, addrspace 1)
42  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
43  ; CHECK:   S_SETPC_B64_return [[COPY2]]
44  store i1 %arg0, i1 addrspace(1)* undef
45  ret void
46}
47
48define void @void_func_i1_zeroext(i1 zeroext %arg0) #0 {
49  ; CHECK-LABEL: name: void_func_i1_zeroext
50  ; CHECK: bb.1 (%ir-block.0):
51  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
52  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
53  ; CHECK:   [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY]], 1
54  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ASSERT_ZEXT]](s32)
55  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
56  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
57  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
58  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s1)
59  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[C]]
60  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
61  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
62  ; CHECK:   S_SETPC_B64_return [[COPY2]]
63  %ext = zext i1 %arg0 to i32
64  %add = add i32 %ext, 12
65  store i32 %add, i32 addrspace(1)* undef
66  ret void
67}
68
69define void @void_func_i1_signext(i1 signext %arg0) #0 {
70  ; CHECK-LABEL: name: void_func_i1_signext
71  ; CHECK: bb.1 (%ir-block.0):
72  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
73  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
74  ; CHECK:   [[ASSERT_SEXT:%[0-9]+]]:_(s32) = G_ASSERT_SEXT [[COPY]], 1
75  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ASSERT_SEXT]](s32)
76  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
77  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
78  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
79  ; CHECK:   [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s1)
80  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT]], [[C]]
81  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
82  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
83  ; CHECK:   S_SETPC_B64_return [[COPY2]]
84  %ext = sext i1 %arg0 to i32
85  %add = add i32 %ext, 12
86  store i32 %add, i32 addrspace(1)* undef
87  ret void
88}
89
90define void @i1_arg_i1_use(i1 %arg) #0 {
91  ; CHECK-LABEL: name: i1_arg_i1_use
92  ; CHECK: bb.1.bb:
93  ; CHECK:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
94  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
95  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
96  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
97  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
98  ; CHECK:   [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
99  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
100  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
101  ; CHECK:   [[XOR:%[0-9]+]]:_(s1) = G_XOR [[TRUNC]], [[C]]
102  ; CHECK:   [[INT:%[0-9]+]]:_(s1), [[INT1:%[0-9]+]]:_(s64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if), [[XOR]](s1)
103  ; CHECK:   G_BRCOND [[INT]](s1), %bb.2
104  ; CHECK:   G_BR %bb.3
105  ; CHECK: bb.2.bb1:
106  ; CHECK:   successors: %bb.3(0x80000000)
107  ; CHECK:   G_STORE [[C1]](s32), [[DEF]](p1) :: (volatile store 4 into `i32 addrspace(1)* undef`, addrspace 1)
108  ; CHECK: bb.3.bb2:
109  ; CHECK:   G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.end.cf), [[INT1]](s64)
110  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
111  ; CHECK:   S_SETPC_B64_return [[COPY2]]
112bb:
113  br i1 %arg, label %bb2, label %bb1
114
115bb1:
116  store volatile i32 0, i32 addrspace(1)* undef
117  br label %bb2
118
119bb2:
120  ret void
121}
122
123define void @void_func_i8(i8 %arg0) #0 {
124  ; CHECK-LABEL: name: void_func_i8
125  ; CHECK: bb.1 (%ir-block.0):
126  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
127  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
128  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
129  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC]](s16)
130  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
131  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
132  ; CHECK:   G_STORE [[TRUNC1]](s8), [[DEF]](p1) :: (store 1 into `i8 addrspace(1)* undef`, addrspace 1)
133  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
134  ; CHECK:   S_SETPC_B64_return [[COPY2]]
135  store i8 %arg0, i8 addrspace(1)* undef
136  ret void
137}
138
139define void @void_func_i8_zeroext(i8 zeroext %arg0) #0 {
140  ; CHECK-LABEL: name: void_func_i8_zeroext
141  ; CHECK: bb.1 (%ir-block.0):
142  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
143  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
144  ; CHECK:   [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY]], 8
145  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ASSERT_ZEXT]](s32)
146  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
147  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
148  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
149  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)
150  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[C]]
151  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
152  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
153  ; CHECK:   S_SETPC_B64_return [[COPY2]]
154  %ext = zext i8 %arg0 to i32
155  %add = add i32 %ext, 12
156  store i32 %add, i32 addrspace(1)* undef
157  ret void
158}
159
160define void @void_func_i8_signext(i8 signext %arg0) #0 {
161  ; CHECK-LABEL: name: void_func_i8_signext
162  ; CHECK: bb.1 (%ir-block.0):
163  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
164  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
165  ; CHECK:   [[ASSERT_SEXT:%[0-9]+]]:_(s32) = G_ASSERT_SEXT [[COPY]], 8
166  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ASSERT_SEXT]](s32)
167  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
168  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
169  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
170  ; CHECK:   [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s8)
171  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT]], [[C]]
172  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
173  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
174  ; CHECK:   S_SETPC_B64_return [[COPY2]]
175  %ext = sext i8 %arg0 to i32
176  %add = add i32 %ext, 12
177  store i32 %add, i32 addrspace(1)* undef
178  ret void
179}
180
181define void @void_func_i16(i16 %arg0) #0 {
182  ; CHECK-LABEL: name: void_func_i16
183  ; CHECK: bb.1 (%ir-block.0):
184  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
185  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
186  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
187  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
188  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
189  ; CHECK:   G_STORE [[TRUNC]](s16), [[DEF]](p1) :: (store 2 into `i16 addrspace(1)* undef`, addrspace 1)
190  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
191  ; CHECK:   S_SETPC_B64_return [[COPY2]]
192  store i16 %arg0, i16 addrspace(1)* undef
193  ret void
194}
195
196define void @void_func_i16_zeroext(i16 zeroext %arg0) #0 {
197  ; CHECK-LABEL: name: void_func_i16_zeroext
198  ; CHECK: bb.1 (%ir-block.0):
199  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
200  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
201  ; CHECK:   [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY]], 16
202  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ASSERT_ZEXT]](s32)
203  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
204  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
205  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
206  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s16)
207  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[C]]
208  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
209  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
210  ; CHECK:   S_SETPC_B64_return [[COPY2]]
211  %ext = zext i16 %arg0 to i32
212  %add = add i32 %ext, 12
213  store i32 %add, i32 addrspace(1)* undef
214  ret void
215}
216
217define void @void_func_i16_signext(i16 signext %arg0) #0 {
218  ; CHECK-LABEL: name: void_func_i16_signext
219  ; CHECK: bb.1 (%ir-block.0):
220  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
221  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
222  ; CHECK:   [[ASSERT_SEXT:%[0-9]+]]:_(s32) = G_ASSERT_SEXT [[COPY]], 16
223  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ASSERT_SEXT]](s32)
224  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
225  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
226  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
227  ; CHECK:   [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s16)
228  ; CHECK:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT]], [[C]]
229  ; CHECK:   G_STORE [[ADD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
230  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
231  ; CHECK:   S_SETPC_B64_return [[COPY2]]
232  %ext = sext i16 %arg0 to i32
233  %add = add i32 %ext, 12
234  store i32 %add, i32 addrspace(1)* undef
235  ret void
236}
237
238define void @void_func_i24(i24 %arg0) #0 {
239  ; CHECK-LABEL: name: void_func_i24
240  ; CHECK: bb.1 (%ir-block.0):
241  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
242  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
243  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[COPY]](s32)
244  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
245  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
246  ; CHECK:   G_STORE [[TRUNC]](s24), [[DEF]](p1) :: (store 3 into `i24 addrspace(1)* undef`, align 4, addrspace 1)
247  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
248  ; CHECK:   S_SETPC_B64_return [[COPY2]]
249  store i24 %arg0, i24 addrspace(1)* undef
250  ret void
251}
252
253define void @void_func_i24_zeroext(i24 zeroext %arg0) #0 {
254  ; CHECK-LABEL: name: void_func_i24_zeroext
255  ; CHECK: bb.1 (%ir-block.0):
256  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
257  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
258  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[COPY]](s32)
259  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
260  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
261  ; CHECK:   G_STORE [[TRUNC]](s24), [[DEF]](p1) :: (store 3 into `i24 addrspace(1)* undef`, align 4, addrspace 1)
262  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
263  ; CHECK:   S_SETPC_B64_return [[COPY2]]
264  store i24 %arg0, i24 addrspace(1)* undef
265  ret void
266}
267
268define void @void_func_i24_signext(i24 signext %arg0) #0 {
269  ; CHECK-LABEL: name: void_func_i24_signext
270  ; CHECK: bb.1 (%ir-block.0):
271  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
272  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
273  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[COPY]](s32)
274  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
275  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
276  ; CHECK:   G_STORE [[TRUNC]](s24), [[DEF]](p1) :: (store 3 into `i24 addrspace(1)* undef`, align 4, addrspace 1)
277  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
278  ; CHECK:   S_SETPC_B64_return [[COPY2]]
279  store i24 %arg0, i24 addrspace(1)* undef
280  ret void
281}
282
283define void @void_func_i32(i32 %arg0) #0 {
284  ; CHECK-LABEL: name: void_func_i32
285  ; CHECK: bb.1 (%ir-block.0):
286  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
287  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
288  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
289  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
290  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
291  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
292  ; CHECK:   S_SETPC_B64_return [[COPY2]]
293  store i32 %arg0, i32 addrspace(1)* undef
294  ret void
295}
296
297; The signext is an no-op
298define void @void_func_i32_signext(i32 signext %arg0) #0 {
299  ; CHECK-LABEL: name: void_func_i32_signext
300  ; CHECK: bb.1 (%ir-block.0):
301  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
302  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
303  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
304  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
305  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
306  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
307  ; CHECK:   S_SETPC_B64_return [[COPY2]]
308  store i32 %arg0, i32 addrspace(1)* undef
309  ret void
310}
311
312; The zeroext is an no-op
313define void @void_func_i32_zeroext(i32 zeroext %arg0) #0 {
314  ; CHECK-LABEL: name: void_func_i32_zeroext
315  ; CHECK: bb.1 (%ir-block.0):
316  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
317  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
318  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
319  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
320  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
321  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
322  ; CHECK:   S_SETPC_B64_return [[COPY2]]
323  store i32 %arg0, i32 addrspace(1)* undef
324  ret void
325}
326
327define void @void_func_p3i8(i8 addrspace(3)* %arg0) #0 {
328  ; CHECK-LABEL: name: void_func_p3i8
329  ; CHECK: bb.1 (%ir-block.0):
330  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
331  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
332  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
333  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
334  ; CHECK:   G_STORE [[COPY]](p3), [[DEF]](p1) :: (store 4 into `i8 addrspace(3)* addrspace(1)* undef`, addrspace 1)
335  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
336  ; CHECK:   S_SETPC_B64_return [[COPY2]]
337  store i8 addrspace(3)* %arg0, i8 addrspace(3)* addrspace(1)* undef
338  ret void
339}
340
341define void @void_func_i48(i48 %arg0) #0 {
342  ; CHECK-LABEL: name: void_func_i48
343  ; CHECK: bb.1 (%ir-block.0):
344  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
345  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
346  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
347  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
348  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s48) = G_TRUNC [[MV]](s64)
349  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
350  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
351  ; CHECK:   G_STORE [[TRUNC]](s48), [[DEF]](p1) :: (store 6 into `i48 addrspace(1)* undef`, align 8, addrspace 1)
352  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
353  ; CHECK:   S_SETPC_B64_return [[COPY3]]
354  store i48 %arg0, i48 addrspace(1)* undef
355  ret void
356}
357
358define void @void_func_i48_zeroext(i48 zeroext %arg0) #0 {
359  ; CHECK-LABEL: name: void_func_i48_zeroext
360  ; CHECK: bb.1 (%ir-block.0):
361  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
362  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
363  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
364  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
365  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s48) = G_TRUNC [[MV]](s64)
366  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
367  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
368  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
369  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s48)
370  ; CHECK:   [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ZEXT]], [[C]]
371  ; CHECK:   G_STORE [[ADD]](s64), [[DEF]](p1) :: (store 8 into `i64 addrspace(1)* undef`, addrspace 1)
372  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
373  ; CHECK:   S_SETPC_B64_return [[COPY3]]
374  %ext = zext i48 %arg0 to i64
375  %add = add i64 %ext, 12
376  store i64 %add, i64 addrspace(1)* undef
377  ret void
378}
379
380define void @void_func_i48_signext(i48 signext %arg0) #0 {
381  ; CHECK-LABEL: name: void_func_i48_signext
382  ; CHECK: bb.1 (%ir-block.0):
383  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
384  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
385  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
386  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
387  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s48) = G_TRUNC [[MV]](s64)
388  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
389  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
390  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
391  ; CHECK:   [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s48)
392  ; CHECK:   [[ADD:%[0-9]+]]:_(s64) = G_ADD [[SEXT]], [[C]]
393  ; CHECK:   G_STORE [[ADD]](s64), [[DEF]](p1) :: (store 8 into `i64 addrspace(1)* undef`, addrspace 1)
394  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
395  ; CHECK:   S_SETPC_B64_return [[COPY3]]
396  %ext = sext i48 %arg0 to i64
397  %add = add i64 %ext, 12
398  store i64 %add, i64 addrspace(1)* undef
399  ret void
400}
401
402define void @void_func_i64(i64 %arg0) #0 {
403  ; CHECK-LABEL: name: void_func_i64
404  ; CHECK: bb.1 (%ir-block.0):
405  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
406  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
407  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
408  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
409  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
410  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
411  ; CHECK:   G_STORE [[MV]](s64), [[DEF]](p1) :: (store 8 into `i64 addrspace(1)* undef`, addrspace 1)
412  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
413  ; CHECK:   S_SETPC_B64_return [[COPY3]]
414  store i64 %arg0, i64 addrspace(1)* undef
415  ret void
416}
417
418define void @void_func_i95(i95 %arg0) #0 {
419  ; CHECK-LABEL: name: void_func_i95
420  ; CHECK: bb.1 (%ir-block.0):
421  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
422  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
423  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
424  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
425  ; CHECK:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
426  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s95) = G_TRUNC [[MV]](s96)
427  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
428  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
429  ; CHECK:   G_STORE [[TRUNC]](s95), [[DEF]](p1) :: (store 12 into `i95 addrspace(1)* undef`, align 8, addrspace 1)
430  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
431  ; CHECK:   S_SETPC_B64_return [[COPY4]]
432  store i95 %arg0, i95 addrspace(1)* undef
433  ret void
434}
435
436define void @void_func_i95_zeroext(i95 zeroext %arg0) #0 {
437  ; CHECK-LABEL: name: void_func_i95_zeroext
438  ; CHECK: bb.1 (%ir-block.0):
439  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
440  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
441  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
442  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
443  ; CHECK:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
444  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s95) = G_TRUNC [[MV]](s96)
445  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
446  ; CHECK:   [[C:%[0-9]+]]:_(s96) = G_CONSTANT i96 12
447  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
448  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s96) = G_ZEXT [[TRUNC]](s95)
449  ; CHECK:   [[ADD:%[0-9]+]]:_(s96) = G_ADD [[ZEXT]], [[C]]
450  ; CHECK:   G_STORE [[ADD]](s96), [[DEF]](p1) :: (store 12 into `i96 addrspace(1)* undef`, align 8, addrspace 1)
451  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
452  ; CHECK:   S_SETPC_B64_return [[COPY4]]
453  %ext = zext i95 %arg0 to i96
454  %add = add i96 %ext, 12
455  store i96 %add, i96 addrspace(1)* undef
456  ret void
457}
458
459define void @void_func_i95_signext(i95 signext %arg0) #0 {
460  ; CHECK-LABEL: name: void_func_i95_signext
461  ; CHECK: bb.1 (%ir-block.0):
462  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
463  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
464  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
465  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
466  ; CHECK:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
467  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s95) = G_TRUNC [[MV]](s96)
468  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
469  ; CHECK:   [[C:%[0-9]+]]:_(s96) = G_CONSTANT i96 12
470  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
471  ; CHECK:   [[SEXT:%[0-9]+]]:_(s96) = G_SEXT [[TRUNC]](s95)
472  ; CHECK:   [[ADD:%[0-9]+]]:_(s96) = G_ADD [[SEXT]], [[C]]
473  ; CHECK:   G_STORE [[ADD]](s96), [[DEF]](p1) :: (store 12 into `i96 addrspace(1)* undef`, align 8, addrspace 1)
474  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
475  ; CHECK:   S_SETPC_B64_return [[COPY4]]
476  %ext = sext i95 %arg0 to i96
477  %add = add i96 %ext, 12
478  store i96 %add, i96 addrspace(1)* undef
479  ret void
480}
481
482define void @void_func_i96(i96 %arg0) #0 {
483  ; CHECK-LABEL: name: void_func_i96
484  ; CHECK: bb.1 (%ir-block.0):
485  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
486  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
487  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
488  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
489  ; CHECK:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
490  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
491  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
492  ; CHECK:   G_STORE [[MV]](s96), [[DEF]](p1) :: (store 12 into `i96 addrspace(1)* undef`, align 8, addrspace 1)
493  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
494  ; CHECK:   S_SETPC_B64_return [[COPY4]]
495  store i96 %arg0, i96 addrspace(1)* undef
496  ret void
497}
498
499define void @void_func_p0i8(i8* %arg0) #0 {
500  ; CHECK-LABEL: name: void_func_p0i8
501  ; CHECK: bb.1 (%ir-block.0):
502  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
503  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
504  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
505  ; CHECK:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
506  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
507  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
508  ; CHECK:   G_STORE [[MV]](p0), [[DEF]](p1) :: (store 8 into `i8* addrspace(1)* undef`, addrspace 1)
509  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
510  ; CHECK:   S_SETPC_B64_return [[COPY3]]
511  store i8* %arg0, i8* addrspace(1)* undef
512  ret void
513}
514
515define void @void_func_p1i8(i8 addrspace(1)* %arg0) #0 {
516  ; CHECK-LABEL: name: void_func_p1i8
517  ; CHECK: bb.1 (%ir-block.0):
518  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
519  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
520  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
521  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
522  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
523  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
524  ; CHECK:   G_STORE [[MV]](p1), [[DEF]](p1) :: (store 8 into `i8 addrspace(1)* addrspace(1)* undef`, addrspace 1)
525  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
526  ; CHECK:   S_SETPC_B64_return [[COPY3]]
527  store i8 addrspace(1)* %arg0, i8 addrspace(1)* addrspace(1)* undef
528  ret void
529}
530
531define void @void_func_f16(half %arg0) #0 {
532  ; CHECK-LABEL: name: void_func_f16
533  ; CHECK: bb.1 (%ir-block.0):
534  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
535  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
536  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
537  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
538  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
539  ; CHECK:   G_STORE [[TRUNC]](s16), [[DEF]](p1) :: (store 2 into `half addrspace(1)* undef`, addrspace 1)
540  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
541  ; CHECK:   S_SETPC_B64_return [[COPY2]]
542  store half %arg0, half addrspace(1)* undef
543  ret void
544}
545
546define void @void_func_f32(float %arg0) #0 {
547  ; CHECK-LABEL: name: void_func_f32
548  ; CHECK: bb.1 (%ir-block.0):
549  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
550  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
551  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
552  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
553  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `float addrspace(1)* undef`, addrspace 1)
554  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
555  ; CHECK:   S_SETPC_B64_return [[COPY2]]
556  store float %arg0, float addrspace(1)* undef
557  ret void
558}
559
560define void @void_func_f64(double %arg0) #0 {
561  ; CHECK-LABEL: name: void_func_f64
562  ; CHECK: bb.1 (%ir-block.0):
563  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
564  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
565  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
566  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
567  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
568  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
569  ; CHECK:   G_STORE [[MV]](s64), [[DEF]](p1) :: (store 8 into `double addrspace(1)* undef`, addrspace 1)
570  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
571  ; CHECK:   S_SETPC_B64_return [[COPY3]]
572  store double %arg0, double addrspace(1)* undef
573  ret void
574}
575
576define void @void_func_v2i32(<2 x i32> %arg0) #0 {
577  ; CHECK-LABEL: name: void_func_v2i32
578  ; CHECK: bb.1 (%ir-block.0):
579  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
580  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
581  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
582  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
583  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
584  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
585  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x s32>), [[DEF]](p1) :: (store 8 into `<2 x i32> addrspace(1)* undef`, addrspace 1)
586  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
587  ; CHECK:   S_SETPC_B64_return [[COPY3]]
588  store <2 x i32> %arg0, <2 x i32> addrspace(1)* undef
589  ret void
590}
591
592define void @void_func_v2i24(<2 x i24> %arg0) #0 {
593  ; CHECK-LABEL: name: void_func_v2i24
594  ; CHECK: bb.1 (%ir-block.0):
595  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
596  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
597  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
598  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
599  ; CHECK:   [[TRUNC:%[0-9]+]]:_(<2 x s24>) = G_TRUNC [[BUILD_VECTOR]](<2 x s32>)
600  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
601  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
602  ; CHECK:   G_STORE [[TRUNC]](<2 x s24>), [[DEF]](p1) :: (store 6 into `<2 x i24> addrspace(1)* undef`, align 8, addrspace 1)
603  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
604  ; CHECK:   S_SETPC_B64_return [[COPY3]]
605  store <2 x i24> %arg0, <2 x i24> addrspace(1)* undef
606  ret void
607}
608
609define void @void_func_v3i24(<3 x i24> %arg0) #0 {
610  ; CHECK-LABEL: name: void_func_v3i24
611  ; CHECK: bb.1 (%ir-block.0):
612  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
613  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
614  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
615  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
616  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
617  ; CHECK:   [[TRUNC:%[0-9]+]]:_(<3 x s24>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>)
618  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
619  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
620  ; CHECK:   G_STORE [[TRUNC]](<3 x s24>), [[DEF]](p1) :: (store 9 into `<3 x i24> addrspace(1)* undef`, align 16, addrspace 1)
621  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
622  ; CHECK:   S_SETPC_B64_return [[COPY4]]
623  store <3 x i24> %arg0, <3 x i24> addrspace(1)* undef
624  ret void
625}
626
627define void @void_func_v2i8(<2 x i8> %arg0) #0 {
628  ; CHECK-LABEL: name: void_func_v2i8
629  ; CHECK: bb.1 (%ir-block.0):
630  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
631  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
632  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
633  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
634  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
635  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)
636  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(<2 x s8>) = G_TRUNC [[BUILD_VECTOR]](<2 x s16>)
637  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
638  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
639  ; CHECK:   G_STORE [[TRUNC2]](<2 x s8>), [[DEF]](p1) :: (store 2 into `<2 x i8> addrspace(1)* undef`, addrspace 1)
640  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
641  ; CHECK:   S_SETPC_B64_return [[COPY3]]
642  store <2 x i8> %arg0, <2 x i8> addrspace(1)* undef
643  ret void
644}
645
646define void @void_func_v3i8(<3 x i8> %arg0) #0 {
647  ; CHECK-LABEL: name: void_func_v3i8
648  ; CHECK: bb.1 (%ir-block.0):
649  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
650  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
651  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
652  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
653  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
654  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
655  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
656  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16)
657  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(<3 x s8>) = G_TRUNC [[BUILD_VECTOR]](<3 x s16>)
658  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
659  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
660  ; CHECK:   G_STORE [[TRUNC3]](<3 x s8>), [[DEF]](p1) :: (store 3 into `<3 x i8> addrspace(1)* undef`, align 4, addrspace 1)
661  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
662  ; CHECK:   S_SETPC_B64_return [[COPY4]]
663  store <3 x i8> %arg0, <3 x i8> addrspace(1)* undef
664  ret void
665}
666
667define void @void_func_v4i8(<4 x i8> %arg0) #0 {
668  ; CHECK-LABEL: name: void_func_v4i8
669  ; CHECK: bb.1 (%ir-block.0):
670  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
671  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
672  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
673  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
674  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
675  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
676  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
677  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
678  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
679  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16)
680  ; CHECK:   [[TRUNC4:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s16>)
681  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
682  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
683  ; CHECK:   G_STORE [[TRUNC4]](<4 x s8>), [[DEF]](p1) :: (store 4 into `<4 x i8> addrspace(1)* undef`, addrspace 1)
684  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
685  ; CHECK:   S_SETPC_B64_return [[COPY5]]
686  store <4 x i8> %arg0, <4 x i8> addrspace(1)* undef
687  ret void
688}
689
690define void @void_func_v2p3i8(<2 x i8 addrspace(3)*> %arg0) #0 {
691  ; CHECK-LABEL: name: void_func_v2p3i8
692  ; CHECK: bb.1 (%ir-block.0):
693  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
694  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
695  ; CHECK:   [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr1
696  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[COPY]](p3), [[COPY1]](p3)
697  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
698  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
699  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x p3>), [[DEF]](p1) :: (store 8 into `<2 x i8 addrspace(3)*> addrspace(1)* undef`, addrspace 1)
700  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
701  ; CHECK:   S_SETPC_B64_return [[COPY3]]
702  store <2 x i8 addrspace(3)*> %arg0, <2 x i8 addrspace(3)*> addrspace(1)* undef
703  ret void
704}
705
706define void @void_func_v3i32(<3 x i32> %arg0) #0 {
707  ; CHECK-LABEL: name: void_func_v3i32
708  ; CHECK: bb.1 (%ir-block.0):
709  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
710  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
711  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
712  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
713  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
714  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
715  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
716  ; CHECK:   G_STORE [[BUILD_VECTOR]](<3 x s32>), [[DEF]](p1) :: (store 12 into `<3 x i32> addrspace(1)* undef`, align 16, addrspace 1)
717  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
718  ; CHECK:   S_SETPC_B64_return [[COPY4]]
719  store <3 x i32> %arg0, <3 x i32> addrspace(1)* undef
720  ret void
721}
722
723define void @void_func_v4i32(<4 x i32> %arg0) #0 {
724  ; CHECK-LABEL: name: void_func_v4i32
725  ; CHECK: bb.1 (%ir-block.0):
726  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
727  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
728  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
729  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
730  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
731  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
732  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
733  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
734  ; CHECK:   G_STORE [[BUILD_VECTOR]](<4 x s32>), [[DEF]](p1) :: (store 16 into `<4 x i32> addrspace(1)* undef`, addrspace 1)
735  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
736  ; CHECK:   S_SETPC_B64_return [[COPY5]]
737  store <4 x i32> %arg0, <4 x i32> addrspace(1)* undef
738  ret void
739}
740
741define void @void_func_v5i32(<5 x i32> %arg0) #0 {
742  ; CHECK-LABEL: name: void_func_v5i32
743  ; CHECK: bb.1 (%ir-block.0):
744  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $sgpr30_sgpr31
745  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
746  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
747  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
748  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
749  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
750  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32)
751  ; CHECK:   [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
752  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
753  ; CHECK:   G_STORE [[BUILD_VECTOR]](<5 x s32>), [[DEF]](p1) :: (store 20 into `<5 x i32> addrspace(1)* undef`, align 32, addrspace 1)
754  ; CHECK:   [[COPY6:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY5]]
755  ; CHECK:   S_SETPC_B64_return [[COPY6]]
756  store <5 x i32> %arg0, <5 x i32> addrspace(1)* undef
757  ret void
758}
759
760define void @void_func_v8i32(<8 x i32> %arg0) #0 {
761  ; CHECK-LABEL: name: void_func_v8i32
762  ; CHECK: bb.1 (%ir-block.0):
763  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
764  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
765  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
766  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
767  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
768  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
769  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
770  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
771  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
772  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
773  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
774  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
775  ; CHECK:   G_STORE [[BUILD_VECTOR]](<8 x s32>), [[DEF]](p1) :: (store 32 into `<8 x i32> addrspace(1)* undef`, addrspace 1)
776  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
777  ; CHECK:   S_SETPC_B64_return [[COPY9]]
778  store <8 x i32> %arg0, <8 x i32> addrspace(1)* undef
779  ret void
780}
781
782define void @void_func_v16i32(<16 x i32> %arg0) #0 {
783  ; CHECK-LABEL: name: void_func_v16i32
784  ; CHECK: bb.1 (%ir-block.0):
785  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $sgpr30_sgpr31
786  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
787  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
788  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
789  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
790  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
791  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
792  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
793  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
794  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
795  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
796  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
797  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
798  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
799  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
800  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
801  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
802  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32)
803  ; CHECK:   [[COPY16:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
804  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
805  ; CHECK:   G_STORE [[BUILD_VECTOR]](<16 x s32>), [[DEF]](p1) :: (store 64 into `<16 x i32> addrspace(1)* undef`, addrspace 1)
806  ; CHECK:   [[COPY17:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY16]]
807  ; CHECK:   S_SETPC_B64_return [[COPY17]]
808  store <16 x i32> %arg0, <16 x i32> addrspace(1)* undef
809  ret void
810}
811
812define void @void_func_v32i32(<32 x i32> %arg0) #0 {
813  ; CHECK-LABEL: name: void_func_v32i32
814  ; CHECK: bb.1 (%ir-block.0):
815  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
816  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
817  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
818  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
819  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
820  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
821  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
822  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
823  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
824  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
825  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
826  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
827  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
828  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
829  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
830  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
831  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
832  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
833  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
834  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
835  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
836  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
837  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
838  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
839  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
840  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
841  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
842  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
843  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
844  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
845  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
846  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
847  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
848  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
849  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
850  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
851  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
852  ; CHECK:   [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
853  ; CHECK:   S_SETPC_B64_return [[COPY33]]
854  store <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
855  ret void
856}
857
858; 1 over register limit
859define void @void_func_v33i32(<33 x i32> %arg0) #0 {
860  ; CHECK-LABEL: name: void_func_v33i32
861  ; CHECK: bb.1 (%ir-block.0):
862  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
863  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
864  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
865  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
866  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
867  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
868  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
869  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
870  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
871  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
872  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
873  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
874  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
875  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
876  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
877  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
878  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
879  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
880  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
881  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
882  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
883  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
884  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
885  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
886  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
887  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
888  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
889  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
890  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
891  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
892  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
893  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
894  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
895  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
896  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.0, align 16, addrspace 5)
897  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<33 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32), [[LOAD]](s32)
898  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
899  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
900  ; CHECK:   G_STORE [[BUILD_VECTOR]](<33 x s32>), [[DEF]](p1) :: (store 132 into `<33 x i32> addrspace(1)* undef`, align 256, addrspace 1)
901  ; CHECK:   [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
902  ; CHECK:   S_SETPC_B64_return [[COPY33]]
903  store <33 x i32> %arg0, <33 x i32> addrspace(1)* undef
904  ret void
905}
906
907define void @void_func_v2i64(<2 x i64> %arg0) #0 {
908  ; CHECK-LABEL: name: void_func_v2i64
909  ; CHECK: bb.1 (%ir-block.0):
910  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
911  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
912  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
913  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
914  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
915  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
916  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
917  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)
918  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
919  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
920  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x s64>), [[DEF]](p1) :: (store 16 into `<2 x i64> addrspace(1)* undef`, addrspace 1)
921  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
922  ; CHECK:   S_SETPC_B64_return [[COPY5]]
923  store <2 x i64> %arg0, <2 x i64> addrspace(1)* undef
924  ret void
925}
926
927define void @void_func_v2p0i8(<2 x i8*> %arg0) #0 {
928  ; CHECK-LABEL: name: void_func_v2p0i8
929  ; CHECK: bb.1 (%ir-block.0):
930  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
931  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
932  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
933  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
934  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
935  ; CHECK:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
936  ; CHECK:   [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
937  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[MV]](p0), [[MV1]](p0)
938  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
939  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
940  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x p0>), [[DEF]](p1) :: (store 16 into `<2 x i8*> addrspace(1)* undef`, addrspace 1)
941  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
942  ; CHECK:   S_SETPC_B64_return [[COPY5]]
943  store <2 x i8*> %arg0, <2 x i8*> addrspace(1)* undef
944  ret void
945}
946
947define void @void_func_v2p1i8(<2 x i8 addrspace(1)*> %arg0) #0 {
948  ; CHECK-LABEL: name: void_func_v2p1i8
949  ; CHECK: bb.1 (%ir-block.0):
950  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
951  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
952  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
953  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
954  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
955  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
956  ; CHECK:   [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
957  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1)
958  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
959  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
960  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x p1>), [[DEF]](p1) :: (store 16 into `<2 x i8 addrspace(1)*> addrspace(1)* undef`, addrspace 1)
961  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
962  ; CHECK:   S_SETPC_B64_return [[COPY5]]
963  store <2 x i8 addrspace(1)*> %arg0, <2 x i8 addrspace(1)*> addrspace(1)* undef
964  ret void
965}
966
967define void @void_func_v3i64(<3 x i64> %arg0) #0 {
968  ; CHECK-LABEL: name: void_func_v3i64
969  ; CHECK: bb.1 (%ir-block.0):
970  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr30_sgpr31
971  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
972  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
973  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
974  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
975  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
976  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
977  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
978  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
979  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
980  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64)
981  ; CHECK:   [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
982  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
983  ; CHECK:   G_STORE [[BUILD_VECTOR]](<3 x s64>), [[DEF]](p1) :: (store 24 into `<3 x i64> addrspace(1)* undef`, align 32, addrspace 1)
984  ; CHECK:   [[COPY7:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY6]]
985  ; CHECK:   S_SETPC_B64_return [[COPY7]]
986  store <3 x i64> %arg0, <3 x i64> addrspace(1)* undef
987  ret void
988}
989
990define void @void_func_v4i64(<4 x i64> %arg0) #0 {
991  ; CHECK-LABEL: name: void_func_v4i64
992  ; CHECK: bb.1 (%ir-block.0):
993  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
994  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
995  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
996  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
997  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
998  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
999  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1000  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1001  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1002  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1003  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1004  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1005  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1006  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64)
1007  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1008  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1009  ; CHECK:   G_STORE [[BUILD_VECTOR]](<4 x s64>), [[DEF]](p1) :: (store 32 into `<4 x i64> addrspace(1)* undef`, addrspace 1)
1010  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
1011  ; CHECK:   S_SETPC_B64_return [[COPY9]]
1012  store <4 x i64> %arg0, <4 x i64> addrspace(1)* undef
1013  ret void
1014}
1015
1016define void @void_func_v5i64(<5 x i64> %arg0) #0 {
1017  ; CHECK-LABEL: name: void_func_v5i64
1018  ; CHECK: bb.1 (%ir-block.0):
1019  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $sgpr30_sgpr31
1020  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1021  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1022  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1023  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1024  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1025  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1026  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1027  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1028  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1029  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1030  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1031  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1032  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1033  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1034  ; CHECK:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
1035  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64)
1036  ; CHECK:   [[COPY10:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1037  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1038  ; CHECK:   G_STORE [[BUILD_VECTOR]](<5 x s64>), [[DEF]](p1) :: (store 40 into `<5 x i64> addrspace(1)* undef`, align 64, addrspace 1)
1039  ; CHECK:   [[COPY11:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY10]]
1040  ; CHECK:   S_SETPC_B64_return [[COPY11]]
1041  store <5 x i64> %arg0, <5 x i64> addrspace(1)* undef
1042  ret void
1043}
1044
1045define void @void_func_v8i64(<8 x i64> %arg0) #0 {
1046  ; CHECK-LABEL: name: void_func_v8i64
1047  ; CHECK: bb.1 (%ir-block.0):
1048  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $sgpr30_sgpr31
1049  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1050  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1051  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1052  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1053  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1054  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1055  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1056  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1057  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1058  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1059  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1060  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1061  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1062  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1063  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1064  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1065  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1066  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1067  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1068  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1069  ; CHECK:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
1070  ; CHECK:   [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY10]](s32), [[COPY11]](s32)
1071  ; CHECK:   [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY12]](s32), [[COPY13]](s32)
1072  ; CHECK:   [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY14]](s32), [[COPY15]](s32)
1073  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64), [[MV5]](s64), [[MV6]](s64), [[MV7]](s64)
1074  ; CHECK:   [[COPY16:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1075  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1076  ; CHECK:   G_STORE [[BUILD_VECTOR]](<8 x s64>), [[DEF]](p1) :: (store 64 into `<8 x i64> addrspace(1)* undef`, addrspace 1)
1077  ; CHECK:   [[COPY17:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY16]]
1078  ; CHECK:   S_SETPC_B64_return [[COPY17]]
1079  store <8 x i64> %arg0, <8 x i64> addrspace(1)* undef
1080  ret void
1081}
1082
1083define void @void_func_v16i64(<16 x i64> %arg0) #0 {
1084  ; CHECK-LABEL: name: void_func_v16i64
1085  ; CHECK: bb.1 (%ir-block.0):
1086  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1087  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1088  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1089  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1090  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1091  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1092  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1093  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1094  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1095  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1096  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1097  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1098  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1099  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1100  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1101  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1102  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1103  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
1104  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
1105  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
1106  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
1107  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
1108  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
1109  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
1110  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
1111  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
1112  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
1113  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
1114  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
1115  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
1116  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
1117  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
1118  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
1119  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1120  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1121  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1122  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1123  ; CHECK:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
1124  ; CHECK:   [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY10]](s32), [[COPY11]](s32)
1125  ; CHECK:   [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY12]](s32), [[COPY13]](s32)
1126  ; CHECK:   [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY14]](s32), [[COPY15]](s32)
1127  ; CHECK:   [[MV8:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY16]](s32), [[COPY17]](s32)
1128  ; CHECK:   [[MV9:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY18]](s32), [[COPY19]](s32)
1129  ; CHECK:   [[MV10:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY20]](s32), [[COPY21]](s32)
1130  ; CHECK:   [[MV11:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY22]](s32), [[COPY23]](s32)
1131  ; CHECK:   [[MV12:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY24]](s32), [[COPY25]](s32)
1132  ; CHECK:   [[MV13:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY26]](s32), [[COPY27]](s32)
1133  ; CHECK:   [[MV14:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY28]](s32), [[COPY29]](s32)
1134  ; CHECK:   [[MV15:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY30]](s32), [[COPY31]](s32)
1135  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64), [[MV5]](s64), [[MV6]](s64), [[MV7]](s64), [[MV8]](s64), [[MV9]](s64), [[MV10]](s64), [[MV11]](s64), [[MV12]](s64), [[MV13]](s64), [[MV14]](s64), [[MV15]](s64)
1136  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1137  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1138  ; CHECK:   G_STORE [[BUILD_VECTOR]](<16 x s64>), [[DEF]](p1) :: (store 128 into `<16 x i64> addrspace(1)* undef`, addrspace 1)
1139  ; CHECK:   [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1140  ; CHECK:   S_SETPC_B64_return [[COPY33]]
1141  store <16 x i64> %arg0, <16 x i64> addrspace(1)* undef
1142  ret void
1143}
1144
1145define void @void_func_v2i16(<2 x i16> %arg0) #0 {
1146  ; CHECK-LABEL: name: void_func_v2i16
1147  ; CHECK: bb.1 (%ir-block.0):
1148  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
1149  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1150  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1151  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1152  ; CHECK:   G_STORE [[COPY]](<2 x s16>), [[DEF]](p1) :: (store 4 into `<2 x i16> addrspace(1)* undef`, addrspace 1)
1153  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
1154  ; CHECK:   S_SETPC_B64_return [[COPY2]]
1155  store <2 x i16> %arg0, <2 x i16> addrspace(1)* undef
1156  ret void
1157}
1158
1159define void @void_func_v3i16(<3 x i16> %arg0) #0 {
1160  ; CHECK-LABEL: name: void_func_v3i16
1161  ; CHECK: bb.1 (%ir-block.0):
1162  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1163  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1164  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1165  ; CHECK:   [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
1166  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[DEF]](<2 x s16>)
1167  ; CHECK:   [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>)
1168  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1169  ; CHECK:   [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1170  ; CHECK:   G_STORE [[UV]](<3 x s16>), [[DEF1]](p1) :: (store 6 into `<3 x i16> addrspace(1)* undef`, align 8, addrspace 1)
1171  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1172  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1173  store <3 x i16> %arg0, <3 x i16> addrspace(1)* undef
1174  ret void
1175}
1176
1177define void @void_func_v4i16(<4 x i16> %arg0) #0 {
1178  ; CHECK-LABEL: name: void_func_v4i16
1179  ; CHECK: bb.1 (%ir-block.0):
1180  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1181  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1182  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1183  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
1184  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1185  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1186  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<4 x s16>), [[DEF]](p1) :: (store 8 into `<4 x i16> addrspace(1)* undef`, addrspace 1)
1187  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1188  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1189  store <4 x i16> %arg0, <4 x i16> addrspace(1)* undef
1190  ret void
1191}
1192
1193define void @void_func_v5i16(<5 x i16> %arg0) #0 {
1194  ; CHECK-LABEL: name: void_func_v5i16
1195  ; CHECK: bb.1 (%ir-block.0):
1196  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
1197  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1198  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1199  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1200  ; CHECK:   [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
1201  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<10 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>)
1202  ; CHECK:   [[UV:%[0-9]+]]:_(<5 x s16>), [[UV1:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<10 x s16>)
1203  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1204  ; CHECK:   [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1205  ; CHECK:   G_STORE [[UV]](<5 x s16>), [[DEF1]](p1) :: (store 10 into `<5 x i16> addrspace(1)* undef`, align 16, addrspace 1)
1206  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
1207  ; CHECK:   S_SETPC_B64_return [[COPY4]]
1208  store <5 x i16> %arg0, <5 x i16> addrspace(1)* undef
1209  ret void
1210}
1211
1212define void @void_func_v8i16(<8 x i16> %arg0) #0 {
1213  ; CHECK-LABEL: name: void_func_v8i16
1214  ; CHECK: bb.1 (%ir-block.0):
1215  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
1216  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1217  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1218  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1219  ; CHECK:   [[COPY3:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr3
1220  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>)
1221  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1222  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1223  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<8 x s16>), [[DEF]](p1) :: (store 16 into `<8 x i16> addrspace(1)* undef`, addrspace 1)
1224  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
1225  ; CHECK:   S_SETPC_B64_return [[COPY5]]
1226  store <8 x i16> %arg0, <8 x i16> addrspace(1)* undef
1227  ret void
1228}
1229
1230define void @void_func_v16i16(<16 x i16> %arg0) #0 {
1231  ; CHECK-LABEL: name: void_func_v16i16
1232  ; CHECK: bb.1 (%ir-block.0):
1233  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
1234  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1235  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1236  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1237  ; CHECK:   [[COPY3:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr3
1238  ; CHECK:   [[COPY4:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr4
1239  ; CHECK:   [[COPY5:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr5
1240  ; CHECK:   [[COPY6:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr6
1241  ; CHECK:   [[COPY7:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr7
1242  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>), [[COPY4]](<2 x s16>), [[COPY5]](<2 x s16>), [[COPY6]](<2 x s16>), [[COPY7]](<2 x s16>)
1243  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1244  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1245  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<16 x s16>), [[DEF]](p1) :: (store 32 into `<16 x i16> addrspace(1)* undef`, addrspace 1)
1246  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
1247  ; CHECK:   S_SETPC_B64_return [[COPY9]]
1248  store <16 x i16> %arg0, <16 x i16> addrspace(1)* undef
1249  ret void
1250}
1251
1252; <2 x i16> pieces that start spilling to the stack.
1253; FIXME: load of 2 would be sufficient for last piece
1254define void @void_func_v65i16(<65 x i16> %arg0) #0 {
1255  ; CHECK-LABEL: name: void_func_v65i16
1256  ; CHECK: bb.1 (%ir-block.0):
1257  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1258  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1259  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1260  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1261  ; CHECK:   [[COPY3:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr3
1262  ; CHECK:   [[COPY4:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr4
1263  ; CHECK:   [[COPY5:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr5
1264  ; CHECK:   [[COPY6:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr6
1265  ; CHECK:   [[COPY7:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr7
1266  ; CHECK:   [[COPY8:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr8
1267  ; CHECK:   [[COPY9:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr9
1268  ; CHECK:   [[COPY10:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr10
1269  ; CHECK:   [[COPY11:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr11
1270  ; CHECK:   [[COPY12:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr12
1271  ; CHECK:   [[COPY13:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr13
1272  ; CHECK:   [[COPY14:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr14
1273  ; CHECK:   [[COPY15:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr15
1274  ; CHECK:   [[COPY16:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr16
1275  ; CHECK:   [[COPY17:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr17
1276  ; CHECK:   [[COPY18:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr18
1277  ; CHECK:   [[COPY19:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr19
1278  ; CHECK:   [[COPY20:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr20
1279  ; CHECK:   [[COPY21:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr21
1280  ; CHECK:   [[COPY22:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr22
1281  ; CHECK:   [[COPY23:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr23
1282  ; CHECK:   [[COPY24:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr24
1283  ; CHECK:   [[COPY25:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr25
1284  ; CHECK:   [[COPY26:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr26
1285  ; CHECK:   [[COPY27:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr27
1286  ; CHECK:   [[COPY28:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr28
1287  ; CHECK:   [[COPY29:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr29
1288  ; CHECK:   [[COPY30:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr30
1289  ; CHECK:   [[COPY31:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr31
1290  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1291  ; CHECK:   [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.0, align 16, addrspace 5)
1292  ; CHECK:   [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
1293  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<130 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>), [[COPY4]](<2 x s16>), [[COPY5]](<2 x s16>), [[COPY6]](<2 x s16>), [[COPY7]](<2 x s16>), [[COPY8]](<2 x s16>), [[COPY9]](<2 x s16>), [[COPY10]](<2 x s16>), [[COPY11]](<2 x s16>), [[COPY12]](<2 x s16>), [[COPY13]](<2 x s16>), [[COPY14]](<2 x s16>), [[COPY15]](<2 x s16>), [[COPY16]](<2 x s16>), [[COPY17]](<2 x s16>), [[COPY18]](<2 x s16>), [[COPY19]](<2 x s16>), [[COPY20]](<2 x s16>), [[COPY21]](<2 x s16>), [[COPY22]](<2 x s16>), [[COPY23]](<2 x s16>), [[COPY24]](<2 x s16>), [[COPY25]](<2 x s16>), [[COPY26]](<2 x s16>), [[COPY27]](<2 x s16>), [[COPY28]](<2 x s16>), [[COPY29]](<2 x s16>), [[COPY30]](<2 x s16>), [[COPY31]](<2 x s16>), [[LOAD]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>), [[DEF]](<2 x s16>)
1294  ; CHECK:   [[UV:%[0-9]+]]:_(<65 x s16>), [[UV1:%[0-9]+]]:_(<65 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<130 x s16>)
1295  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1296  ; CHECK:   [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1297  ; CHECK:   G_STORE [[UV]](<65 x s16>), [[DEF1]](p1) :: (store 130 into `<65 x i16> addrspace(1)* undef`, align 256, addrspace 1)
1298  ; CHECK:   [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1299  ; CHECK:   S_SETPC_B64_return [[COPY33]]
1300  store <65 x i16> %arg0, <65 x i16> addrspace(1)* undef
1301  ret void
1302}
1303
1304define void @void_func_v2f32(<2 x float> %arg0) #0 {
1305  ; CHECK-LABEL: name: void_func_v2f32
1306  ; CHECK: bb.1 (%ir-block.0):
1307  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1308  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1309  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1310  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
1311  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1312  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1313  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x s32>), [[DEF]](p1) :: (store 8 into `<2 x float> addrspace(1)* undef`, addrspace 1)
1314  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1315  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1316  store <2 x float> %arg0, <2 x float> addrspace(1)* undef
1317  ret void
1318}
1319
1320define void @void_func_v3f32(<3 x float> %arg0) #0 {
1321  ; CHECK-LABEL: name: void_func_v3f32
1322  ; CHECK: bb.1 (%ir-block.0):
1323  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
1324  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1325  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1326  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1327  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
1328  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1329  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1330  ; CHECK:   G_STORE [[BUILD_VECTOR]](<3 x s32>), [[DEF]](p1) :: (store 12 into `<3 x float> addrspace(1)* undef`, align 16, addrspace 1)
1331  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
1332  ; CHECK:   S_SETPC_B64_return [[COPY4]]
1333  store <3 x float> %arg0, <3 x float> addrspace(1)* undef
1334  ret void
1335}
1336
1337define void @void_func_v4f32(<4 x float> %arg0) #0 {
1338  ; CHECK-LABEL: name: void_func_v4f32
1339  ; CHECK: bb.1 (%ir-block.0):
1340  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
1341  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1342  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1343  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1344  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1345  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
1346  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1347  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1348  ; CHECK:   G_STORE [[BUILD_VECTOR]](<4 x s32>), [[DEF]](p1) :: (store 16 into `<4 x float> addrspace(1)* undef`, addrspace 1)
1349  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
1350  ; CHECK:   S_SETPC_B64_return [[COPY5]]
1351  store <4 x float> %arg0, <4 x float> addrspace(1)* undef
1352  ret void
1353}
1354
1355define void @void_func_v8f32(<8 x float> %arg0) #0 {
1356  ; CHECK-LABEL: name: void_func_v8f32
1357  ; CHECK: bb.1 (%ir-block.0):
1358  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
1359  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1360  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1361  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1362  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1363  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1364  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1365  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1366  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1367  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
1368  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1369  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1370  ; CHECK:   G_STORE [[BUILD_VECTOR]](<8 x s32>), [[DEF]](p1) :: (store 32 into `<8 x float> addrspace(1)* undef`, addrspace 1)
1371  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
1372  ; CHECK:   S_SETPC_B64_return [[COPY9]]
1373  store <8 x float> %arg0, <8 x float> addrspace(1)* undef
1374  ret void
1375}
1376
1377define void @void_func_v16f32(<16 x float> %arg0) #0 {
1378  ; CHECK-LABEL: name: void_func_v16f32
1379  ; CHECK: bb.1 (%ir-block.0):
1380  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $sgpr30_sgpr31
1381  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1382  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1383  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1384  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1385  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1386  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1387  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1388  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1389  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1390  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1391  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1392  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1393  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1394  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1395  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1396  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1397  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32)
1398  ; CHECK:   [[COPY16:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1399  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1400  ; CHECK:   G_STORE [[BUILD_VECTOR]](<16 x s32>), [[DEF]](p1) :: (store 64 into `<16 x float> addrspace(1)* undef`, addrspace 1)
1401  ; CHECK:   [[COPY17:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY16]]
1402  ; CHECK:   S_SETPC_B64_return [[COPY17]]
1403  store <16 x float> %arg0, <16 x float> addrspace(1)* undef
1404  ret void
1405}
1406
1407define void @void_func_v2f64(<2 x double> %arg0) #0 {
1408  ; CHECK-LABEL: name: void_func_v2f64
1409  ; CHECK: bb.1 (%ir-block.0):
1410  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
1411  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1412  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1413  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1414  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1415  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1416  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1417  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)
1418  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1419  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1420  ; CHECK:   G_STORE [[BUILD_VECTOR]](<2 x s64>), [[DEF]](p1) :: (store 16 into `<2 x double> addrspace(1)* undef`, addrspace 1)
1421  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
1422  ; CHECK:   S_SETPC_B64_return [[COPY5]]
1423  store <2 x double> %arg0, <2 x double> addrspace(1)* undef
1424  ret void
1425}
1426
1427define void @void_func_v3f64(<3 x double> %arg0) #0 {
1428  ; CHECK-LABEL: name: void_func_v3f64
1429  ; CHECK: bb.1 (%ir-block.0):
1430  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr30_sgpr31
1431  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1432  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1433  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1434  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1435  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1436  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1437  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1438  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1439  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1440  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64)
1441  ; CHECK:   [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1442  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1443  ; CHECK:   G_STORE [[BUILD_VECTOR]](<3 x s64>), [[DEF]](p1) :: (store 24 into `<3 x double> addrspace(1)* undef`, align 32, addrspace 1)
1444  ; CHECK:   [[COPY7:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY6]]
1445  ; CHECK:   S_SETPC_B64_return [[COPY7]]
1446  store <3 x double> %arg0, <3 x double> addrspace(1)* undef
1447  ret void
1448}
1449
1450define void @void_func_v4f64(<4 x double> %arg0) #0 {
1451  ; CHECK-LABEL: name: void_func_v4f64
1452  ; CHECK: bb.1 (%ir-block.0):
1453  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
1454  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1455  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1456  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1457  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1458  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1459  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1460  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1461  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1462  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1463  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1464  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1465  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1466  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64)
1467  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1468  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1469  ; CHECK:   G_STORE [[BUILD_VECTOR]](<4 x s64>), [[DEF]](p1) :: (store 32 into `<4 x double> addrspace(1)* undef`, addrspace 1)
1470  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
1471  ; CHECK:   S_SETPC_B64_return [[COPY9]]
1472  store <4 x double> %arg0, <4 x double> addrspace(1)* undef
1473  ret void
1474}
1475
1476define void @void_func_v8f64(<8 x double> %arg0) #0 {
1477  ; CHECK-LABEL: name: void_func_v8f64
1478  ; CHECK: bb.1 (%ir-block.0):
1479  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $sgpr30_sgpr31
1480  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1481  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1482  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1483  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1484  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1485  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1486  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1487  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1488  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1489  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1490  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1491  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1492  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1493  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1494  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1495  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1496  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1497  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1498  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1499  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1500  ; CHECK:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
1501  ; CHECK:   [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY10]](s32), [[COPY11]](s32)
1502  ; CHECK:   [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY12]](s32), [[COPY13]](s32)
1503  ; CHECK:   [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY14]](s32), [[COPY15]](s32)
1504  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64), [[MV5]](s64), [[MV6]](s64), [[MV7]](s64)
1505  ; CHECK:   [[COPY16:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1506  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1507  ; CHECK:   G_STORE [[BUILD_VECTOR]](<8 x s64>), [[DEF]](p1) :: (store 64 into `<8 x double> addrspace(1)* undef`, addrspace 1)
1508  ; CHECK:   [[COPY17:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY16]]
1509  ; CHECK:   S_SETPC_B64_return [[COPY17]]
1510  store <8 x double> %arg0, <8 x double> addrspace(1)* undef
1511  ret void
1512}
1513
1514define void @void_func_v16f64(<16 x double> %arg0) #0 {
1515  ; CHECK-LABEL: name: void_func_v16f64
1516  ; CHECK: bb.1 (%ir-block.0):
1517  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1518  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1519  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1520  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1521  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1522  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1523  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1524  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1525  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1526  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1527  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1528  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1529  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1530  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1531  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1532  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1533  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1534  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
1535  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
1536  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
1537  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
1538  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
1539  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
1540  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
1541  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
1542  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
1543  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
1544  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
1545  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
1546  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
1547  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
1548  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
1549  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
1550  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
1551  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
1552  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
1553  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
1554  ; CHECK:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
1555  ; CHECK:   [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY10]](s32), [[COPY11]](s32)
1556  ; CHECK:   [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY12]](s32), [[COPY13]](s32)
1557  ; CHECK:   [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY14]](s32), [[COPY15]](s32)
1558  ; CHECK:   [[MV8:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY16]](s32), [[COPY17]](s32)
1559  ; CHECK:   [[MV9:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY18]](s32), [[COPY19]](s32)
1560  ; CHECK:   [[MV10:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY20]](s32), [[COPY21]](s32)
1561  ; CHECK:   [[MV11:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY22]](s32), [[COPY23]](s32)
1562  ; CHECK:   [[MV12:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY24]](s32), [[COPY25]](s32)
1563  ; CHECK:   [[MV13:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY26]](s32), [[COPY27]](s32)
1564  ; CHECK:   [[MV14:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY28]](s32), [[COPY29]](s32)
1565  ; CHECK:   [[MV15:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY30]](s32), [[COPY31]](s32)
1566  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64), [[MV5]](s64), [[MV6]](s64), [[MV7]](s64), [[MV8]](s64), [[MV9]](s64), [[MV10]](s64), [[MV11]](s64), [[MV12]](s64), [[MV13]](s64), [[MV14]](s64), [[MV15]](s64)
1567  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1568  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1569  ; CHECK:   G_STORE [[BUILD_VECTOR]](<16 x s64>), [[DEF]](p1) :: (store 128 into `<16 x double> addrspace(1)* undef`, addrspace 1)
1570  ; CHECK:   [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1571  ; CHECK:   S_SETPC_B64_return [[COPY33]]
1572  store <16 x double> %arg0, <16 x double> addrspace(1)* undef
1573  ret void
1574}
1575
1576define void @void_func_v2f16(<2 x half> %arg0) #0 {
1577  ; CHECK-LABEL: name: void_func_v2f16
1578  ; CHECK: bb.1 (%ir-block.0):
1579  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
1580  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1581  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1582  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1583  ; CHECK:   G_STORE [[COPY]](<2 x s16>), [[DEF]](p1) :: (store 4 into `<2 x half> addrspace(1)* undef`, addrspace 1)
1584  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
1585  ; CHECK:   S_SETPC_B64_return [[COPY2]]
1586  store <2 x half> %arg0, <2 x half> addrspace(1)* undef
1587  ret void
1588}
1589
1590define void @void_func_v3f16(<3 x half> %arg0) #0 {
1591  ; CHECK-LABEL: name: void_func_v3f16
1592  ; CHECK: bb.1 (%ir-block.0):
1593  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1594  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1595  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1596  ; CHECK:   [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
1597  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[DEF]](<2 x s16>)
1598  ; CHECK:   [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>)
1599  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1600  ; CHECK:   [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1601  ; CHECK:   G_STORE [[UV]](<3 x s16>), [[DEF1]](p1) :: (store 6 into `<3 x half> addrspace(1)* undef`, align 8, addrspace 1)
1602  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1603  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1604  store <3 x half> %arg0, <3 x half> addrspace(1)* undef
1605  ret void
1606}
1607
1608define void @void_func_v4f16(<4 x half> %arg0) #0 {
1609  ; CHECK-LABEL: name: void_func_v4f16
1610  ; CHECK: bb.1 (%ir-block.0):
1611  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1612  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1613  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1614  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
1615  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1616  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1617  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<4 x s16>), [[DEF]](p1) :: (store 8 into `<4 x half> addrspace(1)* undef`, addrspace 1)
1618  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1619  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1620  store <4 x half> %arg0, <4 x half> addrspace(1)* undef
1621  ret void
1622}
1623
1624define void @void_func_v8f16(<8 x half> %arg0) #0 {
1625  ; CHECK-LABEL: name: void_func_v8f16
1626  ; CHECK: bb.1 (%ir-block.0):
1627  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
1628  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1629  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1630  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1631  ; CHECK:   [[COPY3:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr3
1632  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>)
1633  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1634  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1635  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<8 x s16>), [[DEF]](p1) :: (store 16 into `<8 x half> addrspace(1)* undef`, addrspace 1)
1636  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
1637  ; CHECK:   S_SETPC_B64_return [[COPY5]]
1638  store <8 x half> %arg0, <8 x half> addrspace(1)* undef
1639  ret void
1640}
1641
1642define void @void_func_v16f16(<16 x half> %arg0) #0 {
1643  ; CHECK-LABEL: name: void_func_v16f16
1644  ; CHECK: bb.1 (%ir-block.0):
1645  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31
1646  ; CHECK:   [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
1647  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
1648  ; CHECK:   [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2
1649  ; CHECK:   [[COPY3:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr3
1650  ; CHECK:   [[COPY4:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr4
1651  ; CHECK:   [[COPY5:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr5
1652  ; CHECK:   [[COPY6:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr6
1653  ; CHECK:   [[COPY7:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr7
1654  ; CHECK:   [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>), [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>), [[COPY4]](<2 x s16>), [[COPY5]](<2 x s16>), [[COPY6]](<2 x s16>), [[COPY7]](<2 x s16>)
1655  ; CHECK:   [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1656  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1657  ; CHECK:   G_STORE [[CONCAT_VECTORS]](<16 x s16>), [[DEF]](p1) :: (store 32 into `<16 x half> addrspace(1)* undef`, addrspace 1)
1658  ; CHECK:   [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]]
1659  ; CHECK:   S_SETPC_B64_return [[COPY9]]
1660  store <16 x half> %arg0, <16 x half> addrspace(1)* undef
1661  ret void
1662}
1663
1664; Make sure there is no alignment requirement for passed vgprs.
1665define void @void_func_i32_i64_i32(i32 %arg0, i64 %arg1, i32 %arg2) #0 {
1666  ; CHECK-LABEL: name: void_func_i32_i64_i32
1667  ; CHECK: bb.1 (%ir-block.0):
1668  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
1669  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1670  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1671  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1672  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
1673  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1674  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1675  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1676  ; CHECK:   [[COPY5:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1677  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (volatile store 4 into `i32 addrspace(1)* undef`, addrspace 1)
1678  ; CHECK:   G_STORE [[MV]](s64), [[COPY5]](p1) :: (volatile store 8 into `i64 addrspace(1)* undef`, addrspace 1)
1679  ; CHECK:   G_STORE [[COPY3]](s32), [[DEF]](p1) :: (volatile store 4 into `i32 addrspace(1)* undef`, addrspace 1)
1680  ; CHECK:   [[COPY6:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
1681  ; CHECK:   S_SETPC_B64_return [[COPY6]]
1682  store volatile i32 %arg0, i32 addrspace(1)* undef
1683  store volatile i64 %arg1, i64 addrspace(1)* undef
1684  store volatile i32 %arg2, i32 addrspace(1)* undef
1685  ret void
1686}
1687
1688define void @void_func_struct_i32({ i32 } %arg0) #0 {
1689  ; CHECK-LABEL: name: void_func_struct_i32
1690  ; CHECK: bb.1 (%ir-block.0):
1691  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
1692  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1693  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1694  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1695  ; CHECK:   G_STORE [[COPY]](s32), [[DEF]](p1) :: (store 4 into `{ i32 } addrspace(1)* undef`, addrspace 1)
1696  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
1697  ; CHECK:   S_SETPC_B64_return [[COPY2]]
1698  store { i32 } %arg0, { i32 } addrspace(1)* undef
1699  ret void
1700}
1701
1702define void @void_func_struct_i8_i32({ i8, i32 } %arg0) #0 {
1703  ; CHECK-LABEL: name: void_func_struct_i8_i32
1704  ; CHECK: bb.1 (%ir-block.0):
1705  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
1706  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1707  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
1708  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC]](s16)
1709  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1710  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1711  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1712  ; CHECK:   G_STORE [[TRUNC1]](s8), [[DEF]](p1) :: (store 1 into `{ i8, i32 } addrspace(1)* undef`, align 4, addrspace 1)
1713  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
1714  ; CHECK:   [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[DEF]], [[C]](s64)
1715  ; CHECK:   G_STORE [[COPY1]](s32), [[PTR_ADD]](p1) :: (store 4 into `{ i8, i32 } addrspace(1)* undef` + 4, addrspace 1)
1716  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
1717  ; CHECK:   S_SETPC_B64_return [[COPY3]]
1718  store { i8, i32 } %arg0, { i8, i32 } addrspace(1)* undef
1719  ret void
1720}
1721
1722define void @void_func_byval_struct_i8_i32({ i8, i32 } addrspace(5)* byval({ i8, i32 }) %arg0) #0 {
1723  ; CHECK-LABEL: name: void_func_byval_struct_i8_i32
1724  ; CHECK: bb.1 (%ir-block.0):
1725  ; CHECK:   liveins: $sgpr30_sgpr31
1726  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1727  ; CHECK:   [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.0, align 16, addrspace 5)
1728  ; CHECK:   [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1729  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1730  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p5) :: (dereferenceable load 1 from %ir.arg0, align 4, addrspace 5)
1731  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
1732  ; CHECK:   [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[LOAD]], [[C]](s32)
1733  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (dereferenceable load 4 from %ir.arg0 + 4, addrspace 5)
1734  ; CHECK:   G_STORE [[LOAD1]](s8), [[DEF]](p1) :: (store 1 into `{ i8, i32 } addrspace(1)* undef`, align 4, addrspace 1)
1735  ; CHECK:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
1736  ; CHECK:   [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[DEF]], [[C1]](s64)
1737  ; CHECK:   G_STORE [[LOAD2]](s32), [[PTR_ADD1]](p1) :: (store 4 into `{ i8, i32 } addrspace(1)* undef` + 4, addrspace 1)
1738  ; CHECK:   [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]]
1739  ; CHECK:   S_SETPC_B64_return [[COPY1]]
1740  %arg0.load = load { i8, i32 }, { i8, i32 } addrspace(5)* %arg0
1741  store { i8, i32 } %arg0.load, { i8, i32 } addrspace(1)* undef
1742  ret void
1743}
1744
1745define void @void_func_byval_struct_i8_i32_x2({ i8, i32 } addrspace(5)* byval({ i8, i32 }) %arg0, { i8, i32 } addrspace(5)* byval({ i8, i32 }) %arg1, i32 %arg2) #0 {
1746  ; CHECK-LABEL: name: void_func_byval_struct_i8_i32_x2
1747  ; CHECK: bb.1 (%ir-block.0):
1748  ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
1749  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
1750  ; CHECK:   [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.1, align 16, addrspace 5)
1751  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1752  ; CHECK:   [[LOAD1:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.0, align 8, addrspace 5)
1753  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1754  ; CHECK:   [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1755  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1756  ; CHECK:   [[DEF1:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
1757  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p5) :: (volatile dereferenceable load 1 from %ir.arg0, align 4, addrspace 5)
1758  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
1759  ; CHECK:   [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[LOAD]], [[C]](s32)
1760  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (volatile dereferenceable load 4 from %ir.arg0 + 4, addrspace 5)
1761  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s8) = G_LOAD [[LOAD1]](p5) :: (volatile dereferenceable load 1 from %ir.arg1, align 4, addrspace 5)
1762  ; CHECK:   [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[LOAD1]], [[C]](s32)
1763  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (volatile dereferenceable load 4 from %ir.arg1 + 4, addrspace 5)
1764  ; CHECK:   G_STORE [[LOAD2]](s8), [[DEF]](p1) :: (volatile store 1 into `{ i8, i32 } addrspace(1)* undef`, align 4, addrspace 1)
1765  ; CHECK:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
1766  ; CHECK:   [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[DEF]], [[C1]](s64)
1767  ; CHECK:   G_STORE [[LOAD3]](s32), [[PTR_ADD2]](p1) :: (volatile store 4 into `{ i8, i32 } addrspace(1)* undef` + 4, addrspace 1)
1768  ; CHECK:   G_STORE [[LOAD4]](s8), [[DEF]](p1) :: (volatile store 1 into `{ i8, i32 } addrspace(1)* undef`, align 4, addrspace 1)
1769  ; CHECK:   [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[DEF]], [[C1]](s64)
1770  ; CHECK:   G_STORE [[LOAD5]](s32), [[PTR_ADD3]](p1) :: (volatile store 4 into `{ i8, i32 } addrspace(1)* undef` + 4, addrspace 1)
1771  ; CHECK:   G_STORE [[COPY]](s32), [[DEF1]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
1772  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY1]]
1773  ; CHECK:   S_SETPC_B64_return [[COPY2]]
1774  %arg0.load = load volatile { i8, i32 }, { i8, i32 } addrspace(5)* %arg0
1775  %arg1.load = load volatile { i8, i32 }, { i8, i32 } addrspace(5)* %arg1
1776  store volatile { i8, i32 } %arg0.load, { i8, i32 } addrspace(1)* undef
1777  store volatile { i8, i32 } %arg1.load, { i8, i32 } addrspace(1)* undef
1778  store volatile i32 %arg2, i32 addrspace(3)* undef
1779  ret void
1780}
1781
1782define void @void_func_byval_i32_byval_i64(i32 addrspace(5)* byval(i32) %arg0, i64 addrspace(5)* byval(i64) %arg1) #0 {
1783  ; CHECK-LABEL: name: void_func_byval_i32_byval_i64
1784  ; CHECK: bb.1 (%ir-block.0):
1785  ; CHECK:   liveins: $sgpr30_sgpr31
1786  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
1787  ; CHECK:   [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.1, align 16, addrspace 5)
1788  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1789  ; CHECK:   [[LOAD1:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.0, align 8, addrspace 5)
1790  ; CHECK:   [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1791  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1792  ; CHECK:   [[COPY1:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1793  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[LOAD]](p5) :: (dereferenceable load 4 from %ir.arg0, addrspace 5)
1794  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[LOAD1]](p5) :: (dereferenceable load 8 from %ir.arg1, addrspace 5)
1795  ; CHECK:   G_STORE [[LOAD2]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
1796  ; CHECK:   G_STORE [[LOAD3]](s64), [[COPY1]](p1) :: (store 8 into `i64 addrspace(1)* undef`, addrspace 1)
1797  ; CHECK:   [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]]
1798  ; CHECK:   S_SETPC_B64_return [[COPY2]]
1799  %arg0.load = load i32, i32 addrspace(5)* %arg0
1800  %arg1.load = load i64, i64 addrspace(5)* %arg1
1801  store i32 %arg0.load, i32 addrspace(1)* undef
1802  store i64 %arg1.load, i64 addrspace(1)* undef
1803  ret void
1804}
1805
1806define void @void_func_v32i32_i32_i64(<32 x i32> %arg0, i32 %arg1, i64 %arg2) #0 {
1807  ; CHECK-LABEL: name: void_func_v32i32_i32_i64
1808  ; CHECK: bb.1 (%ir-block.0):
1809  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1810  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1811  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1812  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1813  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1814  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1815  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1816  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1817  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1818  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1819  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1820  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1821  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1822  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1823  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1824  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1825  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1826  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
1827  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
1828  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
1829  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
1830  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
1831  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
1832  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
1833  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
1834  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
1835  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
1836  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
1837  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
1838  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
1839  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
1840  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
1841  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
1842  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
1843  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
1844  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.2, align 16, addrspace 5)
1845  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
1846  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.1, addrspace 5)
1847  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1848  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.0, align 8, addrspace 5)
1849  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD1]](s32), [[LOAD2]](s32)
1850  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1851  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1852  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1853  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1854  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
1855  ; CHECK:   G_STORE [[LOAD]](s32), [[COPY33]](p1) :: (volatile store 4 into `i32 addrspace(1)* undef`, addrspace 1)
1856  ; CHECK:   G_STORE [[MV]](s64), [[COPY34]](p1) :: (volatile store 8 into `i64 addrspace(1)* undef`, addrspace 1)
1857  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1858  ; CHECK:   S_SETPC_B64_return [[COPY35]]
1859  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
1860  store volatile i32 %arg1, i32 addrspace(1)* undef
1861  store volatile i64 %arg2, i64 addrspace(1)* undef
1862  ret void
1863}
1864
1865; FIXME: Different ext load types on CI vs. VI
1866define void @void_func_v32i32_i1_i8_i16(<32 x i32> %arg0, i1 %arg1, i8 %arg2, i16 %arg3, half %arg4) #0 {
1867  ; CHECK-LABEL: name: void_func_v32i32_i1_i8_i16
1868  ; CHECK: bb.1 (%ir-block.0):
1869  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1870  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1871  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1872  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1873  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1874  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1875  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1876  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1877  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1878  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1879  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1880  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1881  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1882  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1883  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1884  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1885  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1886  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
1887  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
1888  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
1889  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
1890  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
1891  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
1892  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
1893  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
1894  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
1895  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
1896  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
1897  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
1898  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
1899  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
1900  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
1901  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
1902  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
1903  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
1904  ; CHECK:   [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 1 from %fixed-stack.3, align 16, addrspace 5)
1905  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
1906  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 2 from %fixed-stack.2, align 4, addrspace 5)
1907  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[LOAD1]](s16)
1908  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
1909  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 2 from %fixed-stack.1, align 8, addrspace 5)
1910  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1911  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 2 from %fixed-stack.0, align 4, addrspace 5)
1912  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1913  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1914  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1915  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1916  ; CHECK:   [[COPY35:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1917  ; CHECK:   [[COPY36:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1918  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
1919  ; CHECK:   G_STORE [[LOAD]](s1), [[COPY33]](p1) :: (volatile store 1 into `i1 addrspace(1)* undef`, addrspace 1)
1920  ; CHECK:   G_STORE [[TRUNC]](s8), [[COPY34]](p1) :: (volatile store 1 into `i8 addrspace(1)* undef`, addrspace 1)
1921  ; CHECK:   G_STORE [[LOAD2]](s16), [[COPY35]](p1) :: (volatile store 2 into `i16 addrspace(1)* undef`, addrspace 1)
1922  ; CHECK:   G_STORE [[LOAD3]](s16), [[COPY36]](p1) :: (volatile store 2 into `half addrspace(1)* undef`, addrspace 1)
1923  ; CHECK:   [[COPY37:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1924  ; CHECK:   S_SETPC_B64_return [[COPY37]]
1925  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
1926  store volatile i1 %arg1, i1 addrspace(1)* undef
1927  store volatile i8 %arg2, i8 addrspace(1)* undef
1928  store volatile i16 %arg3, i16 addrspace(1)* undef
1929  store volatile half %arg4, half addrspace(1)* undef
1930  ret void
1931}
1932
1933define void @void_func_v32i32_p3_p5_i16(<32 x i32> %arg0, i8 addrspace(3)* %arg1, i8 addrspace(5)* %arg2) #0 {
1934  ; CHECK-LABEL: name: void_func_v32i32_p3_p5_i16
1935  ; CHECK: bb.1 (%ir-block.0):
1936  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1937  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1938  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1939  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1940  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1941  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1942  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1943  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
1944  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
1945  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
1946  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
1947  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
1948  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
1949  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
1950  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
1951  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
1952  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
1953  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
1954  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
1955  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
1956  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
1957  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
1958  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
1959  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
1960  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
1961  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
1962  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
1963  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
1964  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
1965  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
1966  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
1967  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
1968  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
1969  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
1970  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
1971  ; CHECK:   [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.1, align 16, addrspace 5)
1972  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
1973  ; CHECK:   [[LOAD1:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
1974  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
1975  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
1976  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1977  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
1978  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
1979  ; CHECK:   G_STORE [[LOAD]](p3), [[COPY33]](p1) :: (volatile store 4 into `i8 addrspace(3)* addrspace(1)* undef`, addrspace 1)
1980  ; CHECK:   G_STORE [[LOAD1]](p5), [[COPY34]](p1) :: (volatile store 4 into `i8 addrspace(5)* addrspace(1)* undef`, addrspace 1)
1981  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
1982  ; CHECK:   S_SETPC_B64_return [[COPY35]]
1983  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
1984  store volatile i8 addrspace(3)* %arg1, i8 addrspace(3)* addrspace(1)* undef
1985  store volatile i8 addrspace(5)* %arg2, i8 addrspace(5)* addrspace(1)* undef
1986  ret void
1987}
1988
1989define void @void_func_v32i32_v2i32_v2f32(<32 x i32> %arg0, <2 x i32> %arg1, <2 x float> %arg2) #0 {
1990  ; CHECK-LABEL: name: void_func_v32i32_v2i32_v2f32
1991  ; CHECK: bb.1 (%ir-block.0):
1992  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
1993  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
1994  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
1995  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
1996  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
1997  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
1998  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
1999  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2000  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2001  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2002  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2003  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2004  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2005  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2006  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2007  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2008  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2009  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2010  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2011  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2012  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2013  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2014  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2015  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2016  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2017  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2018  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2019  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2020  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2021  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2022  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2023  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2024  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2025  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2026  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2027  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.3, align 16, addrspace 5)
2028  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2029  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.2, addrspace 5)
2030  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32)
2031  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2032  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.1, align 8, addrspace 5)
2033  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2034  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2035  ; CHECK:   [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD2]](s32), [[LOAD3]](s32)
2036  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2037  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2038  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2039  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2040  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2041  ; CHECK:   G_STORE [[BUILD_VECTOR1]](<2 x s32>), [[COPY33]](p1) :: (volatile store 8 into `<2 x i32> addrspace(1)* undef`, addrspace 1)
2042  ; CHECK:   G_STORE [[BUILD_VECTOR2]](<2 x s32>), [[COPY34]](p1) :: (volatile store 8 into `<2 x float> addrspace(1)* undef`, addrspace 1)
2043  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2044  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2045  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2046  store volatile <2 x i32> %arg1, <2 x i32> addrspace(1)* undef
2047  store volatile <2 x float> %arg2, <2 x float> addrspace(1)* undef
2048  ret void
2049}
2050
2051define void @void_func_v32i32_v2i16_v2f16(<32 x i32> %arg0, <2 x i16> %arg1, <2 x half> %arg2) #0 {
2052  ; CHECK-LABEL: name: void_func_v32i32_v2i16_v2f16
2053  ; CHECK: bb.1 (%ir-block.0):
2054  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2055  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2056  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2057  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2058  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2059  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2060  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2061  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2062  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2063  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2064  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2065  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2066  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2067  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2068  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2069  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2070  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2071  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2072  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2073  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2074  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2075  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2076  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2077  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2078  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2079  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2080  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2081  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2082  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2083  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2084  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2085  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2086  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2087  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2088  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2089  ; CHECK:   [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.1, align 16, addrspace 5)
2090  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2091  ; CHECK:   [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2092  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2093  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2094  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2095  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2096  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2097  ; CHECK:   G_STORE [[LOAD]](<2 x s16>), [[COPY33]](p1) :: (volatile store 4 into `<2 x i16> addrspace(1)* undef`, addrspace 1)
2098  ; CHECK:   G_STORE [[LOAD1]](<2 x s16>), [[COPY34]](p1) :: (volatile store 4 into `<2 x half> addrspace(1)* undef`, addrspace 1)
2099  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2100  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2101  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2102  store volatile <2 x i16> %arg1, <2 x i16> addrspace(1)* undef
2103  store volatile <2 x half> %arg2, <2 x half> addrspace(1)* undef
2104  ret void
2105}
2106
2107define void @void_func_v32i32_v2i64_v2f64(<32 x i32> %arg0, <2 x i64> %arg1, <2 x double> %arg2) #0 {
2108  ; CHECK-LABEL: name: void_func_v32i32_v2i64_v2f64
2109  ; CHECK: bb.1 (%ir-block.0):
2110  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2111  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2112  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2113  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2114  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2115  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2116  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2117  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2118  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2119  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2120  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2121  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2122  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2123  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2124  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2125  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2126  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2127  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2128  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2129  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2130  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2131  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2132  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2133  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2134  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2135  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2136  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2137  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2138  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2139  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2140  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2141  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2142  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2143  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2144  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
2145  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.7, align 16, addrspace 5)
2146  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
2147  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.6, addrspace 5)
2148  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
2149  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.5, align 8, addrspace 5)
2150  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
2151  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 4 from %fixed-stack.4, addrspace 5)
2152  ; CHECK:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32)
2153  ; CHECK:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32)
2154  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)
2155  ; CHECK:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2156  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load 4 from %fixed-stack.3, align 16, addrspace 5)
2157  ; CHECK:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2158  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load 4 from %fixed-stack.2, addrspace 5)
2159  ; CHECK:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2160  ; CHECK:   [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load 4 from %fixed-stack.1, align 8, addrspace 5)
2161  ; CHECK:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2162  ; CHECK:   [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2163  ; CHECK:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32)
2164  ; CHECK:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32)
2165  ; CHECK:   [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV3]](s64)
2166  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2167  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2168  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2169  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2170  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2171  ; CHECK:   G_STORE [[BUILD_VECTOR1]](<2 x s64>), [[COPY33]](p1) :: (volatile store 16 into `<2 x i64> addrspace(1)* undef`, addrspace 1)
2172  ; CHECK:   G_STORE [[BUILD_VECTOR2]](<2 x s64>), [[COPY34]](p1) :: (volatile store 16 into `<2 x double> addrspace(1)* undef`, addrspace 1)
2173  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2174  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2175  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2176  store volatile <2 x i64> %arg1, <2 x i64> addrspace(1)* undef
2177  store volatile <2 x double> %arg2, <2 x double> addrspace(1)* undef
2178  ret void
2179}
2180
2181define void @void_func_v32i32_v4i32_v4f32(<32 x i32> %arg0, <4 x i32> %arg1, <4 x float> %arg2) #0 {
2182  ; CHECK-LABEL: name: void_func_v32i32_v4i32_v4f32
2183  ; CHECK: bb.1 (%ir-block.0):
2184  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2185  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2186  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2187  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2188  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2189  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2190  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2191  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2192  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2193  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2194  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2195  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2196  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2197  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2198  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2199  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2200  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2201  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2202  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2203  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2204  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2205  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2206  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2207  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2208  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2209  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2210  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2211  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2212  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2213  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2214  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2215  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2216  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2217  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2218  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
2219  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.7, align 16, addrspace 5)
2220  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
2221  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.6, addrspace 5)
2222  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
2223  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.5, align 8, addrspace 5)
2224  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
2225  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 4 from %fixed-stack.4, addrspace 5)
2226  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32)
2227  ; CHECK:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2228  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load 4 from %fixed-stack.3, align 16, addrspace 5)
2229  ; CHECK:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2230  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load 4 from %fixed-stack.2, addrspace 5)
2231  ; CHECK:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2232  ; CHECK:   [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load 4 from %fixed-stack.1, align 8, addrspace 5)
2233  ; CHECK:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2234  ; CHECK:   [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2235  ; CHECK:   [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32)
2236  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2237  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2238  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2239  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2240  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2241  ; CHECK:   G_STORE [[BUILD_VECTOR1]](<4 x s32>), [[COPY33]](p1) :: (volatile store 16 into `<4 x i32> addrspace(1)* undef`, addrspace 1)
2242  ; CHECK:   G_STORE [[BUILD_VECTOR2]](<4 x s32>), [[COPY34]](p1) :: (volatile store 16 into `<4 x float> addrspace(1)* undef`, addrspace 1)
2243  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2244  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2245  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2246  store volatile <4 x i32> %arg1, <4 x i32> addrspace(1)* undef
2247  store volatile <4 x float> %arg2, <4 x float> addrspace(1)* undef
2248  ret void
2249}
2250
2251define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 x float> %arg2) #0 {
2252  ; CHECK-LABEL: name: void_func_v32i32_v8i32_v8f32
2253  ; CHECK: bb.1 (%ir-block.0):
2254  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2255  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2256  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2257  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2258  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2259  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2260  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2261  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2262  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2263  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2264  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2265  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2266  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2267  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2268  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2269  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2270  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2271  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2272  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2273  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2274  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2275  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2276  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2277  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2278  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2279  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2280  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2281  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2282  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2283  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2284  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2285  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2286  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2287  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2288  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
2289  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.15, align 16, addrspace 5)
2290  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
2291  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.14, addrspace 5)
2292  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
2293  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.13, align 8, addrspace 5)
2294  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
2295  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 4 from %fixed-stack.12, addrspace 5)
2296  ; CHECK:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
2297  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load 4 from %fixed-stack.11, align 16, addrspace 5)
2298  ; CHECK:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
2299  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load 4 from %fixed-stack.10, addrspace 5)
2300  ; CHECK:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
2301  ; CHECK:   [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load 4 from %fixed-stack.9, align 8, addrspace 5)
2302  ; CHECK:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
2303  ; CHECK:   [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load 4 from %fixed-stack.8, addrspace 5)
2304  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32)
2305  ; CHECK:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
2306  ; CHECK:   [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load 4 from %fixed-stack.7, align 16, addrspace 5)
2307  ; CHECK:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
2308  ; CHECK:   [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load 4 from %fixed-stack.6, addrspace 5)
2309  ; CHECK:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
2310  ; CHECK:   [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load 4 from %fixed-stack.5, align 8, addrspace 5)
2311  ; CHECK:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
2312  ; CHECK:   [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load 4 from %fixed-stack.4, addrspace 5)
2313  ; CHECK:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2314  ; CHECK:   [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load 4 from %fixed-stack.3, align 16, addrspace 5)
2315  ; CHECK:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2316  ; CHECK:   [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load 4 from %fixed-stack.2, addrspace 5)
2317  ; CHECK:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2318  ; CHECK:   [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load 4 from %fixed-stack.1, align 8, addrspace 5)
2319  ; CHECK:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2320  ; CHECK:   [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2321  ; CHECK:   [[BUILD_VECTOR2:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32), [[LOAD15]](s32)
2322  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2323  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2324  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2325  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2326  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2327  ; CHECK:   G_STORE [[BUILD_VECTOR1]](<8 x s32>), [[COPY33]](p1) :: (volatile store 32 into `<8 x i32> addrspace(1)* undef`, addrspace 1)
2328  ; CHECK:   G_STORE [[BUILD_VECTOR2]](<8 x s32>), [[COPY34]](p1) :: (volatile store 32 into `<8 x float> addrspace(1)* undef`, addrspace 1)
2329  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2330  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2331  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2332  store volatile <8 x i32> %arg1, <8 x i32> addrspace(1)* undef
2333  store volatile <8 x float> %arg2, <8 x float> addrspace(1)* undef
2334  ret void
2335}
2336
2337define void @void_func_v32i32_v16i32_v16f32(<32 x i32> %arg0, <16 x i32> %arg1, <16 x float> %arg2) #0 {
2338  ; CHECK-LABEL: name: void_func_v32i32_v16i32_v16f32
2339  ; CHECK: bb.1 (%ir-block.0):
2340  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2341  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2342  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2343  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2344  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2345  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2346  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2347  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2348  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2349  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2350  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2351  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2352  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2353  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2354  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2355  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2356  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2357  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2358  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2359  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2360  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2361  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2362  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2363  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2364  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2365  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2366  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2367  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2368  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2369  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2370  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2371  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2372  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2373  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2374  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.31
2375  ; CHECK:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.31, align 16, addrspace 5)
2376  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.30
2377  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 4 from %fixed-stack.30, addrspace 5)
2378  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.29
2379  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 4 from %fixed-stack.29, align 8, addrspace 5)
2380  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.28
2381  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 4 from %fixed-stack.28, addrspace 5)
2382  ; CHECK:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.27
2383  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load 4 from %fixed-stack.27, align 16, addrspace 5)
2384  ; CHECK:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.26
2385  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load 4 from %fixed-stack.26, addrspace 5)
2386  ; CHECK:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.25
2387  ; CHECK:   [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load 4 from %fixed-stack.25, align 8, addrspace 5)
2388  ; CHECK:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.24
2389  ; CHECK:   [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load 4 from %fixed-stack.24, addrspace 5)
2390  ; CHECK:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.23
2391  ; CHECK:   [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load 4 from %fixed-stack.23, align 16, addrspace 5)
2392  ; CHECK:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.22
2393  ; CHECK:   [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load 4 from %fixed-stack.22, addrspace 5)
2394  ; CHECK:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.21
2395  ; CHECK:   [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load 4 from %fixed-stack.21, align 8, addrspace 5)
2396  ; CHECK:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.20
2397  ; CHECK:   [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load 4 from %fixed-stack.20, addrspace 5)
2398  ; CHECK:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.19
2399  ; CHECK:   [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load 4 from %fixed-stack.19, align 16, addrspace 5)
2400  ; CHECK:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.18
2401  ; CHECK:   [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load 4 from %fixed-stack.18, addrspace 5)
2402  ; CHECK:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.17
2403  ; CHECK:   [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load 4 from %fixed-stack.17, align 8, addrspace 5)
2404  ; CHECK:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.16
2405  ; CHECK:   [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load 4 from %fixed-stack.16, addrspace 5)
2406  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32), [[LOAD15]](s32)
2407  ; CHECK:   [[FRAME_INDEX16:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
2408  ; CHECK:   [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX16]](p5) :: (invariant load 4 from %fixed-stack.15, align 16, addrspace 5)
2409  ; CHECK:   [[FRAME_INDEX17:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
2410  ; CHECK:   [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX17]](p5) :: (invariant load 4 from %fixed-stack.14, addrspace 5)
2411  ; CHECK:   [[FRAME_INDEX18:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
2412  ; CHECK:   [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX18]](p5) :: (invariant load 4 from %fixed-stack.13, align 8, addrspace 5)
2413  ; CHECK:   [[FRAME_INDEX19:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
2414  ; CHECK:   [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX19]](p5) :: (invariant load 4 from %fixed-stack.12, addrspace 5)
2415  ; CHECK:   [[FRAME_INDEX20:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
2416  ; CHECK:   [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX20]](p5) :: (invariant load 4 from %fixed-stack.11, align 16, addrspace 5)
2417  ; CHECK:   [[FRAME_INDEX21:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
2418  ; CHECK:   [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX21]](p5) :: (invariant load 4 from %fixed-stack.10, addrspace 5)
2419  ; CHECK:   [[FRAME_INDEX22:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
2420  ; CHECK:   [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX22]](p5) :: (invariant load 4 from %fixed-stack.9, align 8, addrspace 5)
2421  ; CHECK:   [[FRAME_INDEX23:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
2422  ; CHECK:   [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX23]](p5) :: (invariant load 4 from %fixed-stack.8, addrspace 5)
2423  ; CHECK:   [[FRAME_INDEX24:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
2424  ; CHECK:   [[LOAD24:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX24]](p5) :: (invariant load 4 from %fixed-stack.7, align 16, addrspace 5)
2425  ; CHECK:   [[FRAME_INDEX25:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
2426  ; CHECK:   [[LOAD25:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX25]](p5) :: (invariant load 4 from %fixed-stack.6, addrspace 5)
2427  ; CHECK:   [[FRAME_INDEX26:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
2428  ; CHECK:   [[LOAD26:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX26]](p5) :: (invariant load 4 from %fixed-stack.5, align 8, addrspace 5)
2429  ; CHECK:   [[FRAME_INDEX27:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
2430  ; CHECK:   [[LOAD27:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX27]](p5) :: (invariant load 4 from %fixed-stack.4, addrspace 5)
2431  ; CHECK:   [[FRAME_INDEX28:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2432  ; CHECK:   [[LOAD28:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX28]](p5) :: (invariant load 4 from %fixed-stack.3, align 16, addrspace 5)
2433  ; CHECK:   [[FRAME_INDEX29:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2434  ; CHECK:   [[LOAD29:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX29]](p5) :: (invariant load 4 from %fixed-stack.2, addrspace 5)
2435  ; CHECK:   [[FRAME_INDEX30:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2436  ; CHECK:   [[LOAD30:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX30]](p5) :: (invariant load 4 from %fixed-stack.1, align 8, addrspace 5)
2437  ; CHECK:   [[FRAME_INDEX31:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2438  ; CHECK:   [[LOAD31:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX31]](p5) :: (invariant load 4 from %fixed-stack.0, addrspace 5)
2439  ; CHECK:   [[BUILD_VECTOR2:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[LOAD16]](s32), [[LOAD17]](s32), [[LOAD18]](s32), [[LOAD19]](s32), [[LOAD20]](s32), [[LOAD21]](s32), [[LOAD22]](s32), [[LOAD23]](s32), [[LOAD24]](s32), [[LOAD25]](s32), [[LOAD26]](s32), [[LOAD27]](s32), [[LOAD28]](s32), [[LOAD29]](s32), [[LOAD30]](s32), [[LOAD31]](s32)
2440  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2441  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2442  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2443  ; CHECK:   [[COPY34:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2444  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2445  ; CHECK:   G_STORE [[BUILD_VECTOR1]](<16 x s32>), [[COPY33]](p1) :: (volatile store 64 into `<16 x i32> addrspace(1)* undef`, addrspace 1)
2446  ; CHECK:   G_STORE [[BUILD_VECTOR2]](<16 x s32>), [[COPY34]](p1) :: (volatile store 64 into `<16 x float> addrspace(1)* undef`, addrspace 1)
2447  ; CHECK:   [[COPY35:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2448  ; CHECK:   S_SETPC_B64_return [[COPY35]]
2449  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2450  store volatile <16 x i32> %arg1, <16 x i32> addrspace(1)* undef
2451  store volatile <16 x float> %arg2, <16 x float> addrspace(1)* undef
2452  ret void
2453}
2454
2455; Make sure v3 isn't a wasted register because of v3 types being promoted to v4
2456define void @void_func_v3f32_wasted_reg(<3 x float> %arg0, i32 %arg1) #0 {
2457  ; CHECK-LABEL: name: void_func_v3f32_wasted_reg
2458  ; CHECK: bb.1 (%ir-block.0):
2459  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
2460  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2461  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2462  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2463  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
2464  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2465  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2466  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
2467  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
2468  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
2469  ; CHECK:   [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
2470  ; CHECK:   [[COPY5:%[0-9]+]]:_(p3) = COPY [[DEF]](p3)
2471  ; CHECK:   [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C]](s32)
2472  ; CHECK:   [[EVEC1:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C1]](s32)
2473  ; CHECK:   [[EVEC2:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C2]](s32)
2474  ; CHECK:   G_STORE [[EVEC]](s32), [[DEF]](p3) :: (volatile store 4 into `float addrspace(3)* undef`, addrspace 3)
2475  ; CHECK:   G_STORE [[EVEC1]](s32), [[DEF]](p3) :: (volatile store 4 into `float addrspace(3)* undef`, addrspace 3)
2476  ; CHECK:   G_STORE [[EVEC2]](s32), [[DEF]](p3) :: (volatile store 4 into `float addrspace(3)* undef`, addrspace 3)
2477  ; CHECK:   G_STORE [[COPY3]](s32), [[COPY5]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
2478  ; CHECK:   [[COPY6:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
2479  ; CHECK:   S_SETPC_B64_return [[COPY6]]
2480  %arg0.0 = extractelement <3 x float> %arg0, i32 0
2481  %arg0.1 = extractelement <3 x float> %arg0, i32 1
2482  %arg0.2 = extractelement <3 x float> %arg0, i32 2
2483  store volatile float %arg0.0, float addrspace(3)* undef
2484  store volatile float %arg0.1, float addrspace(3)* undef
2485  store volatile float %arg0.2, float addrspace(3)* undef
2486  store volatile i32 %arg1, i32 addrspace(3)* undef
2487  ret void
2488}
2489
2490define void @void_func_v3i32_wasted_reg(<3 x i32> %arg0, i32 %arg1) #0 {
2491  ; CHECK-LABEL: name: void_func_v3i32_wasted_reg
2492  ; CHECK: bb.1 (%ir-block.0):
2493  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31
2494  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2495  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2496  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2497  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
2498  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2499  ; CHECK:   [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2500  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
2501  ; CHECK:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
2502  ; CHECK:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
2503  ; CHECK:   [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
2504  ; CHECK:   [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C]](s32)
2505  ; CHECK:   [[EVEC1:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C1]](s32)
2506  ; CHECK:   [[EVEC2:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[C2]](s32)
2507  ; CHECK:   G_STORE [[EVEC]](s32), [[DEF]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
2508  ; CHECK:   G_STORE [[EVEC1]](s32), [[DEF]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
2509  ; CHECK:   G_STORE [[EVEC2]](s32), [[DEF]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
2510  ; CHECK:   G_STORE [[COPY3]](s32), [[DEF]](p3) :: (volatile store 4 into `i32 addrspace(3)* undef`, addrspace 3)
2511  ; CHECK:   [[COPY5:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]]
2512  ; CHECK:   S_SETPC_B64_return [[COPY5]]
2513  %arg0.0 = extractelement <3 x i32> %arg0, i32 0
2514  %arg0.1 = extractelement <3 x i32> %arg0, i32 1
2515  %arg0.2 = extractelement <3 x i32> %arg0, i32 2
2516  store volatile i32 %arg0.0, i32 addrspace(3)* undef
2517  store volatile i32 %arg0.1, i32 addrspace(3)* undef
2518  store volatile i32 %arg0.2, i32 addrspace(3)* undef
2519  store volatile i32 %arg1, i32 addrspace(3)* undef
2520  ret void
2521}
2522
2523; Check there is no crash.
2524define void @void_func_v16i8(<16 x i8> %arg0) #0 {
2525  ; CHECK-LABEL: name: void_func_v16i8
2526  ; CHECK: bb.1 (%ir-block.0):
2527  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $sgpr30_sgpr31
2528  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2529  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
2530  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2531  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
2532  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2533  ; CHECK:   [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
2534  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2535  ; CHECK:   [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
2536  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2537  ; CHECK:   [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)
2538  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2539  ; CHECK:   [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)
2540  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2541  ; CHECK:   [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)
2542  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2543  ; CHECK:   [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)
2544  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2545  ; CHECK:   [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)
2546  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2547  ; CHECK:   [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[COPY9]](s32)
2548  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2549  ; CHECK:   [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[COPY10]](s32)
2550  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2551  ; CHECK:   [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[COPY11]](s32)
2552  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2553  ; CHECK:   [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)
2554  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2555  ; CHECK:   [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)
2556  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2557  ; CHECK:   [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)
2558  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2559  ; CHECK:   [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)
2560  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16), [[TRUNC4]](s16), [[TRUNC5]](s16), [[TRUNC6]](s16), [[TRUNC7]](s16), [[TRUNC8]](s16), [[TRUNC9]](s16), [[TRUNC10]](s16), [[TRUNC11]](s16), [[TRUNC12]](s16), [[TRUNC13]](s16), [[TRUNC14]](s16), [[TRUNC15]](s16)
2561  ; CHECK:   [[TRUNC16:%[0-9]+]]:_(<16 x s8>) = G_TRUNC [[BUILD_VECTOR]](<16 x s16>)
2562  ; CHECK:   [[COPY16:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2563  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2564  ; CHECK:   G_STORE [[TRUNC16]](<16 x s8>), [[DEF]](p1) :: (volatile store 16 into `<16 x i8> addrspace(1)* undef`, addrspace 1)
2565  ; CHECK:   [[COPY17:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY16]]
2566  ; CHECK:   S_SETPC_B64_return [[COPY17]]
2567  store volatile <16 x i8> %arg0, <16 x i8> addrspace(1)* undef
2568  ret void
2569}
2570
2571; Check there is no crash.
2572define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 {
2573  ; CHECK-LABEL: name: void_func_v32i32_v16i8
2574  ; CHECK: bb.1 (%ir-block.0):
2575  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
2576  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
2577  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
2578  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
2579  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
2580  ; CHECK:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
2581  ; CHECK:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
2582  ; CHECK:   [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
2583  ; CHECK:   [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
2584  ; CHECK:   [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
2585  ; CHECK:   [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
2586  ; CHECK:   [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
2587  ; CHECK:   [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
2588  ; CHECK:   [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
2589  ; CHECK:   [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
2590  ; CHECK:   [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
2591  ; CHECK:   [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
2592  ; CHECK:   [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
2593  ; CHECK:   [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
2594  ; CHECK:   [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
2595  ; CHECK:   [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
2596  ; CHECK:   [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
2597  ; CHECK:   [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
2598  ; CHECK:   [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
2599  ; CHECK:   [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
2600  ; CHECK:   [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
2601  ; CHECK:   [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
2602  ; CHECK:   [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
2603  ; CHECK:   [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
2604  ; CHECK:   [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
2605  ; CHECK:   [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
2606  ; CHECK:   [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
2607  ; CHECK:   [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
2608  ; CHECK:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32), [[COPY17]](s32), [[COPY18]](s32), [[COPY19]](s32), [[COPY20]](s32), [[COPY21]](s32), [[COPY22]](s32), [[COPY23]](s32), [[COPY24]](s32), [[COPY25]](s32), [[COPY26]](s32), [[COPY27]](s32), [[COPY28]](s32), [[COPY29]](s32), [[COPY30]](s32), [[COPY31]](s32)
2609  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
2610  ; CHECK:   [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 2 from %fixed-stack.15, align 16, addrspace 5)
2611  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
2612  ; CHECK:   [[LOAD1:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load 2 from %fixed-stack.14, align 4, addrspace 5)
2613  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
2614  ; CHECK:   [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load 2 from %fixed-stack.13, align 8, addrspace 5)
2615  ; CHECK:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
2616  ; CHECK:   [[LOAD3:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load 2 from %fixed-stack.12, align 4, addrspace 5)
2617  ; CHECK:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
2618  ; CHECK:   [[LOAD4:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load 2 from %fixed-stack.11, align 16, addrspace 5)
2619  ; CHECK:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
2620  ; CHECK:   [[LOAD5:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load 2 from %fixed-stack.10, align 4, addrspace 5)
2621  ; CHECK:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
2622  ; CHECK:   [[LOAD6:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load 2 from %fixed-stack.9, align 8, addrspace 5)
2623  ; CHECK:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
2624  ; CHECK:   [[LOAD7:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load 2 from %fixed-stack.8, align 4, addrspace 5)
2625  ; CHECK:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
2626  ; CHECK:   [[LOAD8:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load 2 from %fixed-stack.7, align 16, addrspace 5)
2627  ; CHECK:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
2628  ; CHECK:   [[LOAD9:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load 2 from %fixed-stack.6, align 4, addrspace 5)
2629  ; CHECK:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
2630  ; CHECK:   [[LOAD10:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load 2 from %fixed-stack.5, align 8, addrspace 5)
2631  ; CHECK:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
2632  ; CHECK:   [[LOAD11:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load 2 from %fixed-stack.4, align 4, addrspace 5)
2633  ; CHECK:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
2634  ; CHECK:   [[LOAD12:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load 2 from %fixed-stack.3, align 16, addrspace 5)
2635  ; CHECK:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
2636  ; CHECK:   [[LOAD13:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load 2 from %fixed-stack.2, align 4, addrspace 5)
2637  ; CHECK:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
2638  ; CHECK:   [[LOAD14:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load 2 from %fixed-stack.1, align 8, addrspace 5)
2639  ; CHECK:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
2640  ; CHECK:   [[LOAD15:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load 2 from %fixed-stack.0, align 4, addrspace 5)
2641  ; CHECK:   [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s16>) = G_BUILD_VECTOR [[LOAD]](s16), [[LOAD1]](s16), [[LOAD2]](s16), [[LOAD3]](s16), [[LOAD4]](s16), [[LOAD5]](s16), [[LOAD6]](s16), [[LOAD7]](s16), [[LOAD8]](s16), [[LOAD9]](s16), [[LOAD10]](s16), [[LOAD11]](s16), [[LOAD12]](s16), [[LOAD13]](s16), [[LOAD14]](s16), [[LOAD15]](s16)
2642  ; CHECK:   [[TRUNC:%[0-9]+]]:_(<16 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<16 x s16>)
2643  ; CHECK:   [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
2644  ; CHECK:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
2645  ; CHECK:   [[COPY33:%[0-9]+]]:_(p1) = COPY [[DEF]](p1)
2646  ; CHECK:   G_STORE [[BUILD_VECTOR]](<32 x s32>), [[DEF]](p1) :: (volatile store 128 into `<32 x i32> addrspace(1)* undef`, addrspace 1)
2647  ; CHECK:   G_STORE [[TRUNC]](<16 x s8>), [[COPY33]](p1) :: (volatile store 16 into `<16 x i8> addrspace(1)* undef`, addrspace 1)
2648  ; CHECK:   [[COPY34:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
2649  ; CHECK:   S_SETPC_B64_return [[COPY34]]
2650  store volatile <32 x i32> %arg0, <32 x i32> addrspace(1)* undef
2651  store volatile <16 x i8> %arg1, <16 x i8> addrspace(1)* undef
2652  ret void
2653}
2654
2655attributes #0 = { nounwind }
2656