1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
6
7---
8
9name:            xor_s32_sgpr_sgpr_sgpr
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0, $sgpr1, $sgpr2
17    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_sgpr
18    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
19    ; GFX8-NEXT: {{  $}}
20    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
21    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
22    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
23    ; GFX8-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
24    ; GFX8-NEXT: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
25    ; GFX8-NEXT: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
26    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_sgpr
27    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
28    ; GFX9-NEXT: {{  $}}
29    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
30    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
31    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
32    ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
33    ; GFX9-NEXT: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
34    ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
35    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_sgpr
36    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
37    ; GFX10-NEXT: {{  $}}
38    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
39    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
40    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
41    ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
42    ; GFX10-NEXT: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
43    ; GFX10-NEXT: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
44    %0:sgpr(s32) = COPY $sgpr0
45    %1:sgpr(s32) = COPY $sgpr1
46    %2:sgpr(s32) = COPY $sgpr2
47    %3:sgpr(s32) = G_XOR %0, %1
48    %4:sgpr(s32) = G_XOR %3, %2
49    S_ENDPGM 0, implicit %4
50...
51
52---
53
54name:            xor_s32_vgpr_vgpr_vgpr
55legalized:       true
56regBankSelected: true
57tracksRegLiveness: true
58
59body: |
60  bb.0:
61    liveins: $vgpr0, $vgpr1, $vgpr2
62    ; GFX8-LABEL: name: xor_s32_vgpr_vgpr_vgpr
63    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
64    ; GFX8-NEXT: {{  $}}
65    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
66    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
67    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
68    ; GFX8-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
69    ; GFX8-NEXT: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
70    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
71    ; GFX9-LABEL: name: xor_s32_vgpr_vgpr_vgpr
72    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
73    ; GFX9-NEXT: {{  $}}
74    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
75    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
76    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
77    ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
78    ; GFX9-NEXT: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
79    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
80    ; GFX10-LABEL: name: xor_s32_vgpr_vgpr_vgpr
81    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
82    ; GFX10-NEXT: {{  $}}
83    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
84    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
85    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
86    ; GFX10-NEXT: [[V_XOR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
87    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR3_B32_e64_]]
88    %0:vgpr(s32) = COPY $vgpr0
89    %1:vgpr(s32) = COPY $vgpr1
90    %2:vgpr(s32) = COPY $vgpr2
91    %3:vgpr(s32) = G_XOR %0, %1
92    %4:vgpr(s32) = G_XOR %3, %2
93    S_ENDPGM 0, implicit %4
94...
95
96# Mixed SGPR and VGPR, with full copy from scalar xor to VGPR, as
97#should actually be produced by RegBankSelect
98
99---
100
101name:            xor_s32_sgpr_sgpr_vgpr_copy
102legalized:       true
103regBankSelected: true
104tracksRegLiveness: true
105
106body: |
107  bb.0:
108    liveins: $sgpr0, $sgpr1, $vgpr0
109
110    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
111    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
112    ; GFX8-NEXT: {{  $}}
113    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
114    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
115    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
116    ; GFX8-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
117    ; GFX8-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
118    ; GFX8-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
119    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
120    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
121    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
122    ; GFX9-NEXT: {{  $}}
123    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
124    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
125    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
126    ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
127    ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
128    ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
129    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
130    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
131    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
132    ; GFX10-NEXT: {{  $}}
133    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
134    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
135    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
136    ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
137    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
138    ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
139    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
140    %0:sgpr(s32) = COPY $sgpr0
141    %1:sgpr(s32) = COPY $sgpr1
142    %2:vgpr(s32) = COPY $vgpr0
143    %3:sgpr(s32) = G_XOR %0, %1
144    %4:vgpr(s32) = COPY %3
145    %5:vgpr(s32) = G_XOR %4, %2
146    S_ENDPGM 0, implicit %5
147...
148
149---
150
151name:            xor_s32_sgpr_sgpr_vgpr_copy_commute
152legalized:       true
153regBankSelected: true
154tracksRegLiveness: true
155
156body: |
157  bb.0:
158    liveins: $sgpr0, $sgpr1, $vgpr0
159
160    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
161    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
162    ; GFX8-NEXT: {{  $}}
163    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
164    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
165    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
166    ; GFX8-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
167    ; GFX8-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
168    ; GFX8-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
169    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
170    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
171    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
172    ; GFX9-NEXT: {{  $}}
173    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
174    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
175    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
176    ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
177    ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
178    ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
179    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
180    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
181    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
182    ; GFX10-NEXT: {{  $}}
183    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
184    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
185    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
186    ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
187    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
188    ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
189    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
190    %0:sgpr(s32) = COPY $sgpr0
191    %1:sgpr(s32) = COPY $sgpr1
192    %2:vgpr(s32) = COPY $vgpr0
193    %3:sgpr(s32) = G_XOR %0, %1
194    %4:vgpr(s32) = COPY %3
195    %5:vgpr(s32) = G_XOR %2, %4
196    S_ENDPGM 0, implicit %5
197...
198
199---
200
201name:            xor_s32_sgpr_sgpr_vgpr
202legalized:       true
203regBankSelected: true
204tracksRegLiveness: true
205
206body: |
207  bb.0:
208    liveins: $sgpr0, $sgpr1, $vgpr0
209
210    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr
211    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
212    ; GFX8-NEXT: {{  $}}
213    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
214    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
215    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
216    ; GFX8-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
217    ; GFX8-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
218    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
219    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr
220    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
221    ; GFX9-NEXT: {{  $}}
222    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
223    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
224    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
225    ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
226    ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
227    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
228    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr
229    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
230    ; GFX10-NEXT: {{  $}}
231    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
232    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
233    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
234    ; GFX10-NEXT: [[V_XOR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
235    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR3_B32_e64_]]
236    %0:sgpr(s32) = COPY $sgpr0
237    %1:sgpr(s32) = COPY $sgpr1
238    %2:vgpr(s32) = COPY $vgpr0
239    %3:sgpr(s32) = G_XOR %0, %1
240    %4:vgpr(s32) = G_XOR %3, %2
241    S_ENDPGM 0, implicit %4
242...
243