1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
6
7---
8
9name:            xor_s32_sgpr_sgpr_sgpr
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0, $sgpr1, $sgpr2
17    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_sgpr
18    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
19    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
20    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
21    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
22    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
23    ; GFX8: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
24    ; GFX8: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
25    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_sgpr
26    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
27    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
28    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
29    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
30    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
31    ; GFX9: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
32    ; GFX9: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
33    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_sgpr
34    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
35    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
36    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
37    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
38    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
39    ; GFX10: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
40    ; GFX10: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
41    %0:sgpr(s32) = COPY $sgpr0
42    %1:sgpr(s32) = COPY $sgpr1
43    %2:sgpr(s32) = COPY $sgpr2
44    %3:sgpr(s32) = G_XOR %0, %1
45    %4:sgpr(s32) = G_XOR %3, %2
46    S_ENDPGM 0, implicit %4
47...
48
49---
50
51name:            xor_s32_vgpr_vgpr_vgpr
52legalized:       true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $vgpr0, $vgpr1, $vgpr2
59    ; GFX8-LABEL: name: xor_s32_vgpr_vgpr_vgpr
60    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
65    ; GFX8: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
66    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
67    ; GFX9-LABEL: name: xor_s32_vgpr_vgpr_vgpr
68    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
69    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
70    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
71    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
72    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
73    ; GFX9: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
74    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
75    ; GFX10-LABEL: name: xor_s32_vgpr_vgpr_vgpr
76    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
77    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
78    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
79    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
80    ; GFX10: [[V_XOR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
81    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_e64_]]
82    %0:vgpr(s32) = COPY $vgpr0
83    %1:vgpr(s32) = COPY $vgpr1
84    %2:vgpr(s32) = COPY $vgpr2
85    %3:vgpr(s32) = G_XOR %0, %1
86    %4:vgpr(s32) = G_XOR %3, %2
87    S_ENDPGM 0, implicit %4
88...
89
90# Mixed SGPR and VGPR, with full copy from scalar xor to VGPR, as
91#should actually be produced by RegBankSelect
92
93---
94
95name:            xor_s32_sgpr_sgpr_vgpr_copy
96legalized:       true
97regBankSelected: true
98tracksRegLiveness: true
99
100body: |
101  bb.0:
102    liveins: $sgpr0, $sgpr1, $vgpr0
103
104    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
105    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
106    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
107    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
108    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
109    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
110    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
111    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
112    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
113    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
114    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
115    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
116    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
117    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
118    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
119    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
120    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
121    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
122    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
123    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
124    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
125    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
126    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
127    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
128    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
129    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
130    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
131    %0:sgpr(s32) = COPY $sgpr0
132    %1:sgpr(s32) = COPY $sgpr1
133    %2:vgpr(s32) = COPY $vgpr0
134    %3:sgpr(s32) = G_XOR %0, %1
135    %4:vgpr(s32) = COPY %3
136    %5:vgpr(s32) = G_XOR %4, %2
137    S_ENDPGM 0, implicit %5
138...
139
140---
141
142name:            xor_s32_sgpr_sgpr_vgpr_copy_commute
143legalized:       true
144regBankSelected: true
145tracksRegLiveness: true
146
147body: |
148  bb.0:
149    liveins: $sgpr0, $sgpr1, $vgpr0
150
151    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
152    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
153    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
154    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
155    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
156    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
157    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
158    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
159    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
160    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
161    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
162    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
163    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
164    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
165    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
166    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
167    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
168    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
169    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
170    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
171    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
172    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
173    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
174    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
175    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
176    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
177    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
178    %0:sgpr(s32) = COPY $sgpr0
179    %1:sgpr(s32) = COPY $sgpr1
180    %2:vgpr(s32) = COPY $vgpr0
181    %3:sgpr(s32) = G_XOR %0, %1
182    %4:vgpr(s32) = COPY %3
183    %5:vgpr(s32) = G_XOR %2, %4
184    S_ENDPGM 0, implicit %5
185...
186
187---
188
189name:            xor_s32_sgpr_sgpr_vgpr
190legalized:       true
191regBankSelected: true
192tracksRegLiveness: true
193
194body: |
195  bb.0:
196    liveins: $sgpr0, $sgpr1, $vgpr0
197
198    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr
199    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
200    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
201    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
202    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
203    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
204    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
205    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
206    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr
207    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
208    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
209    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
210    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
211    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
212    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
213    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
214    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr
215    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
216    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
217    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
218    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
219    ; GFX10: [[V_XOR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
220    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_e64_]]
221    %0:sgpr(s32) = COPY $sgpr0
222    %1:sgpr(s32) = COPY $sgpr1
223    %2:vgpr(s32) = COPY $vgpr0
224    %3:sgpr(s32) = G_XOR %0, %1
225    %4:vgpr(s32) = G_XOR %3, %2
226    S_ENDPGM 0, implicit %4
227...
228