1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
6
7---
8name: umed3_s16_vvv
9legalized: true
10regBankSelected: true
11
12body: |
13  bb.0:
14    liveins: $vgpr0, $vgpr1, $vgpr2
15
16    ; GFX8-LABEL: name: umed3_s16_vvv
17    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
18    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
19    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
20    ; GFX8: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
21    ; GFX8: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
22    ; GFX8: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
23    ; GFX8: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
24    ; GFX8: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]]
25    ; GFX9-LABEL: name: umed3_s16_vvv
26    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
29    ; GFX9: [[V_MED3_U16_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U16_e64 0, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
30    ; GFX9: S_ENDPGM 0, implicit [[V_MED3_U16_e64_]]
31    %0:vgpr(s32) = COPY $vgpr0
32    %1:vgpr(s32) = COPY $vgpr1
33    %2:vgpr(s32) = COPY $vgpr2
34    %3:vgpr(s16) = G_TRUNC %0
35    %4:vgpr(s16) = G_TRUNC %1
36    %5:vgpr(s16) = G_TRUNC %2
37
38    %6:vgpr(s16) = G_UMAX %3, %4
39    %7:vgpr(s16) = G_UMIN %3, %4
40    %8:vgpr(s16) = G_UMAX %7, %5
41    %9:vgpr(s16) = G_UMIN %6, %8
42
43    S_ENDPGM 0, implicit %9
44...
45
46---
47name: umed3_s16_vvv_multiuse0
48legalized: true
49regBankSelected: true
50
51body: |
52  bb.0:
53    liveins: $vgpr0, $vgpr1, $vgpr2
54
55    ; GFX8-LABEL: name: umed3_s16_vvv_multiuse0
56    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
57    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
58    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
59    ; GFX8: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
60    ; GFX8: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
61    ; GFX8: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
62    ; GFX8: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
63    ; GFX8: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MAX_U16_e64_]]
64    ; GFX9-LABEL: name: umed3_s16_vvv_multiuse0
65    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
66    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
67    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
68    ; GFX9: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
69    ; GFX9: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
70    ; GFX9: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
71    ; GFX9: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
72    ; GFX9: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MAX_U16_e64_]]
73    %0:vgpr(s32) = COPY $vgpr0
74    %1:vgpr(s32) = COPY $vgpr1
75    %2:vgpr(s32) = COPY $vgpr2
76    %3:vgpr(s16) = G_TRUNC %0
77    %4:vgpr(s16) = G_TRUNC %1
78    %5:vgpr(s16) = G_TRUNC %2
79
80    %6:vgpr(s16) = G_UMAX %3, %4
81    %7:vgpr(s16) = G_UMIN %3, %4
82    %8:vgpr(s16) = G_UMAX %7, %5
83    %9:vgpr(s16) = G_UMIN %6, %8
84
85    S_ENDPGM 0, implicit %9, implicit %6
86...
87
88---
89name: umed3_s16_vvv_multiuse1
90legalized: true
91regBankSelected: true
92
93body: |
94  bb.0:
95    liveins: $vgpr0, $vgpr1, $vgpr2
96
97    ; GFX8-LABEL: name: umed3_s16_vvv_multiuse1
98    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
99    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
100    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
101    ; GFX8: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
102    ; GFX8: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
103    ; GFX8: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
104    ; GFX8: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
105    ; GFX8: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MIN_U16_e64_]]
106    ; GFX9-LABEL: name: umed3_s16_vvv_multiuse1
107    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
108    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
109    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
110    ; GFX9: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
111    ; GFX9: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
112    ; GFX9: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
113    ; GFX9: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
114    ; GFX9: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MIN_U16_e64_]]
115    %0:vgpr(s32) = COPY $vgpr0
116    %1:vgpr(s32) = COPY $vgpr1
117    %2:vgpr(s32) = COPY $vgpr2
118    %3:vgpr(s16) = G_TRUNC %0
119    %4:vgpr(s16) = G_TRUNC %1
120    %5:vgpr(s16) = G_TRUNC %2
121
122    %6:vgpr(s16) = G_UMAX %3, %4
123    %7:vgpr(s16) = G_UMIN %3, %4
124    %8:vgpr(s16) = G_UMAX %7, %5
125    %9:vgpr(s16) = G_UMIN %6, %8
126
127    S_ENDPGM 0, implicit %9, implicit %7
128...
129
130---
131name: umed3_s16_vvv_multiuse2
132legalized: true
133regBankSelected: true
134
135body: |
136  bb.0:
137    liveins: $vgpr0, $vgpr1, $vgpr2
138
139    ; GFX8-LABEL: name: umed3_s16_vvv_multiuse2
140    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
141    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
142    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
143    ; GFX8: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
144    ; GFX8: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
145    ; GFX8: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
146    ; GFX8: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
147    ; GFX8: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MAX_U16_e64_1]]
148    ; GFX9-LABEL: name: umed3_s16_vvv_multiuse2
149    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
150    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
151    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
152    ; GFX9: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[COPY]], [[COPY1]], implicit $exec
153    ; GFX9: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[COPY]], [[COPY1]], implicit $exec
154    ; GFX9: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 [[V_MIN_U16_e64_]], [[COPY2]], implicit $exec
155    ; GFX9: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 [[V_MAX_U16_e64_]], [[V_MAX_U16_e64_1]], implicit $exec
156    ; GFX9: S_ENDPGM 0, implicit [[V_MIN_U16_e64_1]], implicit [[V_MAX_U16_e64_1]]
157    %0:vgpr(s32) = COPY $vgpr0
158    %1:vgpr(s32) = COPY $vgpr1
159    %2:vgpr(s32) = COPY $vgpr2
160    %3:vgpr(s16) = G_TRUNC %0
161    %4:vgpr(s16) = G_TRUNC %1
162    %5:vgpr(s16) = G_TRUNC %2
163
164    %6:vgpr(s16) = G_UMAX %3, %4
165    %7:vgpr(s16) = G_UMIN %3, %4
166    %8:vgpr(s16) = G_UMAX %7, %5
167    %9:vgpr(s16) = G_UMIN %6, %8
168
169    S_ENDPGM 0, implicit %9, implicit %8
170...
171