1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
6
7---
8
9name:            or_s32_sgpr_sgpr_sgpr
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0, $sgpr1, $sgpr2
17    ; GFX8-LABEL: name: or_s32_sgpr_sgpr_sgpr
18    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
19    ; GFX8-NEXT: {{  $}}
20    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
21    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
22    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
23    ; GFX8-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def $scc
24    ; GFX8-NEXT: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_OR_B32_]], [[COPY2]], implicit-def $scc
25    ; GFX8-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_1]]
26    ; GFX9-LABEL: name: or_s32_sgpr_sgpr_sgpr
27    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
28    ; GFX9-NEXT: {{  $}}
29    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
30    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
31    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
32    ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def $scc
33    ; GFX9-NEXT: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_OR_B32_]], [[COPY2]], implicit-def $scc
34    ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_1]]
35    %0:sgpr(s32) = COPY $sgpr0
36    %1:sgpr(s32) = COPY $sgpr1
37    %2:sgpr(s32) = COPY $sgpr2
38    %3:sgpr(s32) = G_OR %0, %1
39    %4:sgpr(s32) = G_OR %3, %2
40    S_ENDPGM 0, implicit %4
41...
42
43---
44
45name:            or_s32_vgpr_vgpr_vgpr
46legalized:       true
47regBankSelected: true
48tracksRegLiveness: true
49
50body: |
51  bb.0:
52    liveins: $vgpr0, $vgpr1, $vgpr2
53    ; GFX8-LABEL: name: or_s32_vgpr_vgpr_vgpr
54    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
55    ; GFX8-NEXT: {{  $}}
56    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
57    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
58    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
59    ; GFX8-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
60    ; GFX8-NEXT: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
61    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]]
62    ; GFX9-LABEL: name: or_s32_vgpr_vgpr_vgpr
63    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
64    ; GFX9-NEXT: {{  $}}
65    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
66    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
67    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
68    ; GFX9-NEXT: [[V_OR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
69    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_OR3_B32_e64_]]
70    %0:vgpr(s32) = COPY $vgpr0
71    %1:vgpr(s32) = COPY $vgpr1
72    %2:vgpr(s32) = COPY $vgpr2
73    %3:vgpr(s32) = G_OR %0, %1
74    %4:vgpr(s32) = G_OR %3, %2
75    S_ENDPGM 0, implicit %4
76...
77
78---
79
80name:            or_s32_vgpr_vgpr_vgpr_multi_use
81legalized:       true
82regBankSelected: true
83tracksRegLiveness: true
84
85body: |
86  bb.0:
87    liveins: $vgpr0, $vgpr1, $vgpr2
88    ; GFX8-LABEL: name: or_s32_vgpr_vgpr_vgpr_multi_use
89    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
90    ; GFX8-NEXT: {{  $}}
91    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
92    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
93    ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
94    ; GFX8-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
95    ; GFX8-NEXT: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
96    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]], implicit [[V_OR_B32_e64_]]
97    ; GFX9-LABEL: name: or_s32_vgpr_vgpr_vgpr_multi_use
98    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
99    ; GFX9-NEXT: {{  $}}
100    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
101    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
102    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
103    ; GFX9-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
104    ; GFX9-NEXT: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
105    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]], implicit [[V_OR_B32_e64_]]
106    %0:vgpr(s32) = COPY $vgpr0
107    %1:vgpr(s32) = COPY $vgpr1
108    %2:vgpr(s32) = COPY $vgpr2
109    %3:vgpr(s32) = G_OR %0, %1
110    %4:vgpr(s32) = G_OR %3, %2
111    S_ENDPGM 0, implicit %4, implicit %3
112...
113
114