1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
6
7---
8
9name:            or_s32_sgpr_sgpr_sgpr
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0, $sgpr1, $sgpr2
17    ; GFX8-LABEL: name: or_s32_sgpr_sgpr_sgpr
18    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
19    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
20    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
21    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
22    ; GFX8: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def $scc
23    ; GFX8: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_OR_B32_]], [[COPY2]], implicit-def $scc
24    ; GFX8: S_ENDPGM 0, implicit [[S_OR_B32_1]]
25    ; GFX9-LABEL: name: or_s32_sgpr_sgpr_sgpr
26    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
27    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
28    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
29    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
30    ; GFX9: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def $scc
31    ; GFX9: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_OR_B32_]], [[COPY2]], implicit-def $scc
32    ; GFX9: S_ENDPGM 0, implicit [[S_OR_B32_1]]
33    %0:sgpr(s32) = COPY $sgpr0
34    %1:sgpr(s32) = COPY $sgpr1
35    %2:sgpr(s32) = COPY $sgpr2
36    %3:sgpr(s32) = G_OR %0, %1
37    %4:sgpr(s32) = G_OR %3, %2
38    S_ENDPGM 0, implicit %4
39...
40
41---
42
43name:            or_s32_vgpr_vgpr_vgpr
44legalized:       true
45regBankSelected: true
46tracksRegLiveness: true
47
48body: |
49  bb.0:
50    liveins: $vgpr0, $vgpr1, $vgpr2
51    ; GFX8-LABEL: name: or_s32_vgpr_vgpr_vgpr
52    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
53    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
54    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
55    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
56    ; GFX8: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
57    ; GFX8: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
58    ; GFX8: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]]
59    ; GFX9-LABEL: name: or_s32_vgpr_vgpr_vgpr
60    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX9: [[V_OR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR3_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
65    ; GFX9: S_ENDPGM 0, implicit [[V_OR3_B32_e64_]]
66    %0:vgpr(s32) = COPY $vgpr0
67    %1:vgpr(s32) = COPY $vgpr1
68    %2:vgpr(s32) = COPY $vgpr2
69    %3:vgpr(s32) = G_OR %0, %1
70    %4:vgpr(s32) = G_OR %3, %2
71    S_ENDPGM 0, implicit %4
72...
73
74---
75
76name:            or_s32_vgpr_vgpr_vgpr_multi_use
77legalized:       true
78regBankSelected: true
79tracksRegLiveness: true
80
81body: |
82  bb.0:
83    liveins: $vgpr0, $vgpr1, $vgpr2
84    ; GFX8-LABEL: name: or_s32_vgpr_vgpr_vgpr_multi_use
85    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
86    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
87    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
88    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
89    ; GFX8: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
90    ; GFX8: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
91    ; GFX8: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]], implicit [[V_OR_B32_e64_]]
92    ; GFX9-LABEL: name: or_s32_vgpr_vgpr_vgpr_multi_use
93    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
94    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
95    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
96    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
97    ; GFX9: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
98    ; GFX9: [[V_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_OR_B32_e64_]], [[COPY2]], implicit $exec
99    ; GFX9: S_ENDPGM 0, implicit [[V_OR_B32_e64_1]], implicit [[V_OR_B32_e64_]]
100    %0:vgpr(s32) = COPY $vgpr0
101    %1:vgpr(s32) = COPY $vgpr1
102    %2:vgpr(s32) = COPY $vgpr2
103    %3:vgpr(s32) = G_OR %0, %1
104    %4:vgpr(s32) = G_OR %3, %2
105    S_ENDPGM 0, implicit %4, implicit %3
106...
107
108