1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
6
7---
8
9name:            add_s32_sgpr_sgpr_sgpr
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0, $sgpr1, $sgpr2
17    ; GFX8-LABEL: name: add_s32_sgpr_sgpr_sgpr
18    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
19    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
20    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
21    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
22    ; GFX8: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
23    ; GFX8: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
24    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
25    ; GFX9-LABEL: name: add_s32_sgpr_sgpr_sgpr
26    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
27    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
28    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
29    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
30    ; GFX9: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
31    ; GFX9: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
32    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
33    %0:sgpr(s32) = COPY $sgpr0
34    %1:sgpr(s32) = COPY $sgpr1
35    %2:sgpr(s32) = COPY $sgpr2
36    %3:sgpr(s32) = G_ADD %0, %1
37    %4:sgpr(s32) = G_ADD %3, %2
38    S_ENDPGM 0, implicit %4
39...
40
41---
42
43name:            add_s32_vgpr_vgpr_vgpr
44legalized:       true
45regBankSelected: true
46tracksRegLiveness: true
47
48body: |
49  bb.0:
50    liveins: $vgpr0, $vgpr1, $vgpr2
51    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr
52    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
53    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
54    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
55    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
56    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
57    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
58    ; GFX8: S_ENDPGM 0, implicit %4
59    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr
60    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX9: [[V_ADD3_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
65    ; GFX9: S_ENDPGM 0, implicit [[V_ADD3_U32_e64_]]
66    %0:vgpr(s32) = COPY $vgpr0
67    %1:vgpr(s32) = COPY $vgpr1
68    %2:vgpr(s32) = COPY $vgpr2
69    %3:vgpr(s32) = G_ADD %0, %1
70    %4:vgpr(s32) = G_ADD %3, %2
71    S_ENDPGM 0, implicit %4
72...
73
74---
75
76name:            add_s32_vgpr_vgpr_vgpr_multi_use
77legalized:       true
78regBankSelected: true
79tracksRegLiveness: true
80
81body: |
82  bb.0:
83    liveins: $vgpr0, $vgpr1, $vgpr2
84    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
85    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
86    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
87    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
88    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
89    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
90    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
91    ; GFX8: S_ENDPGM 0, implicit %4, implicit %3
92    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
93    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
94    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
95    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
96    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
97    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
98    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
99    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
100    %0:vgpr(s32) = COPY $vgpr0
101    %1:vgpr(s32) = COPY $vgpr1
102    %2:vgpr(s32) = COPY $vgpr2
103    %3:vgpr(s32) = G_ADD %0, %1
104    %4:vgpr(s32) = G_ADD %3, %2
105    S_ENDPGM 0, implicit %4, implicit %3
106...
107
108---
109
110name:            add_p3_vgpr_vgpr_vgpr
111legalized:       true
112regBankSelected: true
113tracksRegLiveness: true
114
115body: |
116  bb.0:
117    liveins: $vgpr0, $vgpr1, $vgpr2
118
119    ; GFX8-LABEL: name: add_p3_vgpr_vgpr_vgpr
120    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
121    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
122    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
123    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
124    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
125    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
126    ; GFX8: S_ENDPGM 0, implicit %4
127    ; GFX9-LABEL: name: add_p3_vgpr_vgpr_vgpr
128    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
129    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
130    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
131    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
132    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
133    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
134    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
135    %0:vgpr(p3) = COPY $vgpr0
136    %1:vgpr(s32) = COPY $vgpr1
137    %2:vgpr(s32) = COPY $vgpr2
138    %3:vgpr(p3) = G_PTR_ADD %0, %1
139    %4:vgpr(p3) = G_PTR_ADD %3, %2
140    S_ENDPGM 0, implicit %4
141...
142
143---
144
145name:            add_p5_vgpr_vgpr_vgpr
146legalized:       true
147regBankSelected: true
148tracksRegLiveness: true
149
150body: |
151  bb.0:
152    liveins: $vgpr0, $vgpr1, $vgpr2
153
154    ; GFX8-LABEL: name: add_p5_vgpr_vgpr_vgpr
155    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
156    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
157    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
158    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
159    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
160    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
161    ; GFX8: S_ENDPGM 0, implicit %4
162    ; GFX9-LABEL: name: add_p5_vgpr_vgpr_vgpr
163    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
164    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
165    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
166    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
167    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
168    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
169    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
170    %0:vgpr(p5) = COPY $vgpr0
171    %1:vgpr(s32) = COPY $vgpr1
172    %2:vgpr(s32) = COPY $vgpr2
173    %3:vgpr(p5) = G_PTR_ADD %0, %1
174    %4:vgpr(p5) = G_PTR_ADD %3, %2
175    S_ENDPGM 0, implicit %4
176...
177
178---
179
180name:            add_p3_s32_vgpr_vgpr_vgpr
181legalized:       true
182regBankSelected: true
183tracksRegLiveness: true
184
185body: |
186  bb.0:
187    liveins: $vgpr0, $vgpr1, $vgpr2
188
189    ; GFX8-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
190    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
191    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
192    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
193    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
194    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
195    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
196    ; GFX8: S_ENDPGM 0, implicit %4
197    ; GFX9-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
198    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
199    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
200    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
201    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
202    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
203    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
204    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
205    %0:vgpr(s32) = COPY $vgpr0
206    %1:vgpr(s32) = COPY $vgpr1
207    %2:vgpr(p3) = COPY $vgpr2
208    %3:vgpr(s32) = G_ADD %0, %1
209    %4:vgpr(p3) = G_PTR_ADD %2, %3
210    S_ENDPGM 0, implicit %4
211...
212
213---
214
215name:            add_p5_s32_vgpr_vgpr_vgpr
216legalized:       true
217regBankSelected: true
218tracksRegLiveness: true
219
220body: |
221  bb.0:
222    liveins: $vgpr0, $vgpr1, $vgpr2
223
224    ; GFX8-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
225    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
226    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
227    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
228    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
229    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
230    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
231    ; GFX8: S_ENDPGM 0, implicit %4
232    ; GFX9-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
233    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
234    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
235    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
236    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
237    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
238    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
239    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
240    %0:vgpr(s32) = COPY $vgpr0
241    %1:vgpr(s32) = COPY $vgpr1
242    %2:vgpr(p5) = COPY $vgpr2
243    %3:vgpr(s32) = G_ADD %0, %1
244    %4:vgpr(p5) = G_PTR_ADD %2, %3
245    S_ENDPGM 0, implicit %4
246...
247