1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name:            add_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: add_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
24    ; GFX9-LABEL: name: add_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
32    ; GFX10-LABEL: name: add_s32_sgpr_sgpr_sgpr
33    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
34    ; GFX10: $vcc_hi = IMPLICIT_DEF
35    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
36    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
37    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
38    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
39    ; GFX10: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
40    ; GFX10: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
41    %0:sgpr(s32) = COPY $sgpr0
42    %1:sgpr(s32) = COPY $sgpr1
43    %2:sgpr(s32) = COPY $sgpr2
44    %3:sgpr(s32) = G_ADD %0, %1
45    %4:sgpr(s32) = G_ADD %3, %2
46    S_ENDPGM 0, implicit %4
47...
48
49---
50
51name:            add_s32_vgpr_vgpr_vgpr
52legalized:       true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $vgpr0, $vgpr1, $vgpr2
59    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr
60    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
65    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_I32_e64 %3, [[COPY2]], 0, implicit $exec
66    ; GFX8: S_ENDPGM 0, implicit %4
67    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr
68    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
69    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
70    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
71    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
72    ; GFX9: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
73    ; GFX9: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
74    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr
75    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
76    ; GFX10: $vcc_hi = IMPLICIT_DEF
77    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
78    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
79    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
80    ; GFX10: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
81    ; GFX10: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
82    %0:vgpr(s32) = COPY $vgpr0
83    %1:vgpr(s32) = COPY $vgpr1
84    %2:vgpr(s32) = COPY $vgpr2
85    %3:vgpr(s32) = G_ADD %0, %1
86    %4:vgpr(s32) = G_ADD %3, %2
87    S_ENDPGM 0, implicit %4
88...
89
90---
91
92name:            add_s32_vgpr_vgpr_vgpr_multi_use
93legalized:       true
94regBankSelected: true
95tracksRegLiveness: true
96
97body: |
98  bb.0:
99    liveins: $vgpr0, $vgpr1, $vgpr2
100    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
101    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
102    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
103    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
104    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
105    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
106    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_I32_e64 %3, [[COPY2]], 0, implicit $exec
107    ; GFX8: S_ENDPGM 0, implicit %4, implicit %3
108    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
109    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
110    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
111    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
112    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
113    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
114    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
115    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
116    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
117    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
118    ; GFX10: $vcc_hi = IMPLICIT_DEF
119    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
120    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
121    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
122    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
123    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
124    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
125    %0:vgpr(s32) = COPY $vgpr0
126    %1:vgpr(s32) = COPY $vgpr1
127    %2:vgpr(s32) = COPY $vgpr2
128    %3:vgpr(s32) = G_ADD %0, %1
129    %4:vgpr(s32) = G_ADD %3, %2
130    S_ENDPGM 0, implicit %4, implicit %3
131...
132
133