1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name: load_atomic_flat_s32_seq_cst
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins:  $vgpr0_vgpr1
16
17    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst
18    ; GFX7: liveins: $vgpr0_vgpr1
19    ; GFX7-NEXT: {{  $}}
20    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
21    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
22    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
23    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst
24    ; GFX9: liveins: $vgpr0_vgpr1
25    ; GFX9-NEXT: {{  $}}
26    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
27    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
28    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
29    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst
30    ; GFX10: liveins: $vgpr0_vgpr1
31    ; GFX10-NEXT: {{  $}}
32    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
33    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
34    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
35    %0:vgpr(p0) = COPY $vgpr0_vgpr1
36    %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst (s32), align 4, addrspace 0)
37    $vgpr0 = COPY %1
38
39...
40
41---
42
43name: load_atomic_flat_v2s16_seq_cst
44legalized:       true
45regBankSelected: true
46tracksRegLiveness: true
47
48body: |
49  bb.0:
50    liveins:  $vgpr0_vgpr1
51
52    ; GFX7-LABEL: name: load_atomic_flat_v2s16_seq_cst
53    ; GFX7: liveins: $vgpr0_vgpr1
54    ; GFX7-NEXT: {{  $}}
55    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
56    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
57    ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
58    ; GFX9-LABEL: name: load_atomic_flat_v2s16_seq_cst
59    ; GFX9: liveins: $vgpr0_vgpr1
60    ; GFX9-NEXT: {{  $}}
61    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
62    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
63    ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
64    ; GFX10-LABEL: name: load_atomic_flat_v2s16_seq_cst
65    ; GFX10: liveins: $vgpr0_vgpr1
66    ; GFX10-NEXT: {{  $}}
67    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
68    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
69    ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
70    %0:vgpr(p0) = COPY $vgpr0_vgpr1
71    %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst (<2 x s16>), align 4, addrspace 0)
72    $vgpr0 = COPY %1
73
74...
75
76---
77
78name: load_atomic_flat_p3_seq_cst
79legalized:       true
80regBankSelected: true
81tracksRegLiveness: true
82
83body: |
84  bb.0:
85    liveins:  $vgpr0_vgpr1
86
87    ; GFX7-LABEL: name: load_atomic_flat_p3_seq_cst
88    ; GFX7: liveins: $vgpr0_vgpr1
89    ; GFX7-NEXT: {{  $}}
90    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
91    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
92    ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](p3)
93    ; GFX9-LABEL: name: load_atomic_flat_p3_seq_cst
94    ; GFX9: liveins: $vgpr0_vgpr1
95    ; GFX9-NEXT: {{  $}}
96    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
97    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
98    ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](p3)
99    ; GFX10-LABEL: name: load_atomic_flat_p3_seq_cst
100    ; GFX10: liveins: $vgpr0_vgpr1
101    ; GFX10-NEXT: {{  $}}
102    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
103    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
104    ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](p3)
105    %0:vgpr(p0) = COPY $vgpr0_vgpr1
106    %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst (p3), align 4, addrspace 0)
107    $vgpr0 = COPY %1
108
109...
110
111---
112
113name: load_atomic_flat_s64_seq_cst
114legalized:       true
115regBankSelected: true
116tracksRegLiveness: true
117
118body: |
119  bb.0:
120    liveins:  $vgpr0_vgpr1
121
122    ; GFX7-LABEL: name: load_atomic_flat_s64_seq_cst
123    ; GFX7: liveins: $vgpr0_vgpr1
124    ; GFX7-NEXT: {{  $}}
125    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
126    ; GFX7-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
127    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
128    ; GFX9-LABEL: name: load_atomic_flat_s64_seq_cst
129    ; GFX9: liveins: $vgpr0_vgpr1
130    ; GFX9-NEXT: {{  $}}
131    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
132    ; GFX9-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
133    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
134    ; GFX10-LABEL: name: load_atomic_flat_s64_seq_cst
135    ; GFX10: liveins: $vgpr0_vgpr1
136    ; GFX10-NEXT: {{  $}}
137    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
138    ; GFX10-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
139    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
140    %0:vgpr(p0) = COPY $vgpr0_vgpr1
141    %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst (s64), align 8, addrspace 0)
142    $vgpr0_vgpr1 = COPY %1
143
144...
145
146---
147
148name: load_atomic_flat_v2s32_seq_cst
149legalized:       true
150regBankSelected: true
151tracksRegLiveness: true
152
153body: |
154  bb.0:
155    liveins:  $vgpr0_vgpr1
156
157    ; GFX7-LABEL: name: load_atomic_flat_v2s32_seq_cst
158    ; GFX7: liveins: $vgpr0_vgpr1
159    ; GFX7-NEXT: {{  $}}
160    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
161    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
162    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
163    ; GFX9-LABEL: name: load_atomic_flat_v2s32_seq_cst
164    ; GFX9: liveins: $vgpr0_vgpr1
165    ; GFX9-NEXT: {{  $}}
166    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
167    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
168    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
169    ; GFX10-LABEL: name: load_atomic_flat_v2s32_seq_cst
170    ; GFX10: liveins: $vgpr0_vgpr1
171    ; GFX10-NEXT: {{  $}}
172    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
173    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
174    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
175    %0:vgpr(p0) = COPY $vgpr0_vgpr1
176    %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst (<2 x s32>), align 8, addrspace 0)
177    $vgpr0_vgpr1 = COPY %1
178
179...
180
181---
182
183name: load_atomic_flat_v4s16_seq_cst
184legalized:       true
185regBankSelected: true
186tracksRegLiveness: true
187
188body: |
189  bb.0:
190    liveins:  $vgpr0_vgpr1
191
192    ; GFX7-LABEL: name: load_atomic_flat_v4s16_seq_cst
193    ; GFX7: liveins: $vgpr0_vgpr1
194    ; GFX7-NEXT: {{  $}}
195    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
196    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
197    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
198    ; GFX9-LABEL: name: load_atomic_flat_v4s16_seq_cst
199    ; GFX9: liveins: $vgpr0_vgpr1
200    ; GFX9-NEXT: {{  $}}
201    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
202    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
203    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
204    ; GFX10-LABEL: name: load_atomic_flat_v4s16_seq_cst
205    ; GFX10: liveins: $vgpr0_vgpr1
206    ; GFX10-NEXT: {{  $}}
207    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
208    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
209    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
210    %0:vgpr(p0) = COPY $vgpr0_vgpr1
211    %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst (<4 x s16>), align 8, addrspace 0)
212    $vgpr0_vgpr1 = COPY %1
213
214...
215
216---
217
218name: load_atomic_flat_p1_seq_cst
219legalized:       true
220regBankSelected: true
221tracksRegLiveness: true
222
223body: |
224  bb.0:
225    liveins:  $vgpr0_vgpr1
226
227    ; GFX7-LABEL: name: load_atomic_flat_p1_seq_cst
228    ; GFX7: liveins: $vgpr0_vgpr1
229    ; GFX7-NEXT: {{  $}}
230    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
231    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
232    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
233    ; GFX9-LABEL: name: load_atomic_flat_p1_seq_cst
234    ; GFX9: liveins: $vgpr0_vgpr1
235    ; GFX9-NEXT: {{  $}}
236    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
237    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
238    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
239    ; GFX10-LABEL: name: load_atomic_flat_p1_seq_cst
240    ; GFX10: liveins: $vgpr0_vgpr1
241    ; GFX10-NEXT: {{  $}}
242    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
243    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
244    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
245    %0:vgpr(p0) = COPY $vgpr0_vgpr1
246    %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst (p1), align 8, addrspace 0)
247    $vgpr0_vgpr1 = COPY %1
248
249...
250
251---
252
253name: load_atomic_flat_p0_seq_cst
254legalized:       true
255regBankSelected: true
256tracksRegLiveness: true
257
258body: |
259  bb.0:
260    liveins:  $vgpr0_vgpr1
261
262    ; GFX7-LABEL: name: load_atomic_flat_p0_seq_cst
263    ; GFX7: liveins: $vgpr0_vgpr1
264    ; GFX7-NEXT: {{  $}}
265    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
266    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
267    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
268    ; GFX9-LABEL: name: load_atomic_flat_p0_seq_cst
269    ; GFX9: liveins: $vgpr0_vgpr1
270    ; GFX9-NEXT: {{  $}}
271    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
272    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
273    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
274    ; GFX10-LABEL: name: load_atomic_flat_p0_seq_cst
275    ; GFX10: liveins: $vgpr0_vgpr1
276    ; GFX10-NEXT: {{  $}}
277    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
278    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
279    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
280    %0:vgpr(p0) = COPY $vgpr0_vgpr1
281    %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst (p0), align 8, addrspace 0)
282    $vgpr0_vgpr1 = COPY %1
283
284...
285
286---
287
288name: load_atomic_flat_s32_seq_cst_gep_m2048
289legalized:       true
290regBankSelected: true
291tracksRegLiveness: true
292
293body: |
294  bb.0:
295    liveins:  $vgpr0_vgpr1
296
297    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
298    ; GFX7: liveins: $vgpr0_vgpr1
299    ; GFX7-NEXT: {{  $}}
300    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
301    ; GFX7-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
302    ; GFX7-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
303    ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
304    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
305    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
306    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
307    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
308    ; GFX7-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
309    ; GFX7-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
310    ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
311    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
312    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
313    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
314    ; GFX9: liveins: $vgpr0_vgpr1
315    ; GFX9-NEXT: {{  $}}
316    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
317    ; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
318    ; GFX9-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
319    ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
320    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
321    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
322    ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
323    ; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
324    ; GFX9-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
325    ; GFX9-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
326    ; GFX9-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
327    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
328    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
329    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
330    ; GFX10: liveins: $vgpr0_vgpr1
331    ; GFX10-NEXT: {{  $}}
332    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
333    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
334    ; GFX10-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
335    ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
336    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
337    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
338    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
339    ; GFX10-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
340    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
341    ; GFX10-NEXT: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
342    ; GFX10-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
343    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
344    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
345    %0:vgpr(p0) = COPY $vgpr0_vgpr1
346    %1:vgpr(s64) = G_CONSTANT i64 -2048
347    %2:vgpr(p0) = G_PTR_ADD %0, %1
348    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst (s32), align 4, addrspace 0)
349    $vgpr0 = COPY %3
350
351...
352
353---
354
355name: load_atomic_flat_s32_seq_cst_gep_4095
356legalized:       true
357regBankSelected: true
358tracksRegLiveness: true
359
360body: |
361  bb.0:
362    liveins:  $vgpr0_vgpr1
363
364    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
365    ; GFX7: liveins: $vgpr0_vgpr1
366    ; GFX7-NEXT: {{  $}}
367    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
368    ; GFX7-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
369    ; GFX7-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
370    ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
371    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
372    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
373    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
374    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
375    ; GFX7-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
376    ; GFX7-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
377    ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
378    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
379    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
380    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
381    ; GFX9: liveins: $vgpr0_vgpr1
382    ; GFX9-NEXT: {{  $}}
383    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
384    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 4095, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
385    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
386    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
387    ; GFX10: liveins: $vgpr0_vgpr1
388    ; GFX10-NEXT: {{  $}}
389    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
390    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
391    ; GFX10-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
392    ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
393    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
394    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
395    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
396    ; GFX10-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
397    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
398    ; GFX10-NEXT: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
399    ; GFX10-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
400    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
401    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
402    %0:vgpr(p0) = COPY $vgpr0_vgpr1
403    %1:vgpr(s64) = G_CONSTANT i64 4095
404    %2:vgpr(p0) = G_PTR_ADD %0, %1
405    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst (s32), align 4, addrspace 0)
406    $vgpr0 = COPY %3
407
408...
409
410