1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
4
5---
6
7name: load_atomic_flat_s32_seq_cst
8legalized:       true
9regBankSelected: true
10tracksRegLiveness: true
11
12body: |
13  bb.0:
14    liveins:  $vgpr0_vgpr1
15
16    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst
17    ; GFX7: liveins: $vgpr0_vgpr1
18    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
19    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
20    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
21    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst
22    ; GFX9: liveins: $vgpr0_vgpr1
23    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
24    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
25    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
26    %0:vgpr(p0) = COPY $vgpr0_vgpr1
27    %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
28    $vgpr0 = COPY %1
29
30...
31
32---
33
34name: load_atomic_flat_v2s16_seq_cst
35legalized:       true
36regBankSelected: true
37tracksRegLiveness: true
38
39body: |
40  bb.0:
41    liveins:  $vgpr0_vgpr1
42
43    ; GFX7-LABEL: name: load_atomic_flat_v2s16_seq_cst
44    ; GFX7: liveins: $vgpr0_vgpr1
45    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
46    ; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
47    ; GFX7: $vgpr0 = COPY [[LOAD]](<2 x s16>)
48    ; GFX9-LABEL: name: load_atomic_flat_v2s16_seq_cst
49    ; GFX9: liveins: $vgpr0_vgpr1
50    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
51    ; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
52    ; GFX9: $vgpr0 = COPY [[LOAD]](<2 x s16>)
53    %0:vgpr(p0) = COPY $vgpr0_vgpr1
54    %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
55    $vgpr0 = COPY %1
56
57...
58
59---
60
61name: load_atomic_flat_p3_seq_cst
62legalized:       true
63regBankSelected: true
64tracksRegLiveness: true
65
66body: |
67  bb.0:
68    liveins:  $vgpr0_vgpr1
69
70    ; GFX7-LABEL: name: load_atomic_flat_p3_seq_cst
71    ; GFX7: liveins: $vgpr0_vgpr1
72    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
73    ; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
74    ; GFX7: $vgpr0 = COPY [[LOAD]](p3)
75    ; GFX9-LABEL: name: load_atomic_flat_p3_seq_cst
76    ; GFX9: liveins: $vgpr0_vgpr1
77    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
78    ; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
79    ; GFX9: $vgpr0 = COPY [[LOAD]](p3)
80    %0:vgpr(p0) = COPY $vgpr0_vgpr1
81    %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
82    $vgpr0 = COPY %1
83
84...
85
86---
87
88name: load_atomic_flat_s64_seq_cst
89legalized:       true
90regBankSelected: true
91tracksRegLiveness: true
92
93body: |
94  bb.0:
95    liveins:  $vgpr0_vgpr1
96
97    ; GFX7-LABEL: name: load_atomic_flat_s64_seq_cst
98    ; GFX7: liveins: $vgpr0_vgpr1
99    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
100    ; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 8)
101    ; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
102    ; GFX9-LABEL: name: load_atomic_flat_s64_seq_cst
103    ; GFX9: liveins: $vgpr0_vgpr1
104    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
105    ; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 8)
106    ; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
107    %0:vgpr(p0) = COPY $vgpr0_vgpr1
108    %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
109    $vgpr0_vgpr1 = COPY %1
110
111...
112
113---
114
115name: load_atomic_flat_v2s32_seq_cst
116legalized:       true
117regBankSelected: true
118tracksRegLiveness: true
119
120body: |
121  bb.0:
122    liveins:  $vgpr0_vgpr1
123
124    ; GFX7-LABEL: name: load_atomic_flat_v2s32_seq_cst
125    ; GFX7: liveins: $vgpr0_vgpr1
126    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
127    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
128    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
129    ; GFX9-LABEL: name: load_atomic_flat_v2s32_seq_cst
130    ; GFX9: liveins: $vgpr0_vgpr1
131    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
132    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
133    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
134    %0:vgpr(p0) = COPY $vgpr0_vgpr1
135    %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
136    $vgpr0_vgpr1 = COPY %1
137
138...
139
140---
141
142name: load_atomic_flat_v4s16_seq_cst
143legalized:       true
144regBankSelected: true
145tracksRegLiveness: true
146
147body: |
148  bb.0:
149    liveins:  $vgpr0_vgpr1
150
151    ; GFX7-LABEL: name: load_atomic_flat_v4s16_seq_cst
152    ; GFX7: liveins: $vgpr0_vgpr1
153    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
154    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
155    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
156    ; GFX9-LABEL: name: load_atomic_flat_v4s16_seq_cst
157    ; GFX9: liveins: $vgpr0_vgpr1
158    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
159    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
160    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
161    %0:vgpr(p0) = COPY $vgpr0_vgpr1
162    %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
163    $vgpr0_vgpr1 = COPY %1
164
165...
166
167---
168
169name: load_atomic_flat_p1_seq_cst
170legalized:       true
171regBankSelected: true
172tracksRegLiveness: true
173
174body: |
175  bb.0:
176    liveins:  $vgpr0_vgpr1
177
178    ; GFX7-LABEL: name: load_atomic_flat_p1_seq_cst
179    ; GFX7: liveins: $vgpr0_vgpr1
180    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
181    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
182    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
183    ; GFX9-LABEL: name: load_atomic_flat_p1_seq_cst
184    ; GFX9: liveins: $vgpr0_vgpr1
185    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
186    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
187    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
188    %0:vgpr(p0) = COPY $vgpr0_vgpr1
189    %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
190    $vgpr0_vgpr1 = COPY %1
191
192...
193
194---
195
196name: load_atomic_flat_p0_seq_cst
197legalized:       true
198regBankSelected: true
199tracksRegLiveness: true
200
201body: |
202  bb.0:
203    liveins:  $vgpr0_vgpr1
204
205    ; GFX7-LABEL: name: load_atomic_flat_p0_seq_cst
206    ; GFX7: liveins: $vgpr0_vgpr1
207    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
208    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
209    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
210    ; GFX9-LABEL: name: load_atomic_flat_p0_seq_cst
211    ; GFX9: liveins: $vgpr0_vgpr1
212    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
213    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
214    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
215    %0:vgpr(p0) = COPY $vgpr0_vgpr1
216    %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
217    $vgpr0_vgpr1 = COPY %1
218
219...
220
221---
222
223name: load_atomic_flat_s32_seq_cst_gep_m2048
224legalized:       true
225regBankSelected: true
226tracksRegLiveness: true
227
228body: |
229  bb.0:
230    liveins:  $vgpr0_vgpr1
231
232    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
233    ; GFX7: liveins: $vgpr0_vgpr1
234    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
235    ; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
236    ; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
237    ; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
238    ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
239    ; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
240    ; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
241    ; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
242    ; GFX7: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
243    ; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
244    ; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
245    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
246    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
247    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
248    ; GFX9: liveins: $vgpr0_vgpr1
249    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
250    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
251    ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
252    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
253    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
254    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
255    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
256    ; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
257    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
258    ; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
259    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
260    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
261    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
262    %0:vgpr(p0) = COPY $vgpr0_vgpr1
263    %1:vgpr(s64) = G_CONSTANT i64 -2048
264    %2:vgpr(p0) = G_PTR_ADD %0, %1
265    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst 4, align 4, addrspace 0)
266    $vgpr0 = COPY %3
267
268...
269
270---
271
272name: load_atomic_flat_s32_seq_cst_gep_4095
273legalized:       true
274regBankSelected: true
275tracksRegLiveness: true
276
277body: |
278  bb.0:
279    liveins:  $vgpr0_vgpr1
280
281    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
282    ; GFX7: liveins: $vgpr0_vgpr1
283    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
284    ; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
285    ; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
286    ; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
287    ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
288    ; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
289    ; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
290    ; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
291    ; GFX7: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
292    ; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
293    ; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
294    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
295    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
296    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
297    ; GFX9: liveins: $vgpr0_vgpr1
298    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
299    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 4095, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
300    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
301    %0:vgpr(p0) = COPY $vgpr0_vgpr1
302    %1:vgpr(s64) = G_CONSTANT i64 4095
303    %2:vgpr(p0) = G_PTR_ADD %0, %1
304    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst 4, align 4, addrspace 0)
305    $vgpr0 = COPY %3
306
307...
308
309