1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX11 %s
6
7---
8
9name: load_atomic_flat_s32_seq_cst
10legalized:       true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins:  $vgpr0_vgpr1
17
18    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst
19    ; GFX7: liveins: $vgpr0_vgpr1
20    ; GFX7-NEXT: {{  $}}
21    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
22    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
23    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
24    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst
25    ; GFX9: liveins: $vgpr0_vgpr1
26    ; GFX9-NEXT: {{  $}}
27    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
28    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
29    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
30    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst
31    ; GFX10: liveins: $vgpr0_vgpr1
32    ; GFX10-NEXT: {{  $}}
33    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
34    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
35    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
36    ; GFX11-LABEL: name: load_atomic_flat_s32_seq_cst
37    ; GFX11: liveins: $vgpr0_vgpr1
38    ; GFX11-NEXT: {{  $}}
39    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
40    ; GFX11-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
41    ; GFX11-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
42    %0:vgpr(p0) = COPY $vgpr0_vgpr1
43    %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst (s32), align 4, addrspace 0)
44    $vgpr0 = COPY %1
45
46...
47
48---
49
50name: load_atomic_flat_v2s16_seq_cst
51legalized:       true
52regBankSelected: true
53tracksRegLiveness: true
54
55body: |
56  bb.0:
57    liveins:  $vgpr0_vgpr1
58
59    ; GFX7-LABEL: name: load_atomic_flat_v2s16_seq_cst
60    ; GFX7: liveins: $vgpr0_vgpr1
61    ; GFX7-NEXT: {{  $}}
62    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
63    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
64    ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
65    ; GFX9-LABEL: name: load_atomic_flat_v2s16_seq_cst
66    ; GFX9: liveins: $vgpr0_vgpr1
67    ; GFX9-NEXT: {{  $}}
68    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
69    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
70    ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
71    ; GFX10-LABEL: name: load_atomic_flat_v2s16_seq_cst
72    ; GFX10: liveins: $vgpr0_vgpr1
73    ; GFX10-NEXT: {{  $}}
74    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
75    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
76    ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
77    ; GFX11-LABEL: name: load_atomic_flat_v2s16_seq_cst
78    ; GFX11: liveins: $vgpr0_vgpr1
79    ; GFX11-NEXT: {{  $}}
80    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
81    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s16>))
82    ; GFX11-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
83    %0:vgpr(p0) = COPY $vgpr0_vgpr1
84    %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst (<2 x s16>), align 4, addrspace 0)
85    $vgpr0 = COPY %1
86
87...
88
89---
90
91name: load_atomic_flat_p3_seq_cst
92legalized:       true
93regBankSelected: true
94tracksRegLiveness: true
95
96body: |
97  bb.0:
98    liveins:  $vgpr0_vgpr1
99
100    ; GFX7-LABEL: name: load_atomic_flat_p3_seq_cst
101    ; GFX7: liveins: $vgpr0_vgpr1
102    ; GFX7-NEXT: {{  $}}
103    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
104    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
105    ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](p3)
106    ; GFX9-LABEL: name: load_atomic_flat_p3_seq_cst
107    ; GFX9: liveins: $vgpr0_vgpr1
108    ; GFX9-NEXT: {{  $}}
109    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
110    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
111    ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](p3)
112    ; GFX10-LABEL: name: load_atomic_flat_p3_seq_cst
113    ; GFX10: liveins: $vgpr0_vgpr1
114    ; GFX10-NEXT: {{  $}}
115    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
116    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
117    ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](p3)
118    ; GFX11-LABEL: name: load_atomic_flat_p3_seq_cst
119    ; GFX11: liveins: $vgpr0_vgpr1
120    ; GFX11-NEXT: {{  $}}
121    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
122    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
123    ; GFX11-NEXT: $vgpr0 = COPY [[LOAD]](p3)
124    %0:vgpr(p0) = COPY $vgpr0_vgpr1
125    %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst (p3), align 4, addrspace 0)
126    $vgpr0 = COPY %1
127
128...
129
130---
131
132name: load_atomic_flat_s64_seq_cst
133legalized:       true
134regBankSelected: true
135tracksRegLiveness: true
136
137body: |
138  bb.0:
139    liveins:  $vgpr0_vgpr1
140
141    ; GFX7-LABEL: name: load_atomic_flat_s64_seq_cst
142    ; GFX7: liveins: $vgpr0_vgpr1
143    ; GFX7-NEXT: {{  $}}
144    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
145    ; GFX7-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
146    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
147    ; GFX9-LABEL: name: load_atomic_flat_s64_seq_cst
148    ; GFX9: liveins: $vgpr0_vgpr1
149    ; GFX9-NEXT: {{  $}}
150    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
151    ; GFX9-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
152    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
153    ; GFX10-LABEL: name: load_atomic_flat_s64_seq_cst
154    ; GFX10: liveins: $vgpr0_vgpr1
155    ; GFX10-NEXT: {{  $}}
156    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
157    ; GFX10-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
158    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
159    ; GFX11-LABEL: name: load_atomic_flat_s64_seq_cst
160    ; GFX11: liveins: $vgpr0_vgpr1
161    ; GFX11-NEXT: {{  $}}
162    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
163    ; GFX11-NEXT: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s64))
164    ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
165    %0:vgpr(p0) = COPY $vgpr0_vgpr1
166    %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst (s64), align 8, addrspace 0)
167    $vgpr0_vgpr1 = COPY %1
168
169...
170
171---
172
173name: load_atomic_flat_v2s32_seq_cst
174legalized:       true
175regBankSelected: true
176tracksRegLiveness: true
177
178body: |
179  bb.0:
180    liveins:  $vgpr0_vgpr1
181
182    ; GFX7-LABEL: name: load_atomic_flat_v2s32_seq_cst
183    ; GFX7: liveins: $vgpr0_vgpr1
184    ; GFX7-NEXT: {{  $}}
185    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
186    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
187    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
188    ; GFX9-LABEL: name: load_atomic_flat_v2s32_seq_cst
189    ; GFX9: liveins: $vgpr0_vgpr1
190    ; GFX9-NEXT: {{  $}}
191    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
192    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
193    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
194    ; GFX10-LABEL: name: load_atomic_flat_v2s32_seq_cst
195    ; GFX10: liveins: $vgpr0_vgpr1
196    ; GFX10-NEXT: {{  $}}
197    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
198    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
199    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
200    ; GFX11-LABEL: name: load_atomic_flat_v2s32_seq_cst
201    ; GFX11: liveins: $vgpr0_vgpr1
202    ; GFX11-NEXT: {{  $}}
203    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
204    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<2 x s32>))
205    ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
206    %0:vgpr(p0) = COPY $vgpr0_vgpr1
207    %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst (<2 x s32>), align 8, addrspace 0)
208    $vgpr0_vgpr1 = COPY %1
209
210...
211
212---
213
214name: load_atomic_flat_v4s16_seq_cst
215legalized:       true
216regBankSelected: true
217tracksRegLiveness: true
218
219body: |
220  bb.0:
221    liveins:  $vgpr0_vgpr1
222
223    ; GFX7-LABEL: name: load_atomic_flat_v4s16_seq_cst
224    ; GFX7: liveins: $vgpr0_vgpr1
225    ; GFX7-NEXT: {{  $}}
226    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
227    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
228    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
229    ; GFX9-LABEL: name: load_atomic_flat_v4s16_seq_cst
230    ; GFX9: liveins: $vgpr0_vgpr1
231    ; GFX9-NEXT: {{  $}}
232    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
233    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
234    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
235    ; GFX10-LABEL: name: load_atomic_flat_v4s16_seq_cst
236    ; GFX10: liveins: $vgpr0_vgpr1
237    ; GFX10-NEXT: {{  $}}
238    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
239    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
240    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
241    ; GFX11-LABEL: name: load_atomic_flat_v4s16_seq_cst
242    ; GFX11: liveins: $vgpr0_vgpr1
243    ; GFX11-NEXT: {{  $}}
244    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
245    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst (<4 x s16>))
246    ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
247    %0:vgpr(p0) = COPY $vgpr0_vgpr1
248    %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst (<4 x s16>), align 8, addrspace 0)
249    $vgpr0_vgpr1 = COPY %1
250
251...
252
253---
254
255name: load_atomic_flat_p1_seq_cst
256legalized:       true
257regBankSelected: true
258tracksRegLiveness: true
259
260body: |
261  bb.0:
262    liveins:  $vgpr0_vgpr1
263
264    ; GFX7-LABEL: name: load_atomic_flat_p1_seq_cst
265    ; GFX7: liveins: $vgpr0_vgpr1
266    ; GFX7-NEXT: {{  $}}
267    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
268    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
269    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
270    ; GFX9-LABEL: name: load_atomic_flat_p1_seq_cst
271    ; GFX9: liveins: $vgpr0_vgpr1
272    ; GFX9-NEXT: {{  $}}
273    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
274    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
275    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
276    ; GFX10-LABEL: name: load_atomic_flat_p1_seq_cst
277    ; GFX10: liveins: $vgpr0_vgpr1
278    ; GFX10-NEXT: {{  $}}
279    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
280    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
281    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
282    ; GFX11-LABEL: name: load_atomic_flat_p1_seq_cst
283    ; GFX11: liveins: $vgpr0_vgpr1
284    ; GFX11-NEXT: {{  $}}
285    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
286    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst (p1))
287    ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
288    %0:vgpr(p0) = COPY $vgpr0_vgpr1
289    %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst (p1), align 8, addrspace 0)
290    $vgpr0_vgpr1 = COPY %1
291
292...
293
294---
295
296name: load_atomic_flat_p0_seq_cst
297legalized:       true
298regBankSelected: true
299tracksRegLiveness: true
300
301body: |
302  bb.0:
303    liveins:  $vgpr0_vgpr1
304
305    ; GFX7-LABEL: name: load_atomic_flat_p0_seq_cst
306    ; GFX7: liveins: $vgpr0_vgpr1
307    ; GFX7-NEXT: {{  $}}
308    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
309    ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
310    ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
311    ; GFX9-LABEL: name: load_atomic_flat_p0_seq_cst
312    ; GFX9: liveins: $vgpr0_vgpr1
313    ; GFX9-NEXT: {{  $}}
314    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
315    ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
316    ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
317    ; GFX10-LABEL: name: load_atomic_flat_p0_seq_cst
318    ; GFX10: liveins: $vgpr0_vgpr1
319    ; GFX10-NEXT: {{  $}}
320    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
321    ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
322    ; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
323    ; GFX11-LABEL: name: load_atomic_flat_p0_seq_cst
324    ; GFX11: liveins: $vgpr0_vgpr1
325    ; GFX11-NEXT: {{  $}}
326    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
327    ; GFX11-NEXT: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst (p0))
328    ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
329    %0:vgpr(p0) = COPY $vgpr0_vgpr1
330    %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst (p0), align 8, addrspace 0)
331    $vgpr0_vgpr1 = COPY %1
332
333...
334
335---
336
337name: load_atomic_flat_s32_seq_cst_gep_m2048
338legalized:       true
339regBankSelected: true
340tracksRegLiveness: true
341
342body: |
343  bb.0:
344    liveins:  $vgpr0_vgpr1
345
346    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
347    ; GFX7: liveins: $vgpr0_vgpr1
348    ; GFX7-NEXT: {{  $}}
349    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
350    ; GFX7-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
351    ; GFX7-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
352    ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
353    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
354    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
355    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
356    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
357    ; GFX7-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
358    ; GFX7-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
359    ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
360    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
361    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
362    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
363    ; GFX9: liveins: $vgpr0_vgpr1
364    ; GFX9-NEXT: {{  $}}
365    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
366    ; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
367    ; GFX9-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
368    ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
369    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
370    ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
371    ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
372    ; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
373    ; GFX9-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
374    ; GFX9-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
375    ; GFX9-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
376    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
377    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
378    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
379    ; GFX10: liveins: $vgpr0_vgpr1
380    ; GFX10-NEXT: {{  $}}
381    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
382    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
383    ; GFX10-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
384    ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
385    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
386    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
387    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
388    ; GFX10-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
389    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
390    ; GFX10-NEXT: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
391    ; GFX10-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
392    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
393    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
394    ; GFX11-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
395    ; GFX11: liveins: $vgpr0_vgpr1
396    ; GFX11-NEXT: {{  $}}
397    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
398    ; GFX11-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
399    ; GFX11-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
400    ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
401    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
402    ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
403    ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
404    ; GFX11-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
405    ; GFX11-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
406    ; GFX11-NEXT: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
407    ; GFX11-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
408    ; GFX11-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
409    ; GFX11-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
410    %0:vgpr(p0) = COPY $vgpr0_vgpr1
411    %1:vgpr(s64) = G_CONSTANT i64 -2048
412    %2:vgpr(p0) = G_PTR_ADD %0, %1
413    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst (s32), align 4, addrspace 0)
414    $vgpr0 = COPY %3
415
416...
417
418---
419
420name: load_atomic_flat_s32_seq_cst_gep_4095
421legalized:       true
422regBankSelected: true
423tracksRegLiveness: true
424
425body: |
426  bb.0:
427    liveins:  $vgpr0_vgpr1
428
429    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
430    ; GFX7: liveins: $vgpr0_vgpr1
431    ; GFX7-NEXT: {{  $}}
432    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
433    ; GFX7-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
434    ; GFX7-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
435    ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
436    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
437    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
438    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
439    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
440    ; GFX7-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
441    ; GFX7-NEXT: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
442    ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
443    ; GFX7-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
444    ; GFX7-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
445    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
446    ; GFX9: liveins: $vgpr0_vgpr1
447    ; GFX9-NEXT: {{  $}}
448    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
449    ; GFX9-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 4095, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
450    ; GFX9-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
451    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
452    ; GFX10: liveins: $vgpr0_vgpr1
453    ; GFX10-NEXT: {{  $}}
454    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
455    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
456    ; GFX10-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
457    ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
458    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
459    ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
460    ; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
461    ; GFX10-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
462    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
463    ; GFX10-NEXT: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
464    ; GFX10-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
465    ; GFX10-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
466    ; GFX10-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
467    ; GFX11-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
468    ; GFX11: liveins: $vgpr0_vgpr1
469    ; GFX11-NEXT: {{  $}}
470    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
471    ; GFX11-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 4095, 0, implicit $exec, implicit $flat_scr :: (load seq_cst (s32))
472    ; GFX11-NEXT: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
473    %0:vgpr(p0) = COPY $vgpr0_vgpr1
474    %1:vgpr(s64) = G_CONSTANT i64 4095
475    %2:vgpr(p0) = G_PTR_ADD %0, %1
476    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst (s32), align 4, addrspace 0)
477    $vgpr0 = COPY %3
478
479...
480
481