1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name: load_atomic_flat_s32_seq_cst
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins:  $vgpr0_vgpr1
16
17    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst
18    ; GFX7: liveins: $vgpr0_vgpr1
19    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
20    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
21    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
22    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst
23    ; GFX9: liveins: $vgpr0_vgpr1
24    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
25    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
26    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
27    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst
28    ; GFX10: liveins: $vgpr0_vgpr1
29    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
30    ; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
31    ; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
32    %0:vgpr(p0) = COPY $vgpr0_vgpr1
33    %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
34    $vgpr0 = COPY %1
35
36...
37
38---
39
40name: load_atomic_flat_v2s16_seq_cst
41legalized:       true
42regBankSelected: true
43tracksRegLiveness: true
44
45body: |
46  bb.0:
47    liveins:  $vgpr0_vgpr1
48
49    ; GFX7-LABEL: name: load_atomic_flat_v2s16_seq_cst
50    ; GFX7: liveins: $vgpr0_vgpr1
51    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
52    ; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
53    ; GFX7: $vgpr0 = COPY [[LOAD]](<2 x s16>)
54    ; GFX9-LABEL: name: load_atomic_flat_v2s16_seq_cst
55    ; GFX9: liveins: $vgpr0_vgpr1
56    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
57    ; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
58    ; GFX9: $vgpr0 = COPY [[LOAD]](<2 x s16>)
59    ; GFX10-LABEL: name: load_atomic_flat_v2s16_seq_cst
60    ; GFX10: liveins: $vgpr0_vgpr1
61    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
62    ; GFX10: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
63    ; GFX10: $vgpr0 = COPY [[LOAD]](<2 x s16>)
64    %0:vgpr(p0) = COPY $vgpr0_vgpr1
65    %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
66    $vgpr0 = COPY %1
67
68...
69
70---
71
72name: load_atomic_flat_p3_seq_cst
73legalized:       true
74regBankSelected: true
75tracksRegLiveness: true
76
77body: |
78  bb.0:
79    liveins:  $vgpr0_vgpr1
80
81    ; GFX7-LABEL: name: load_atomic_flat_p3_seq_cst
82    ; GFX7: liveins: $vgpr0_vgpr1
83    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
84    ; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
85    ; GFX7: $vgpr0 = COPY [[LOAD]](p3)
86    ; GFX9-LABEL: name: load_atomic_flat_p3_seq_cst
87    ; GFX9: liveins: $vgpr0_vgpr1
88    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
89    ; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
90    ; GFX9: $vgpr0 = COPY [[LOAD]](p3)
91    ; GFX10-LABEL: name: load_atomic_flat_p3_seq_cst
92    ; GFX10: liveins: $vgpr0_vgpr1
93    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
94    ; GFX10: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst 4)
95    ; GFX10: $vgpr0 = COPY [[LOAD]](p3)
96    %0:vgpr(p0) = COPY $vgpr0_vgpr1
97    %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst 4, align 4, addrspace 0)
98    $vgpr0 = COPY %1
99
100...
101
102---
103
104name: load_atomic_flat_s64_seq_cst
105legalized:       true
106regBankSelected: true
107tracksRegLiveness: true
108
109body: |
110  bb.0:
111    liveins:  $vgpr0_vgpr1
112
113    ; GFX7-LABEL: name: load_atomic_flat_s64_seq_cst
114    ; GFX7: liveins: $vgpr0_vgpr1
115    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
116    ; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 8)
117    ; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
118    ; GFX9-LABEL: name: load_atomic_flat_s64_seq_cst
119    ; GFX9: liveins: $vgpr0_vgpr1
120    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
121    ; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 8)
122    ; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
123    ; GFX10-LABEL: name: load_atomic_flat_s64_seq_cst
124    ; GFX10: liveins: $vgpr0_vgpr1
125    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
126    ; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 8)
127    ; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
128    %0:vgpr(p0) = COPY $vgpr0_vgpr1
129    %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
130    $vgpr0_vgpr1 = COPY %1
131
132...
133
134---
135
136name: load_atomic_flat_v2s32_seq_cst
137legalized:       true
138regBankSelected: true
139tracksRegLiveness: true
140
141body: |
142  bb.0:
143    liveins:  $vgpr0_vgpr1
144
145    ; GFX7-LABEL: name: load_atomic_flat_v2s32_seq_cst
146    ; GFX7: liveins: $vgpr0_vgpr1
147    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
148    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
149    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
150    ; GFX9-LABEL: name: load_atomic_flat_v2s32_seq_cst
151    ; GFX9: liveins: $vgpr0_vgpr1
152    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
153    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
154    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
155    ; GFX10-LABEL: name: load_atomic_flat_v2s32_seq_cst
156    ; GFX10: liveins: $vgpr0_vgpr1
157    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
158    ; GFX10: [[LOAD:%[0-9]+]]:vreg_64(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
159    ; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
160    %0:vgpr(p0) = COPY $vgpr0_vgpr1
161    %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
162    $vgpr0_vgpr1 = COPY %1
163
164...
165
166---
167
168name: load_atomic_flat_v4s16_seq_cst
169legalized:       true
170regBankSelected: true
171tracksRegLiveness: true
172
173body: |
174  bb.0:
175    liveins:  $vgpr0_vgpr1
176
177    ; GFX7-LABEL: name: load_atomic_flat_v4s16_seq_cst
178    ; GFX7: liveins: $vgpr0_vgpr1
179    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
180    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
181    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
182    ; GFX9-LABEL: name: load_atomic_flat_v4s16_seq_cst
183    ; GFX9: liveins: $vgpr0_vgpr1
184    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
185    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
186    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
187    ; GFX10-LABEL: name: load_atomic_flat_v4s16_seq_cst
188    ; GFX10: liveins: $vgpr0_vgpr1
189    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
190    ; GFX10: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
191    ; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>)
192    %0:vgpr(p0) = COPY $vgpr0_vgpr1
193    %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
194    $vgpr0_vgpr1 = COPY %1
195
196...
197
198---
199
200name: load_atomic_flat_p1_seq_cst
201legalized:       true
202regBankSelected: true
203tracksRegLiveness: true
204
205body: |
206  bb.0:
207    liveins:  $vgpr0_vgpr1
208
209    ; GFX7-LABEL: name: load_atomic_flat_p1_seq_cst
210    ; GFX7: liveins: $vgpr0_vgpr1
211    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
212    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
213    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
214    ; GFX9-LABEL: name: load_atomic_flat_p1_seq_cst
215    ; GFX9: liveins: $vgpr0_vgpr1
216    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
217    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
218    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
219    ; GFX10-LABEL: name: load_atomic_flat_p1_seq_cst
220    ; GFX10: liveins: $vgpr0_vgpr1
221    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
222    ; GFX10: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
223    ; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
224    %0:vgpr(p0) = COPY $vgpr0_vgpr1
225    %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
226    $vgpr0_vgpr1 = COPY %1
227
228...
229
230---
231
232name: load_atomic_flat_p0_seq_cst
233legalized:       true
234regBankSelected: true
235tracksRegLiveness: true
236
237body: |
238  bb.0:
239    liveins:  $vgpr0_vgpr1
240
241    ; GFX7-LABEL: name: load_atomic_flat_p0_seq_cst
242    ; GFX7: liveins: $vgpr0_vgpr1
243    ; GFX7: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
244    ; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
245    ; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
246    ; GFX9-LABEL: name: load_atomic_flat_p0_seq_cst
247    ; GFX9: liveins: $vgpr0_vgpr1
248    ; GFX9: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
249    ; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
250    ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
251    ; GFX10-LABEL: name: load_atomic_flat_p0_seq_cst
252    ; GFX10: liveins: $vgpr0_vgpr1
253    ; GFX10: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
254    ; GFX10: [[LOAD:%[0-9]+]]:vreg_64(p0) = G_LOAD [[COPY]](p0) :: (load seq_cst 8)
255    ; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
256    %0:vgpr(p0) = COPY $vgpr0_vgpr1
257    %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst 8, align 8, addrspace 0)
258    $vgpr0_vgpr1 = COPY %1
259
260...
261
262---
263
264name: load_atomic_flat_s32_seq_cst_gep_m2048
265legalized:       true
266regBankSelected: true
267tracksRegLiveness: true
268
269body: |
270  bb.0:
271    liveins:  $vgpr0_vgpr1
272
273    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
274    ; GFX7: liveins: $vgpr0_vgpr1
275    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
276    ; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
277    ; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
278    ; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
279    ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
280    ; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
281    ; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
282    ; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
283    ; GFX7: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
284    ; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
285    ; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
286    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
287    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
288    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
289    ; GFX9: liveins: $vgpr0_vgpr1
290    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
291    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
292    ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
293    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
294    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
295    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
296    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
297    ; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
298    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
299    ; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
300    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
301    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
302    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
303    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_m2048
304    ; GFX10: liveins: $vgpr0_vgpr1
305    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
306    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
307    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
308    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
309    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
310    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
311    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
312    ; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
313    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
314    ; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
315    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
316    ; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
317    ; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
318    %0:vgpr(p0) = COPY $vgpr0_vgpr1
319    %1:vgpr(s64) = G_CONSTANT i64 -2048
320    %2:vgpr(p0) = G_PTR_ADD %0, %1
321    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst 4, align 4, addrspace 0)
322    $vgpr0 = COPY %3
323
324...
325
326---
327
328name: load_atomic_flat_s32_seq_cst_gep_4095
329legalized:       true
330regBankSelected: true
331tracksRegLiveness: true
332
333body: |
334  bb.0:
335    liveins:  $vgpr0_vgpr1
336
337    ; GFX7-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
338    ; GFX7: liveins: $vgpr0_vgpr1
339    ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
340    ; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
341    ; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
342    ; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
343    ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
344    ; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
345    ; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
346    ; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
347    ; GFX7: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
348    ; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
349    ; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
350    ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
351    ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
352    ; GFX9-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
353    ; GFX9: liveins: $vgpr0_vgpr1
354    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
355    ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 4095, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
356    ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
357    ; GFX10-LABEL: name: load_atomic_flat_s32_seq_cst_gep_4095
358    ; GFX10: liveins: $vgpr0_vgpr1
359    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
360    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
361    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
362    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
363    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
364    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
365    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
366    ; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
367    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
368    ; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
369    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %9, %subreg.sub1
370    ; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr :: (load seq_cst 4)
371    ; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
372    %0:vgpr(p0) = COPY $vgpr0_vgpr1
373    %1:vgpr(s64) = G_CONSTANT i64 4095
374    %2:vgpr(p0) = G_PTR_ADD %0, %1
375    %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst 4, align 4, addrspace 0)
376    $vgpr0 = COPY %3
377
378...
379
380