1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs  -global-isel-abort=0  -o - %s | FileCheck -check-prefixes=GCN %s
3# XUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs  -global-isel-abort=2 -pass-remarks-missed='gisel*' -o /dev/null  %s 2>&1 | FileCheck -check-prefixes=ERR %s
4
5---
6
7name:            implicit_def_s32_sgpr
8legalized:       true
9regBankSelected: true
10
11body: |
12  bb.0:
13    ; GCN-LABEL: name: implicit_def_s32_sgpr
14    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
15    ; GCN: S_ENDPGM 0, implicit [[DEF]]
16    %0:sgpr(s32) = G_IMPLICIT_DEF
17    S_ENDPGM 0, implicit %0
18...
19---
20
21name:            implicit_def_s32_vgpr
22legalized:       true
23regBankSelected: true
24
25body: |
26  bb.0:
27    ; GCN-LABEL: name: implicit_def_s32_vgpr
28    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
29    ; GCN: S_ENDPGM 0, implicit [[DEF]]
30    %0:vgpr(s32) = G_IMPLICIT_DEF
31    S_ENDPGM 0, implicit %0
32...
33
34---
35
36name:            implicit_def_s64_sgpr
37legalized:       true
38regBankSelected: true
39
40body: |
41  bb.0:
42    ; GCN-LABEL: name: implicit_def_s64_sgpr
43    ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
44    ; GCN: S_ENDPGM 0, implicit [[DEF]]
45    %0:sgpr(s64) = G_IMPLICIT_DEF
46    S_ENDPGM 0, implicit %0
47...
48
49---
50
51name:            implicit_def_s64_vgpr
52legalized:       true
53regBankSelected: true
54
55body: |
56  bb.0:
57    ; GCN-LABEL: name: implicit_def_s64_vgpr
58    ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
59    ; GCN: S_ENDPGM 0, implicit [[DEF]]
60    %0:vgpr(s64) = G_IMPLICIT_DEF
61    S_ENDPGM 0, implicit %0
62...
63
64---
65name:            implicit_def_p0_sgpr
66legalized:       true
67regBankSelected: true
68
69body: |
70  bb.0:
71    ; GCN-LABEL: name: implicit_def_p0_sgpr
72    ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
73    ; GCN: S_ENDPGM 0, implicit [[DEF]]
74    %0:sgpr(p0) = G_IMPLICIT_DEF
75    S_ENDPGM 0, implicit %0
76...
77
78---
79name:            implicit_def_p0_vgpr
80legalized:       true
81regBankSelected: true
82
83body: |
84  bb.0:
85    ; GCN-LABEL: name: implicit_def_p0_vgpr
86    ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
87    ; GCN: S_ENDPGM 0, implicit [[DEF]]
88    %0:vgpr(p0) = G_IMPLICIT_DEF
89    S_ENDPGM 0, implicit %0
90...
91
92---
93
94name:            implicit_def_p1_vgpr
95legalized:       true
96regBankSelected: true
97
98body: |
99  bb.0:
100    ; GCN-LABEL: name: implicit_def_p1_vgpr
101    ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
102    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
103    ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
104    %0:vgpr(p1) = G_IMPLICIT_DEF
105    %1:vgpr(s32) = G_CONSTANT i32 4
106    G_STORE %1, %0 :: (store 4, addrspace 1)
107...
108
109---
110
111name:            implicit_def_p3_vgpr
112legalized:       true
113regBankSelected: true
114
115body: |
116  bb.0:
117    ; GCN-LABEL: name: implicit_def_p3_vgpr
118    ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
119    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
120    ; GCN: $m0 = S_MOV_B32 -1
121    ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
122    %0:vgpr(p3) = G_IMPLICIT_DEF
123    %1:vgpr(s32) = G_CONSTANT i32 4
124    G_STORE %1, %0 :: (store 4, addrspace 1)
125...
126
127---
128
129name:            implicit_def_p4_vgpr
130legalized:       true
131regBankSelected: true
132
133body: |
134  bb.0:
135    ; GCN-LABEL: name: implicit_def_p4_vgpr
136    ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
137    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
138    ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
139    %0:vgpr(p4) = G_IMPLICIT_DEF
140    %1:vgpr(s32) = G_CONSTANT i32 4
141    G_STORE %1, %0 :: (store 4, addrspace 1)
142...
143
144---
145
146name:            implicit_def_s1_vgpr
147legalized:       true
148regBankSelected: true
149
150body: |
151  bb.0:
152    ; GCN-LABEL: name: implicit_def_s1_vgpr
153    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
154    ; GCN: S_ENDPGM 0, implicit [[DEF]]
155    %0:vgpr(s1) = G_IMPLICIT_DEF
156    S_ENDPGM 0, implicit %0
157...
158
159---
160
161name:            implicit_def_s1_sgpr
162legalized:       true
163regBankSelected: true
164
165body: |
166  bb.0:
167    ; GCN-LABEL: name: implicit_def_s1_sgpr
168    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
169    ; GCN: S_ENDPGM 0, implicit [[DEF]]
170    %0:sgpr(s1) = G_IMPLICIT_DEF
171    S_ENDPGM 0, implicit %0
172...
173
174---
175
176name:            implicit_def_s1_vcc
177legalized:       true
178regBankSelected: true
179
180body: |
181  bb.0:
182    ; GCN-LABEL: name: implicit_def_s1_vcc
183    ; GCN: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF
184    ; GCN: S_ENDPGM 0, implicit [[DEF]]
185    %0:vcc(s1) = G_IMPLICIT_DEF
186    S_ENDPGM 0, implicit %0
187...
188
189---
190
191name:            implicit_def_s1024_sgpr
192legalized:       true
193regBankSelected: true
194
195body: |
196  bb.0:
197    ; GCN-LABEL: name: implicit_def_s1024_sgpr
198    ; GCN: [[DEF:%[0-9]+]]:sreg_1024 = IMPLICIT_DEF
199    ; GCN: S_ENDPGM 0, implicit [[DEF]]
200    %0:sgpr(s1024) = G_IMPLICIT_DEF
201    S_ENDPGM 0, implicit %0
202...
203---
204
205name:            implicit_def_s1024_vgpr
206legalized:       true
207regBankSelected: true
208
209body: |
210  bb.0:
211    ; GCN-LABEL: name: implicit_def_s1024_vgpr
212    ; GCN: [[DEF:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF
213    ; GCN: S_ENDPGM 0, implicit [[DEF]]
214    %0:vgpr(s1024) = G_IMPLICIT_DEF
215    S_ENDPGM 0, implicit %0
216...
217